JPH07270823A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To eliminate the limit of a scanning direction and to realize high yield by improving the structure of an auxiliary capacitance in an additional capacitance type liquid crystal display device using positive stagger type TFTs. CONSTITUTION:This device has a costricture in which an auxiliary capacitance electode 12 is arranged with integration to a display electrode 14P and a gate line 17L in common and is of the consitution of a CsonGate system in which two capacitances SC1, SC1 are connected in series at this integrating part by making the auxiliary capacitance electrode 12 a common and this resultant capacitance is made to be the auxiliary capacitance. Thus, since the display electrode 14P is insulated from a drain line 14L. the scanning in the up-and-down direction is made possible and an adverse influence is not exerted on a display even though a defect is generated in an insulation film and auxiliary capacitances SC1, SC2 are short-circuited.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device capable of reducing the number of masks, and more particularly to a method of connecting one electrode of an auxiliary capacitor to a gate line (generally,
The present invention relates to an additional capacitance type liquid crystal display device (referred to as Cs on Gate system).

[0002]

2. Description of the Related Art Liquid crystal display devices have advantages such as small size, thin shape, and low power consumption, and are being put to practical use in fields such as OA equipment and AV equipment. In particular, the active matrix type using a thin film transistor (hereinafter abbreviated as TFT) as a switching element can perform static driving with a duty ratio of 100% in a multiplexed manner in principle, and has a large screen and a high-definition moving image display. Is used for.

The active matrix type liquid crystal display device is
A substrate in which TFTs are connected to display electrodes arranged in a matrix (TFT substrate) and a substrate having a common electrode (counter substrate)
Are bonded together and liquid crystal is sealed in the gap. The TFT is a switching element that selects a data signal input to the display electrode, and includes a gate electrode, a drain electrode, a source electrode, and a non-single-crystal semiconductor layer. Each electrode is connected to a gate line, a drain line, and a display electrode, and the non-single crystal semiconductor layer is amorphous silicon (a-Si) or polysilicon (p-Si) and functions as a channel layer. The gate line group is line-sequentially scanned and selected to turn on all the TFTs on one scanning line.
N, and a data signal synchronized with this is input to each display electrode via each drain line. The voltage of the common electrode is set in synchronization with the scanning signal, the liquid crystal in the gap is driven by the voltage between the display electrodes facing each other, and the light transmittance is adjusted for each display pixel. The composite of the key display is visually recognized as a display image. Further, the driving state of the liquid crystal during the OFF period is held for one field period by the applied voltage of the display pixel capacitance formed between both electrodes. By adding an auxiliary capacitance in parallel with this, the holding characteristic is improved. be able to. Further, the auxiliary capacitance has an action of suppressing the shift of the display electrode voltage which occurs when the TFT operates.
That is, in the overlapping portion between the source and the gate, which is unavoidable due to the limitation of the manufacturing process, the parasitic capacitance changes according to ON / OFF of the TFT. Therefore, the auxiliary capacitance is added in parallel to the liquid crystal capacitance to increase the total capacitance, thereby alleviating the influence of the DC component due to the parasitic capacitance on the display electrode potential. The auxiliary capacitor, the storage capacitor type arranged to overlap the separate electrodes from other electrodes in the display electrodes, providing a common voltage to the electrode system (commonly referred to as C _S on Common mode), the gate superimposed disposed on the display electrode part of the line extending form to, there is an additional displacement of the C _S on Gate scheme. Compared to the storage capacitance type, the additional capacitance type has fewer wiring crossovers and thus short circuits are reduced, the total area of the electrodes that shield light is small, and the aperture ratio is improved. Since it is applied to the display electrode, the point defect becomes a black dot in the normally white mode, so that the display quality is not adversely affected.
There are advantages such as.

A conventional example of a Cs on Gate type liquid crystal display device will be described below. FIG. 6 is an equivalent circuit diagram thereof. The gate lines (G1 to Gm) and the drain lines (D1 to Dn) are arranged at right angles to each other, and the gate electrodes and the drain electrodes are respectively arranged at the intersections of the gate lines (G1 to Gm) and the drain lines (D1 to Dn).
TFT (T) connected to n) is formed. Each TF
The source of T (T) is one electrode of the liquid crystal capacitance (LC) and the auxiliary capacitance (SC). Liquid crystal capacity (LC)
The other electrode of is a common electrode on the opposite substrate side (not shown), and the other electrode of the auxiliary capacitance (SC) is a gate line (G0 to Gm-1) of the previous stage.

FIG. 7 is an enlarged plan view of a display pixel portion. A TFT is formed at an intersection where a gate line (17L) and a drain line (14L) are arranged orthogonally and surrounded by both lines (14L, 17L). The display electrode (14
P) is formed. The TFT is a positive stagger type in which a source / drain is arranged above the gate with a channel layer interposed therebetween. The extending portion (17C) extending from the gate line (17L) in the preceding stage with respect to the display electrode (14P) is disposed so as to overlap the display electrode (14P) to form a storage capacitor.

FIG. 8 is a sectional view taken along the line BB of FIG. On a transparent substrate such as a glass (10) is formed the light-shielding film such as Cr in a region corresponding to the TFT (11) is, on the entire surface is SiN _X is laminated over this by interlayer insulating film (13 ). A display electrode (14P) and a source electrode (14S), and a drain electrode (14D) and a drain line (14) are formed on the interlayer insulating film (13).
L) is formed of ITO. On the source and drain electrodes (14S, 14D), a-Si (15),
The gate insulating film (16) and the gate electrode (17G) are sequentially stacked to form a TFT. Gate insulation film (16)
Is made of SiN _x or the like, and the gate electrode (17G) is made of Al or the like integrally with the gate line (17L). An extension portion (17S) is superposed on the one end of the display electrode (14P) from the gate line (17L) via the a-Si (15) and the gate insulating film (16) to form an auxiliary capacitance. . The a-Si (15) and the gate insulating film (16) are formed in the same pattern as the gate wiring (17).
That is, by laminating a-Si, SiN _X, the Al in a continuous, are etched these with the same mask.

The ohmic contact between the a-Si (15) and the source and drain electrodes (14S, 14D) is formed as follows. First, when ITO, which is a wiring material for the source / drain, is formed into a film, sputtering is carried out using ITO to which a Group 5 element such as phosphorus is added as a target. After patterning this ITO film, by growing a-Si by plasma CVD, phosphorus in the ITO is simultaneously diffused to the a-Si side,
An N ⁺ type contact layer is formed at the interface.

From the above description, the number of masks required for manufacturing this TFT substrate is the patterning of Cr which becomes the light shielding film (11) and the ITO which becomes the source / drain wiring (14).
Patterning and Al to be the gate wiring (17)
The patterning is 3 sheets and the cost is low.

[0009]

Although the TFT substrate using the positive stagger type TFT can be manufactured by the photoetching process with three masks as described above, in the case of the additional capacitance type,
-Si (15) remains along the gate wiring (17L). Therefore, in the auxiliary capacitance section, the display electrode (14P)
And a drain line (14L) are connected by an a-Si (15), and a gate line (17L) and its extended portion (17C) are laminated via a gate insulating film (16) to form a TFT structure. . Normally, a-Si has a high resistance, but when the mobility rises and the resistance becomes low due to the rise of the gate signal, the display electrode (14P) and the drain line (14L) become conductive and the holding voltage of the liquid crystal capacitance changes. Will end up. Therefore, the extended portion (17C) to the display electrode (14P)
The gate line (17L) that provides the signal must be in the previous stage. That is, by changing the holding voltage at the end of the holding period, that is, immediately before rewriting in the next field, the change in the effective value of the holding voltage is suppressed, so that the scanning direction changes from top to bottom in FIG. Limited.

Further, even if the mobility of the a-Si (15) is increased by the incidence of light, the holding voltage is similarly changed.
It is not suitable for projection type applications such as projectors where the intensity of the light source is high. Further, the point defect due to the short circuit of the auxiliary capacitance portion is not noticeable as a black spot in the normally black mode, but is noticeable as a white spot in the normally white mode, which leads to deterioration of display quality.

An object of the present invention is to solve these problems and to provide a liquid crystal display device having a wide range of uses and a high yield.

[0012]

The present invention has been made to achieve this object. First, an auxiliary capacitor formed by etching a first metal film formed on a substrate. An electrode, a first insulating film formed to cover the auxiliary capacitance electrode, and a transparent conductive film formed on the first insulating film are etched to form an overlapping portion on the auxiliary capacitance electrode. A display electrode having the first capacitance, a drain line formed by etching the transparent conductive film, a semiconductor film sequentially stacked to cover the display electrode and the drain line, The thin film transistor is formed by etching a laminated body including an insulating film and a second metal film, and has a portion where the drain line and the display electrode are close to each other to form a thin film transistor. A gate line forming a second capacitor arranged in series with the first capacitor, the gate capacitor having a superimposing part on the electrode, and a combined capacitor of the first and second capacitors as an auxiliary capacitor. It is a liquid crystal display device having a different configuration.

Secondly, in the first configuration, the auxiliary capacitance electrode is provided in a region directly below the gate line. Thirdly, in the first configuration, the light shielding film is connected to the auxiliary capacitance electrode.

[0014]

In the first configuration, the floating auxiliary capacitance electrode is shared, and the first and second capacitances arranged in series with each other are formed at the respective overlapping portions of the display electrode or the gate line. Cs using the combined capacitance of both capacitances as an auxiliary capacitance without overlapping the display electrode and the gate line
The configuration is an on Gate method. Therefore, it becomes possible to form an auxiliary capacitance with an electrode arrangement in which the display electrode and the gate line are separated from each other in a plane, and the display electrode and the drain line are
The connection by a-Si is cut off, the rise of the gate signal does not affect the display electrode, and the scanning direction is not limited to one direction, and scanning can be performed in both the upper and lower directions.

Further, the insulation between the display electrode and the drain line suppresses the influence of the incident light. Furthermore, even if a short circuit occurs in the auxiliary capacitance portion due to a defect in the insulating film, the auxiliary capacitance electrode is in a floating state, and thus does not adversely affect the display. In the second configuration, the auxiliary capacitance electrode is provided immediately below along the gate line to increase the capacitance value of the second capacitance, and thus the auxiliary capacitance is connected by the series combination of the first capacitance and the second capacitance. The reduction of the capacitance value of the capacitance is prevented.

In the third configuration, since the voltage of the auxiliary capacitance electrode is set according to the signal of the gate line due to the electric field effect of the first capacitance, the voltage of the light shielding film is changed by connecting the light shielding film to the auxiliary capacitance electrode. It changes according to the behavior of the gate line. Therefore, the thin film transistor has a double gate structure in which an original gate electrode and a light shielding film whose voltage is set depending on the gate voltage are arranged above and below the semiconductor layer, and the switching characteristic of the transistor is improved.

[0017]

Embodiments of the present invention will now be described with reference to the drawings. The same reference numerals are used for the same reference numerals as in the conventional example. FIG. 1 is an equivalent circuit diagram of an embodiment of the present invention. The gate lines (G1 to Gm) and the drain lines (D1 to Dn) are arranged at right angles to each other, and the gate electrodes and the drain electrodes are respectively arranged at the intersections of the gate lines (G1 to Gm) and the drain lines (D1 to Dn).
TFT (T) connected to n) is formed. Each TF
The source of T (T) is one electrode of the liquid crystal capacitance (LC) and the auxiliary capacitance, and the other electrode of the liquid crystal capacitance (LC) is a common electrode (not shown) on the counter substrate side. The auxiliary capacitance is a combined capacitance of two capacitors (SC1, SC2) arranged in series with a floating auxiliary capacitance electrode (SE) in common, and the other electrode of the capacitor (SC1) is a TFT.
It is connected to the source of (T) and the other electrode of the capacitor (SC2) is connected to the adjacent gate lines (G0 to Gm-1).

FIG. 2 is an enlarged plan view of the display pixel portion. A TFT is formed at an intersection where a gate line (17L) and a drain line (14L) are arranged orthogonally and surrounded by both lines (17L, 14L). The display electrode (14
P) is formed. The display electrode (14P) and the auxiliary capacitance electrode (12), which is insulated from the gate line (17L) adjacent to the display electrode (14P), are commonly overlapped with the display electrode (14P) and the gate line (17L) to form an auxiliary capacitance. ing. In particular, the auxiliary capacitance electrode (12) is connected to the gate line (17).
The capacitance value is increased by arranging just below L) and increasing the overlapping area with the gate line (17L).

A detailed description will be given below with reference to FIG. 3 showing a cross section taken along the line AA of FIG. On a transparent substrate (10) such as glass, a light shielding film (11) and an auxiliary capacitance electrode (12) are formed by, for example, Cr sputtering and photoetching. The light-shielding film (11) corresponds to the TFT, and the auxiliary capacitance electrode (12) is the display electrode (14
P) and the gate line (17L) in common.

SiN _x is laminated on the entire surface covering these by, for example, CVD to form an interlayer insulating film (13) which also serves as a dielectric layer of an auxiliary capacitance. Interlayer insulation film (1
3) A display electrode (14P), a part of which is superposed on the auxiliary capacitance electrode (12), a source electrode (14S) and a drain electrode (14D) which are integral with the display electrode (14P), are formed on the auxiliary electrode by sputtering and photoetching of ITO. Drain line (14
L) is formed.

Here, although the ITO is formed by sputtering, it is carried out by using ITO in which a Group 5 element such as phosphorus is added as a target to make the source / drain wiring (14) contain phosphorus. ing. On the source and drain electrodes (14S, 14D), a-Si (15), a gate insulating film (16), and a gate electrode (17G) are sequentially stacked to form a TFT. The gate electrode (17G) is
The gate line (17L) is formed integrally with Al or the like, and the gate line (17L) is partially formed by the auxiliary capacitance electrode (1
It is superimposed on 2). The gate insulating film (16) is, for example, SiN _x . These a-Si, SiN _X, Al is deposited in a continuous, and by patterning the same mask.

Although a-Si is formed by plasma CVD,
At this time, the phosphorus in the ITO described above grows simultaneously with the a-S
Since it diffuses to the i side and an N ⁺ type contact layer is formed at the interface, ohmic contact of the TFT can be obtained.
In the present invention, the storage capacitor electrode (12) is thus arranged so as to be commonly overlapped with the display electrode (14P) and the gate line (17L), and the capacitances (SC1, SC2) formed by the respective overlapping portions are arranged. The series combined capacitance functions as an auxiliary capacitance. That is, through the auxiliary capacitance electrode (12),
The combined capacitance in which the respective capacitances (SC1, SC2) between the display electrode (14P) and the gate line (17L) are connected in series is C.
The configuration is driven by the sonGate method.

As a result, as shown in FIG. 2, the display electrode (14P) and the gate line (17L) can be formed with an electrode arrangement in which the display electrode (14P) and the gate line (17L) are separated from each other in a plane. 14P) and the drain line (14L) adjacent thereto are not connected even by the a-Si (15) remaining in the lower layer of the gate line (17L). Therefore, a-Si (15) which is the channel layer of the parasitic TFT
Is connected to the drain line (14L) but not to the display electrode (14P), and the TFT structure is eliminated.
As a result, the display electrode (14
Since there is no effect on P), the scanning direction is not limited,
It can be set in both upper and lower directions in FIG.

Similarly, even if the resistance of a-Si is lowered by the incidence of light, the display electrode (14P) and the drain line (17) are
Since the insulation of L) is maintained, it can be applied to projection type applications such as a projector having a high light source intensity. Further, since the auxiliary capacitance electrode (12) is in a floating state, even if either the display electrode (14P) or the gate line (17L) is short-circuited due to a defect in the interlayer insulating film (13), the capacitance becomes only one. There is no change in the driving of the Cs on Gate system, and the display is not affected.

Further, the auxiliary capacitance electrode (12) is a light-shielding film (1
At the same time as 1), since it is formed by etching of Cr, the number of masks required for manufacturing is 3, and the cost is low as in the conventional example. Next, another embodiment according to the present invention will be described. FIG. 4 is a plan view thereof. The difference from the above-mentioned embodiment is that the light-shielding film (11) is connected to the auxiliary capacitance electrode (12) and used for the second gate. The auxiliary capacitance electrode (12) is arranged so as to overlap directly under the gate line (17L), and the value of the auxiliary capacitance (SC2) is large. Therefore, by setting the gate ON level sufficiently high, the voltage of the auxiliary capacitance electrode (12) is increased with the rise of the gate signal although the influence of the coupling of the auxiliary capacitance (SC1) and the liquid crystal capacitance (LC) is affected. Rising enough,
Therefore, the voltage of the light shielding film (11) can be raised to the threshold level of the TFT.

With such a configuration in which the voltage of the light shielding film (11) is set in synchronization with the gate signal, the TFT is turned on.
The / OFF characteristic can be improved. That is, as shown in FIG. 5, by using the light shielding film (11) as the second gate, the insulating films (13, 13) are formed above and below the a-Si (15), respectively.
It becomes a double gate structure in which the gates (17G, 11) are arranged so as to sandwich 16). Therefore, due to the rising of the gate signal, carriers are induced in the a-Si (15) at each of the two interfaces with the insulating film (13, 16) to form a channel layer, and the source / drain have these two paths. Since conduction occurs at (a, b), the ON resistance decreases. On the contrary, the disappearance of the channel layer is caused by two gates (17G, 1
The OFF resistance increases because it is performed by the fall of the signal of 1).

As described above, by connecting the light shielding film (11) to the auxiliary capacitance electrode (12) and making the TFT a double gate structure, the ON current is increased and the leakage OF is caused.
The F current decreased and the ON / OFF ratio increased. Further, since the electric field is applied to the a-Si by the upper and lower gates (17G, 11), the control of the generation and disappearance of the electric field is improved, and the switching characteristics of the TFT are improved.

[0028]

As is apparent from the above description, in the additional capacitance type liquid crystal display device using the positive staggered TFT according to the present invention, the connection between the display electrode and the drain line by a-Si is cut off, so that the display electrode and the drain line are bidirectionally moved. Thus, a liquid crystal display device with a high yield is obtained, which is capable of being used for a projection type such as a projector having a high light source intensity and has no adverse effect on the display due to a short circuit of the auxiliary capacitance.

Further, without increasing the manufacturing cost,
The TFT can be formed in a double gate structure, and the switching characteristics are improved.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is an enlarged plan view of a liquid crystal display device according to an embodiment of the present invention.

3 is a sectional view taken along the line AA of FIG.

FIG. 4 is an enlarged plan view of a liquid crystal display device according to another embodiment of the present invention.

FIG. 5 is a cross-sectional view of a TFT showing the function and effect of another embodiment of the present invention.

FIG. 6 is an equivalent circuit diagram of a conventional liquid crystal display device.

FIG. 7 is an enlarged plan view of a conventional liquid crystal display device.

8 is a cross-sectional view taken along the line BB of FIG.

[Explanation of symbols]

 G1 to Gm gate lines D1 to Dn drain lines T TFT LC liquid crystal capacitance SC auxiliary capacitance SE auxiliary capacitance electrode 10 transparent substrate 11 light shielding film 12 auxiliary capacitance electrode 13 interlayer insulating film 14 source / drain wiring 15 a-Si 16 gate insulating film 17 Gate wiring

Claims (3)

[Claims] 1. A storage capacitor electrode and a light-shielding film formed by etching a first metal film stacked on a substrate, and a first stacking so as to cover the storage capacitor electrode and the light-shielding film.
An insulating film, a display electrode formed by etching a transparent conductive film formed on the first insulating film, and partially overlapping the auxiliary capacitance electrode to form a first capacitance; Formed by etching the conductive film,
A drain line having a portion close to the display electrode on the light-shielding film, and a stacked body including a semiconductor film, a second insulating film, and a second metal film that are sequentially stacked to cover the display electrode and the drain line. Is formed by etching, and a thin film transistor is formed by having a superimposing portion in the vicinity of the drain line and the display electrode, and has a superimposing portion in the auxiliary capacitance electrode in series with the first capacitance. And a gate line forming a second capacitor connected to the liquid crystal display device, the liquid crystal display device including a combined capacitor of the first and second capacitors as an auxiliary capacitor. 2. The liquid crystal display device according to claim 1, wherein the auxiliary capacitance electrode is provided in a region directly below the gate line. 3. The liquid crystal display device according to claim 1, wherein the light shielding film is connected to the auxiliary capacitance electrode.