JPH07263968A - Amplifying circuit - Google Patents

Abstract

PURPOSE:To control the gain without degrading the output return loss for a strong input signal. CONSTITUTION:The source of an MESFET 8 for compensation is grounded through a bypass capacitor 6, and its gate is grounded through a resistance 7, and its source and drain are connected through a resistance 10. The drain or the MESFET 8 is connected to the drain of an MESFET 1 for signal amplification through a bypass capacitor 16, and the source of the MESFET 8 is connected to the gate of the MESFET 1 through a resistance 9, ana the voltage applied to a gain control terminal 11 is changed to control the gain. When the gain control voltage is so set that the MESFET 1 is operated near the threshold voltage for the purpose of reducing the gain, the output impedance of the MESFET 1 is raised because the internal parasitic resistance is increased. Since the MESFET 8 is turned on at this time, the change of the output impedance of the MESFET 1 is cancelled to prevent the degradation of the output return loss.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier circuit which requires gain control and is composed of a semiconductor integrated circuit using, for example, a Schottky gate field effect transistor.

[0002]

2. Description of the Related Art Semiconductor integrated circuits using field effect transistors are under development for high frequency circuits in the fields of television and communication. An amplifier circuit that requires gain control is one of the semiconductor integrated circuits. FIG. 2 is a circuit diagram showing a conventional amplifier circuit using a Schottky gate field effect transistor (hereinafter referred to as MESFET) as a field effect transistor. In this amplifier circuit, as shown in FIG. 2, a gain control terminal 11 is provided at the gate terminal of the signal amplifying MESFET 1 via a resistor 2 for applying a gate bias voltage, and an input coupling capacitor is provided at the gate terminal of the signal amplifying MESFET 1. 3 is provided with a signal input terminal 12, a signal amplification MESFET 1 has a drain terminal provided with a signal output terminal 13 via an output coupling capacitor 4, and a signal amplification MESFET 1 has a drain terminal applied with a drain bias voltage application choke coil 5. Power supply voltage application terminal 1 via
4 is provided, and the source terminal of the signal amplification MESFET 1 is grounded.

This amplifier circuit controls the gain by changing the gate bias voltage (gain control voltage) applied to the gain control terminal 11 in order to keep the output signal strength constant with respect to the change of the input signal strength. There is.

[0004]

The amplifier circuit having the above-described structure is designed to make the output signal strength constant with respect to the change of the input signal strength, or change the output signal strength with respect to the constant input signal strength. If the need arises, the gain needs to be changed. In the amplifier circuit configured as described above, the gate bias voltage, which is the gain control voltage, is lowered to near the threshold voltage of the signal amplifying MESFET 1 in order to reduce the gain, but at this time, the following problems occur.
That is, the output impedance increases due to the change in the internal parasitic resistance of the signal amplifying MESFET 1, and the matching with the circuit in the next stage cannot be achieved.

Therefore, an object of the present invention is to provide an amplifier circuit capable of suppressing a change in output impedance and keeping the output impedance substantially constant regardless of a change in gain.

[0006]

SUMMARY OF THE INVENTION The present invention is intended to control the gain without changing the output impedance when a strong input signal is input. Therefore, the amplifier circuit of the present invention is configured as follows. First, in the amplifier circuit according to claim 1, an active circuit having a variable resistance function is connected between the output terminal of the signal amplification field effect transistor and the ground, and the signal is input to the gain control terminal of the signal amplification field effect transistor. When the gain control voltage changes to increase the gain of the signal amplification field effect transistor, the variable resistance increases when the resistance value is changed by the variable resistance function and decreases when the gain of the signal amplification field effect transistor decreases. The active circuit is controlled to reduce the resistance value due to the function.

According to a second aspect of the present invention, in the amplifier circuit according to the first aspect, the variable resistance function of the active circuit is configured by using a compensation field effect transistor operating in a non-saturation region as a resistor. The amplifying circuit according to claim 3 is the amplifying circuit according to claim 2 in which the active circuit is configured as follows. That is, the drain terminal of the compensation field effect transistor is connected to the drain terminal of the signal amplification field effect transistor via the first capacitance, and the source terminal of the compensation field effect transistor is grounded via the second capacitance. A first resistor is connected in parallel between the drain terminal and the source terminal of the compensation field effect transistor,
The gate terminal of the compensation field effect transistor is grounded via the second resistor, and either the drain terminal or the source terminal of the compensation field effect transistor is gated via the third resistor. It is connected to the terminal.

[0008]

According to the structure of claim 1, when the gain control voltage is changed to reduce the gain when a strong input signal is applied, the resistance value by the variable resistance function by the active circuit connected between the signal output terminal and the ground is interlocked. The change in the output impedance of the amplifier circuit due to the decrease in the gain is canceled out, and the change in the output impedance due to the change in the gain is suppressed.

In the amplifier circuit according to the second aspect of the present invention, since the variable resistance function of the active circuit for canceling the change in the output impedance by the signal amplifying field effect transistor is realized by the compensating field effect transistor, it is monolithic. Is possible. In the amplifier circuit according to the third aspect, the control of the resistance value by the variable resistance function of the active circuit can also be performed by the gain control voltage for controlling the gain of the field effect transistor for signal amplification.

[0010]

Embodiments of the present invention will be described in detail below with reference to FIGS. As shown in FIG. 1, an amplifier circuit requiring gain control according to an embodiment of the present invention has a gate bias at a gate terminal of a signal amplifying MESFET (corresponding to a signal amplifying field effect transistor in claims). Gain control terminal 11 via resistor 2 for voltage application
And a signal input terminal 12 is provided at the gate terminal of the signal amplification MESFET 1 via the input coupling capacitor 3.
A signal output terminal 13 is provided at the drain terminal of the signal amplification MESFET 1 via the output coupling capacitor 4, and a power supply voltage application terminal 14 is provided at the drain terminal of the signal amplification MESFET 1 via the drain bias voltage application choke coil 5. This is the same as in the conventional example of FIG. 2, and elements having the same function are designated by the same reference numerals.

The difference from the conventional example of FIG. 2 is that M for signal amplification is used.
The point is that the source terminal 15 of the ESFET 1 is not fixed to the ground potential but can be set to an arbitrary potential and is grounded via the bypass capacitor 17 in terms of high frequency. Further, the source terminal of the compensating MESFET 8 is grounded via a bypass capacitor (corresponding to the second capacitance in the claims) 6,
Of the compensation MESFET is grounded via a resistor (corresponding to a second resistor in claims) 7
The drain terminal of 8 is connected to the drain terminal of the MESFET 1 for signal amplification (corresponding to the output terminal in the claims) via a bypass capacitor (corresponding to the first capacitance in the claims) 16 for compensation. MESF
A source terminal and a drain terminal of the ET8 are connected to each other via a resistor (corresponding to a first resistor in the claims) 10 and a source terminal of the compensation MESFET 8 is connected to the resistor (the third resistor in the claims). Equivalent to resistance)
The gate terminal (corresponding to the gain control terminal in the claims) of the signal amplifying MESFET 8 is connected via 9.

By the way, the source potential of the signal amplifying MESFET 1 in this amplifying circuit is Vss, and the signal amplifying ME is
The threshold voltage of the SFET1 and the compensation MESFET8 is Vp, and the gain control voltage applied to the gain control terminal 11 is Vag.
Then, Vgs of MESFET1 (hereinafter referred to as Vgs1) becomes Vgs1 = Vagc-Vss, and Vgs of MESFET8 (hereinafter referred to as Vgs8) becomes Vgs8 = -Vagc. When it is necessary to keep the output signal strength constant with respect to the change of the input signal strength, or to change the output signal strength with respect to the constant input signal strength, it is necessary to change the gain.

Vp = to MESFET1 and MESFET8
When a FET of -1V is used and Vss = 1.8V is fixed, the gain of MESFET1 is Vag as shown in FIG.
It can be lowered by lowering c. However, by lowering Vagc, as shown in FIG. 5, the drain conductance, which is the reciprocal of the resistance between the drain and the source, decreases, and the output impedance of the MESFET 1 increases. On the other hand, the resistance value (R _ON ) in the non-saturation region of the compensation MESFET 8 is Vag as shown in FIG.
By lowering c, the output impedance as a whole is reduced to V by the change in the output impedance of MESFET1 being offset by the change in R _ON of MESFET8.
It is possible to prevent deterioration of output return loss caused by changing agc. For example, power supply voltage 5V, current consumption 1
0mA or less, frequency 1-2GHz, gain + 10-
S2 which is an index of output impedance in the range of 20 dB
The change of 2 could be suppressed to 1 dB or less.

FIG. 3 shows changes in output impedance with respect to changes in gain of the conventional amplifier circuit and the amplifier circuit of the embodiment of the present invention. It can be seen from FIG. 3 that the amplifier circuit according to the embodiment of the present invention has improved characteristics when a strong input signal is applied. In the above embodiment, the compensation MES is used.
The source terminal of the FET 8 is connected to the ME for signal amplification via the resistor 9.
Although it was connected to the gate terminal of SFET1, instead of this, the drain terminal of MESFET8 for compensation was used for signal amplification MES.
It may be connected to the gate terminal of FET1.

[0015]

According to the amplifier circuit of the first aspect, an active circuit having a variable resistance function is added, and the gain control voltage input to the gain control terminal of the signal amplification field effect transistor is the signal amplification field effect. Active so as to increase the resistance value by the variable resistance function when the gain of the transistor is increased and decrease the resistance value by the variable resistance function when the gain of the signal amplification field effect transistor is changed. Since the circuit is controlled, it is possible to reduce the gain without changing the output impedance.

According to the amplifying circuit of the second aspect, since the compensating field effect transistor is used to realize the variable resistance function, the amplifying circuit can be monolithic on one chip. According to the amplifier circuit of the third aspect, it is possible to control the gain control and the resistance value by the variable resistance function of the active circuit with only one positive power supply.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an amplifier circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of a conventional amplifier circuit.

FIG. 3 is a characteristic diagram showing output impedance with respect to a change in gain of a conventional amplifier circuit and an amplifier circuit according to an embodiment of the present invention.

FIG. 4 is a characteristic diagram showing a change in gain with respect to a change in Vagc.

FIG. 5 is a characteristic diagram showing changes in drain conductance with respect to changes in Vagc.

FIG. 6 is a characteristic diagram showing changes in R _ON with respect to changes in Vagc.

[Explanation of symbols]

 1 MESFET for signal amplification 2 Resistor 3 Capacitor for input coupling 4 Capacitor for output coupling 5 Drain bias voltage application choke coil 6 Bypass capacitor 7 Resistor 8 Compensation MESFET 9 Resistor 10 Resistor 11 Gain control terminal 12 Signal input terminal 13 Signal output terminal 14 Power supply voltage application terminal 15 Source terminal 16 Bypass capacitor

Claims (3)

[Claims] 1. An active circuit having a variable resistance function is connected between an output terminal of a signal amplification field effect transistor and a ground, and a gain control voltage inputted to a gain control terminal of the signal amplification field effect transistor is When the gain of the signal amplifying field effect transistor is changed to increase, the resistance value by the variable resistance function is increased, and when the gain of the signal amplifying field effect transistor is changed to decrease, the variable resistance function is changed. An amplifier circuit characterized in that the active circuit is controlled so as to reduce the resistance value of the active circuit. 2. The amplifier circuit according to claim 1, wherein the variable resistance function of the active circuit is configured by using a compensation field effect transistor operating in a non-saturation region as a resistor. 3. The active circuit has a drain terminal of the compensating field effect transistor connected to a drain terminal of the signal amplifying field effect transistor via a first capacitor, and a source terminal of the compensating field effect transistor being a second terminal. Grounded through the capacitance of, and connecting a first resistor in parallel between the drain terminal and the source terminal of the compensation field effect transistor,
A gate terminal of the compensating field effect transistor is grounded via a second resistor, and one of a drain terminal and a source terminal of the compensating field effect transistor is a third terminal.
3. The amplifier circuit according to claim 2, wherein the amplifier circuit is connected to the gate terminal of the signal amplification field effect transistor via the resistor of FIG.