JPH07263590A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize a multi-chip module type semiconductor device having a good yield of its plating process, by giving the cheap means for restricting the moving range of an armor-plating probe. CONSTITUTION:Outside a seal ring, a plating-electrode pad 13 is provided on the same principal surface of a ceramic multilayer board 1 as a thin film multilayer interconnection part 5 is formed, and in the periphery of the plating- electrode pad 13, guides 14 for a plating probe are formed by the use of the same material and the same process as the plating-electrode pad 13, when the thin film multilayer interconnection part 5 is formed. Thereby, the plating- electrode pad 13 is prevented from generating a contact failure due to its embedment in a polyimide, and also, the guides 14 for a plating probe are manufactured at a low price. As a result, the yield of the plating process of a semiconductor device is improved, and its cost can be reduced conjointly with the cheap guides 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and in particular, a semiconductor element is mounted and connected to a circuit board in which a thin film multi-layer wiring portion is formed on a ceramic multi-layer board, sealed with a metal cap, and then subjected to exterior plating. The present invention relates to a semiconductor device.

[0002]

2. Description of the Related Art In recent years, as the speed of computers and communication equipment has increased, the delay time caused by the spatial distance between semiconductor elements has become a problem. In the method of packaging individual semiconductor elements and mounting them on a printed board. It is no longer able to exert sufficient performance. As one of the methods for solving this problem, a multi-chip module (M
A semiconductor device called CM) is known.

Multi-chip modules are generally classified according to the type of substrate used. MCM-C, a thin film, which uses a ceramic multilayer substrate in which wiring is provided on a ceramic green sheet, and these are laminated and co-fired. There is MCM-D using a multilayer substrate. Above all, MCM-
D is drawing attention from the viewpoint of electrical characteristics and wiring density.
In the case of MCM-D, a base substrate that serves as a base is required to form thin film wiring, and a silicon wafer, a metal plate such as aluminum, or a ceramic substrate such as alumina or aluminum nitride is used as the base substrate. When a ceramic substrate is used, wiring can be formed inside the base substrate, and the base substrate can also serve as a package, so that the mounting density is improved. This structure is particularly called MCM-D / C. ing.

FIG. 6 is a partially cutaway perspective view showing a typical structure of this MCM-D / C, and FIG. 7 is a line AA of FIG.
It is the thing which shows the principal part of sectional drawing by a line. In both figures, reference numeral 21 denotes a ceramic multilayer substrate, inner layer wiring 22, and via holes 23 for connecting the surface and the inner layer wiring or between the inner layer wirings.
Is formed, and an external terminal 24 connected to a part of the via hole 23 is disposed on the lower surface thereof. A thin film multilayer wiring portion 25 is formed at the center of the upper surface of the ceramic multilayer substrate 21, and a semiconductor element 26 is mounted thereon and connected to the thin film multilayer wiring portion 25 by a bonding wire 27.

A seal ring 28 surrounding the thin film multilayer wiring portion 25 is fixed to the base electrode 29 by brazing or the like, and the peripheral edge of the metal cap 30 is joined to the seal ring 28 by welding or the like. (The metal cap 30 is not shown in FIG. 6). Reference numeral 31 denotes a plating electrode pad for electroplating the metal cap 30 and the seal ring 28 exposed on the periphery thereof, which is connected to the seal ring 28 via the inner layer wiring 22 and the via hole 23. KOV or the like is usually used for the metal cap 30 and the seal ring 28, and gold plating or tin plating is applied to improve the weather resistance of the surface including the welded portion.

FIG. 8 is a cross-sectional view of an essential part showing an embodiment of this plating. The same parts as those in FIG. 7 are designated by the same reference numerals.
In FIG. 8, reference numeral 32 denotes a plating probe for applying an electric potential to the object to be plated, which is abutted on the plating electrode pad 31 and fixed using a fixture (not shown).
Is on the inner layer wiring surface that is one step lower than the surface of the ceramic multilayer substrate 21, and the side wall thereof limits the movement range of the plating probe 32 and prevents the plating probe 32 from coming off from the plating electrode pad 31. .

[0007]

However, in the above-mentioned plated electrode pad, the plated electrode pad 31 is filled with polyimide during film formation by spin coating of polyimide, for example, in the step of forming the thin film multilayer wiring portion 25, Since the depth was about 400 μm, the polyimide could not be sufficiently removed, and contact failure sometimes occurred. Further, there is a problem that a uniform film cannot be formed during spin coating due to the influence of the depression of the plated electrode pad 31.

As a means for solving these problems, a method of providing a plating electrode pad on the surface of the ceramic multi-layer substrate 21 and not providing a recess is conceivable. However, the plating probe applied to the plating electrode pad comes off during the electroplating process. However, there is a problem that the yield of the plating process is significantly reduced.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide an inexpensive probe movement range limiting means for plating and to realize a multi-chip module type semiconductor device having a good yield in the plating process. is there.

[0010]

In order to achieve the above object, according to the present invention, a seal ring fixed to one main surface of a ceramic multilayer substrate and a thin film multilayer wiring portion formed in an area inside the seal ring. A semiconductor element mounted and connected on the thin-film multilayer wiring section or on the ceramic multilayer substrate in the seal ring; and a metal cap whose peripheral portion is sealed by the seal ring to seal the semiconductor element, An electrode pad for plating formed outside the seal ring on the same main surface of the ceramic multilayer substrate and electrically connected to the seal ring, the metal cap and a seal ring on the outer periphery of the sealing portion. A plating layer electroplated using the plating electrode pad, and means for limiting the movement range of the plating probe provided around the plating electrode pad. It is characterized in that.

In addition, the moving range limiting means is formed of the same material as the thin film multilayer wiring portion, the insulating material of the thin film multilayer wiring portion is polyimide, and the conductor wiring material is mainly copper. Is characterized by.

[0012]

In the present invention, the probe guide is formed around the plating electrode pad using the same material as that of the thin film multi-layer wiring portion when forming the thin film multi-layer wiring portion, and used as the movement range limiting means of the plating probe. When the plating probe comes into contact with the plating electrode pad, this probe guide limits the moving range of the plating probe and secures a reliable contact. Since it is manufactured at the same time when the thin-film multilayer wiring portion is formed, the plated electrode pad is not filled with polyimide and the cost for manufacturing the probe guide is not particularly increased. Further, since there is no depression on the surface of the ceramic multilayer substrate during the spin coating of polyimide, a uniform film thickness can be obtained and the quality is improved.

[0013]

Embodiments of the present invention will be described below with reference to the drawings. Since the basic configuration of the multi-chip module of the present invention is the same as that of FIG. 6, a perspective view is omitted, and FIG. In FIG. 1, reference numeral 1 denotes a ceramic multilayer substrate using alumina, aluminum nitride or the like as an insulating material, and inner layer wiring 2 made of tungsten or the like and via holes 3 for connecting between the surface and the inner layer wiring or between inner layer wirings are formed on the lower surface thereof. An external terminal 4 connected to a part of the via hole 3 is provided in the. The external terminals 4 are flat-plate terminals connected by brazing or the like, but may be brazing round pins as shown in FIG. A thin film multilayer wiring portion 5 is formed in the center of the upper surface of the ceramic multilayer substrate 1, and a semiconductor element 6 is mounted on the thin film multilayer wiring portion 5 and is connected to the thin film multilayer wiring portion 5 by a bonding wire 7. In the thin-film multi-layer wiring portion 5, conductor wiring layers 8 made of copper or the like and insulating layers 9 made of polyimide or the like are alternately laminated and connected to each other via via holes 10.

A seal ring 11 surrounding the thin film multi-layer wiring portion 5 is fixed by brazing or the like, and the peripheral portion of the metal cap 12 is joined to this by welding such as laser or seam welding. . In some cases, soldering is used instead of welding. 13 is a metal cap 1
2 and a plating electrode pad for electroplating the seal ring 11 exposed on the periphery thereof, which is connected to the seal ring 11 via the inner layer wiring 2 and the via hole 3. The seal ring 11 and the metal cap 12 are usually made of KOV, 42Ni-Fe alloy or the like, and are gold-plated or tin-plated or solder-plated to improve the weather resistance of the surface including the welded portion. Reference numeral 14 is a probe guide for applying a plating probe to the plating electrode pad 13. The plated electrode pads 13 may be formed at any position outside the seal ring 11, and the number of the plated electrode pads 13 is not limited to one and may be four at four corners. FIG. 2 is a cross-sectional view of an essential part showing the embodiment of this electroplating. Since the same parts as those in FIG. In FIG. 2, reference numeral 17 denotes a plating probe for applying an electric potential to the object to be plated, which abuts on the plating electrode pad 13 and is fixed by a fixture (not shown). A probe guide 14 formed of a material (a conductor mainly composed of polyimide and copper) is formed, and this probe guide 14 is used for the plating probe 1.
The moving range of 7 is limited to prevent the plating probe 17 from coming off the plating electrode pad 13.

The probe guide 14 can be manufactured at the same time as the formation of the thin film multilayer wiring portion in the following manner. That is, surface pretreatment is performed on one main surface of the ceramic multilayer substrate 1, and a first conductor layer of barrier metal-Cu-barrier metal is formed on the entire surface of the substrate by vapor deposition or sputtering. The barrier metal is used to improve the adhesive strength between Cu and polyimide and to prevent Cu from being attacked by the varnish that is the polyimide precursor.
Can be used.

Next, a photoresist is spin-coated, exposed and developed, parts other than a desired pattern are removed by etching, and the photoresist is peeled off to form a first conductor wiring layer. At this time, the connection portion 15 of the thin film multilayer wiring portion to the ceramic multilayer substrate, the base electrode 16 for mounting the seal ring, and the plating electrode pad 13 are simultaneously formed. Next, a photosensitive polyimide is spin-coated, exposed, and developed to form a via hole in the thin-film multilayer wiring section 5 and remove the polyimide other than the thin-film multilayer wiring section, and then cured to form a first insulating layer. At this time, polyimide is left around the plating electrode pad 13 for the probe guide 14. Subsequently, the thin film multilayer wiring portion 5 is formed by repeating these conductor layer and insulating layer forming processes a predetermined number of times, and the probe guide 14 is formed by stacking conductor layers and insulating layers on the probe guide 14 portion in the same manner. It is formed. The thin-film wiring part consists of 6 conductor layers and 5 insulating layers, and the average film thickness is 7 μm for conductor layers and 10 μm for insulating layers.
Then, a guide having a height of 92 μm can be formed.

A plan view of the guide 14 in the above embodiment is shown in FIG. 3 (a), and a sectional view thereof is shown in FIG. 3 (b). It is formed in a circular shape in plan view, and the diameter of the plating electrode pad 13 is
The outer diameter of the probe guide 14 was 0.5 mm and 1.0 mm. In this example, the guide 14 is adjacent to the plating electrode pad 13, but a part of the probe guide 14 may hang on the peripheral edge of the plating electrode pad 13 as shown in FIG.
With such a configuration, even when polyimide holes are formed by etching, the surface of the ceramic multilayer substrate is not exposed in the probe guide 14 due to overetching.

The planar shape of the probe guide 14 depends on the shape of the tip of the plating probe, and the plating electrode pad is completely surrounded by a polygon represented by the quadrangle of FIG. In which the plated electrode pad is not completely surrounded like the U-shape or the U-shape in b), FIG. 5 (c)
Alternatively, a rod-shaped guide may sandwich the plated electrode pad. Further, when the tip of the plating-like probe is divided into two pieces, it may be formed into an eight shape as shown in FIG. 5D so that it can be confirmed that the two contact points are surely contacted.

Further, in the above embodiment, the probe guide 14 is formed by laminating the conductors mainly composed of polyimide, which is a constituent material of the thin film multilayer wiring portion, and copper, but only one of them may be used. However, in order to secure the height of the probe guide, it is desirable to use both in combination.

In addition, although the above-mentioned embodiment has exemplified the multi-chip module, it goes without saying that the number of semiconductor elements may be one. Further, the semiconductor element is not limited to be mounted on the thin film multilayer wiring portion, but may be directly mounted on the ceramic multilayer substrate in the seal ring.

[0021]

As described above, according to the present invention, the plating electrode pad is provided on the main surface of the same ceramic multilayer substrate where the thin film multilayer wiring portion is formed outside the seal ring, and the plating electrode pad is provided around the plating electrode pad. A guide for a plating probe is simultaneously formed by using the same material when forming the thin film multilayer wiring part.

Therefore, the plated electrode pad is not buried in the polyimide to cause a contact failure, and the probe guide can be manufactured at low cost. As a result, the yield of the plating process is improved, and the cost of the semiconductor device can be reduced in combination with the inexpensive probe guide. Further, the problem of coating unevenness at the time of spin coating of polyimide is eliminated because the surface of the ceramic multilayer substrate has no depression, and the quality is improved.

[Brief description of drawings]

FIG. 1 is a sectional view of a main part of a multi-chip module according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of essential parts around a plating electrode pad according to an embodiment of the present invention.

3A and 3B show a probe guide for plating according to an embodiment of the present invention, in which FIG. 3A is a plan view and FIG. 3B is a sectional view.

FIG. 4 is a cross-sectional view showing another configuration example of the probe guide according to the embodiment of the invention.

FIG. 5 is a plan view showing another configuration example of the probe guide according to the embodiment of the invention.

FIG. 6 is a partially cutaway perspective view showing a configuration of a typical multichip module.

FIG. 7 is a sectional view of a main part of a multi-chip module according to a conventional technique.

FIG. 8 is a cross-sectional view of essential parts around a plating electrode pad according to a conventional technique.

[Explanation of symbols]

 1 ... Ceramic multilayer substrate 2 ... Inner layer wiring 3 ... Via hole 4 ... External terminal 5 ... Thin film multilayer wiring part 6 ... Semiconductor element 7 ... Bonding wire 8 ... Thin film conductor wiring layer 9 ... Thin film insulating layer 10 ... Thin film via hole 11 ... Seal Ring 12 Metal cap 13 Plating electrode pad 14 Probe guide 15 Thin film wiring connection (base electrode) 16 Seal ring Base electrode 17 Plating probe

Claims (4)

[Claims] 1. A seal ring fixed to one main surface of a ceramic multi-layer substrate, a thin-film multi-layer wiring section formed in an area inside the seal ring, and the thin-film multi-layer wiring section on or in the seal ring. A semiconductor element mounted and connected on the ceramic multilayer substrate, a metal cap whose peripheral portion is sealed to the seal ring to seal the semiconductor element, and the same main surface of the ceramic multilayer substrate outside the seal ring. And an electrode pad for plating that is electrically connected to the seal ring, and a plating layer electroplated on the seal ring around the metal cap and the sealing portion by using the electrode pad And a moving range limiting means for the plating probe provided around the plating electrode pad. 2. The semiconductor device according to claim 1, wherein the movement range limiting means is made of the same material as the thin film multilayer wiring portion. 3. The semiconductor device according to claim 2, wherein the insulating material of the thin film multilayer wiring portion is polyimide, and the wiring conductor is mainly made of copper. 4. The semiconductor device according to claim 1, wherein the metal cap is sealed by welding.