JPH07263283A - Manufacture of chip-shaped solid electrolytic capacitor - Google Patents

Abstract

PURPOSE:To manufacture a small and large-capacity chip-shaped solid electrolytic capacitor at low costs and without degrading electric characteristics such as a leakage current and a tan delta value. CONSTITUTION:A capacitor element 1 wherein a dielectric oxide film, an electrode layer, a first carbon layer and a cathode layer have been formed sequentially on the surface of an anode body which is provided with an anode extraction wire and which is composed valve-action metal is coated with an encapsulating resin. At this time, a second carbon layer 3 is formed in advance in a cathode extraction part for the capacitor element 1, and a fragile part is formed in the encapsulating resin 4. Then, the encapsulating resin 4 is removed selectively, and a cathode is extracted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a chip solid electrolytic capacitor.

[0002]

2. Description of the Related Art A conventional chip-shaped solid electrolytic capacitor is
As in the example of JP-A-5-90091, a cathode conductive material containing silver powder or the like as a main component is formed thickly on the cathode layer of the capacitor element, and a cut portion is provided in the exterior resin layer. The exterior conductive resin layer was broken off to expose the cathode conductive material, and then the anode metal layer and the cathode metal layer were formed.

[0003]

However, in the above-mentioned conventional chip-shaped solid electrolytic capacitor, since a thick cathode conductive material is formed on the cathode layer of the capacitor element, the thickness of this cathode conductive material is large in the capacitor element. However, there is a problem in that the capacity of the chip-shaped solid electrolytic capacitor is limited and the expansion of the storage capacity is hindered.

Further, since a conductive material containing silver powder as a main component is used as the cathode conductive material, there is a problem that it becomes an expensive chip-shaped solid electrolytic capacitor.

Further, since the cathode conductive material is in close contact with the capacitor element and has a certain degree of hardness, when the cutout is provided after coating the exterior resin, or when the cutout is performed at this cutout. However, there is a problem that stress is applied to the capacitor element through the cathode conductive material to increase the leakage current and tan δ value of the chip solid electrolytic capacitor.

The present invention solves the above-mentioned problems of the prior art by providing a chip-shaped solid electrolytic capacitor which is small in size, has a large capacity, and has an excellent volume effective utilization rate, at a low cost, and with a low leakage current.
It is an object of the present invention to provide a manufacturing method that can be manufactured without deteriorating the electrical characteristics of the tan δ value.

[0007]

[Means for Solving the Problems] To achieve the above object,
The chip solid electrolytic capacitor of the present invention is a capacitor in which a dielectric oxide film, an electrolyte layer, a first carbon layer, and a cathode layer are sequentially formed on the surface of an anode body made of a valve metal having an anode lead wire. When the exterior resin is coated after the device is constructed, a second cover is previously placed on the cathode extraction portion of the capacitor.
The carbon layer is formed beforehand, and by further providing the fragile portion where the resin layer is thin in the external resin, the external resin finger is selectively removed, and the second carbon layer is exposed to form the cathode metal. Layer and the anode metal layer are formed.

[0008]

According to the above construction, the second carbon layer is formed in the cathode extraction portion of the capacitor element to selectively remove the exterior resin, so that the inside of the second carbon layer or the second carbon layer is removed. The cathode can be led out at the interface between the carbon layer and the capacitor element or the exterior resin, and it is not necessary to form a thick cathode conductive material, and an inexpensive chip-shaped solid electrolytic capacitor having an excellent effective volume utilization can be obtained. .

Moreover, when the cathode of the capacitor is led out, the stress due to breaking off is absorbed by the second carbon layer and the influence on the capacitor element is eliminated, so that the leakage current and the tan δ electrical characteristics are deteriorated. It is possible to produce a chip-shaped solid electrolytic capacitor without doing so.

[0010]

Embodiment 1 An embodiment of the present invention will be described below with reference to the accompanying drawings.

FIG. 1 is a sectional view of a chip solid electrolytic capacitor according to one embodiment of the present invention, FIG. 2 is a sectional view of FIG. 1 during manufacture, and FIG. 3 is a perspective view of FIG. It is a thing.

In FIG. 2, the capacitor element 1 is
A dielectric oxide film, an electrolyte layer, a first carbon layer, and a cathode layer are sequentially formed on the surface of an anode body made of a valve metal having an anode lead wire 2.

Before the capacitor element 1 is packaged, a thin second cover is previously formed on the surface of the capacitor element 1 opposite to the surface to which the anode lead-out wire 2 is joined, that is, the portion where the cathode is to be taken out.
The carbon layer 3 is formed in advance, and the exterior resin layer 4 is formed of an epoxy resin by a transfer molding method so that the anode lead wire 2 is drawn out to one side, and the cathode extraction portion of the exterior resin 4 is formed. A fragile portion 5 having a small thickness of the exterior resin layer was provided on the above, and a thick resin excess portion 6 connected to the fragile portion was provided for exterior packaging.

Next, a force is applied to the resin surplus portion 6 to selectively remove the exterior resin with the fragile portion 5 of the exterior resin as a boundary to expose the second carbon layer 3. Then, a conductive paint is used to form the cathode underlayer 8a connected to the exposed surface of the capacitor element 1, while the anode lead wire 2 is roughened by sandblasting or the like, and the anode underlayer 8b connected thereto is formed. Was formed.

Subsequently, a plating layer is formed on the cathode underlayer 8a and the anode underlayer 8b, and the cathode metal layer 9 is formed.
a and the anode metal layer 9b were formed to produce a chip solid electrolytic capacitor.

In the above embodiment of the present invention, when a force is applied to the resin surplus portion 6 to selectively remove the exterior resin with the fragile portion 5 of the exterior resin as a boundary, the second carbon is used. Layer 3 remains thin on the cathode layer of capacitor element 1, but pure water,
The second carbon layer may be removed by washing with warm pure water, a solvent, ultrasonic cleaning, or a combination thereof.

[0017]

As described above, in the chip solid electrolytic capacitor of the present invention, when the cathode is taken out after coating the exterior resin layer 4, a thin second carbon layer is formed on the cathode taking-out portion of the capacitor element 1. 3 and the exterior resin layer 4
As a result of providing the fragile portion 5 of the exterior resin on the cathode extraction portion of the above, since the stress during the extraction operation during the cathode extraction is absorbed by the second carbon layer 3, the capacitor element 1 can be easily damaged and not damaged. It is possible to take out the cathode, and it is possible to manufacture a chip solid electrolytic capacitor without deteriorating electrical characteristics such as leakage current and tan δ.

Furthermore, since it is not necessary to form the cathode conductive material 7 containing silver powder or the like as a main component with a large thickness as in the conventional case, an inexpensive chip-shaped solid electrolytic capacitor having an excellent effective volume utilization can be obtained. be able to.

[Brief description of drawings]

FIG. 1 is a sectional view of a chip solid electrolytic capacitor showing an embodiment according to the method of the present invention.

FIG. 2 is a cross-sectional view of a chip solid electrolytic capacitor in the process of being manufactured, showing an embodiment according to the method of the present invention.

FIG. 3 is a perspective view of a chip solid electrolytic capacitor in the process of being manufactured, showing an embodiment according to the method of the present invention.

FIG. 4 is a sectional view of a chip-shaped solid electrolytic capacitor according to a conventional method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Capacitor element 2 Anode lead wire 3 Second carbon layer 4 Exterior resin layer 5 Fragile portion of exterior resin 6 Excess resin portion 7 Cathode conductive material 8a Cathode underlayer 8b Anode underlayer 9a Cathode metal layer 9b Anode metal layer

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01G 9/08 C

Claims (1)

[Claims] 1. A capacitor element is constructed by sequentially forming a dielectric oxide film, an electrolyte layer, a first carbon layer and a cathode layer on the surface of an anode body made of a valve metal having an anode lead wire. A second carbon layer is formed in the cathode extraction portion of the capacitor element, and the outer resin is selectively removed by providing a fragile portion to the outer resin, and thus the second carbon layer is formed. A method for producing a chip solid electrolytic capacitor, comprising forming an anode metal layer and a cathode metal layer after exposing the layers.