JPH07244564A - Disk array device - Google Patents

Abstract

PURPOSE:To improve the parallel operability of file accesses. CONSTITUTION:In the case of data reading, a controller 3 simultaneously executes parallel accesses to plural disk areas HD0 to HD4 in a file device 5. In the case of data writing, parity data stored in a chache memory 7 are read out simultaneously with data writing and new parity data are generated and written in the memory 7. Consequently queuing time due to an access to a disk area storing the parity data can be shortened and parallel processing can be accelerated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk array device having improved parallel operability of file access to a plurality of disk areas.

[0002]

2. Description of the Related Art Generally, a large amount of data is access-controlled in an information processing device. With the spread of online transaction relations and multi-user environments, parallelization of file access of such data is indispensable. For this purpose, a disk array device adopting a system called RAID architecture has been developed at the University of California, Berkeley, for example. Among them, the disk array device using the architecture called level 5 has an advantage that it can perform parallel file access operations and can simultaneously process a plurality of file access requests.

[0003]

The conventional disk array device as described above, however, has the following problems to be solved. In the disk array device, arbitrary write data is stored in or read from a plurality of disk areas that can be accessed simultaneously. At the time of this data storage, the already stored data and parity data are read and new parity data using the write data to be newly stored is generated. Therefore, since the file is accessed many times for the same disk area,
The parallel operation also interferes with other operations that access the same file, and the file access time becomes long as a whole. That is, when a data write request occurs, there is a problem that parallel operability of file access is reduced.

[0004]

The present invention adopts the following constitution in order to solve the above points. This disk array device includes a file device and a control device that accesses the file device. The file device is divided into a plurality of disk areas so that they can be accessed simultaneously. Each disk area is provided with a data block for storing write data and a parity block for storing parity data generated based on the write data stored in the plurality of data blocks. Further, the control device is provided with a cache memory for extracting and storing only the parity data from the file device.

[0005]

In the case of data reading, the control device performs simultaneous parallel access to a plurality of disk areas of the file device. On the other hand, at the time of writing, the parity data stored in the cache memory is read along with the data writing,
Generate new parity data and write it to the cache memory. As a result, the waiting time due to the access to the disk area in which the parity data is stored is reduced, and the parallel processing can be speeded up.

[0006]

The present invention will be described in detail below with reference to the embodiments shown in the drawings. FIG. 1 is a block diagram showing an embodiment of a disk array device of the present invention. This device includes a control device 3 connected to a host computer 1 via a system bus 2.
Is configured to control access to the file device 5. The file device 5 is divided into a plurality of disk areas for parallel control. Each disk area is composed of hard disks HD0 to HD4 in this example. In addition, these hard disks HD0-HD4
Interface bus 4-0 to 4-to controller 3
Connected by four.

The control device 3 includes a buffer memory 6 for temporarily storing data to be read from and written to the file device 5.
And a cache memory 7 for storing the parity data read from a predetermined area of the file device 5 and transcribed. Although the control device 3 actually includes a processor for controlling access to the file device 5, a program memory, and other hardware,
Since that portion has a conventionally well-known structure, illustration is omitted in this figure.

FIG. 2 shows a data writing format explanatory diagram of the disk array device. In the disk array device as shown in FIG. 1, specifically, data is written and access is controlled in the format as shown in FIG. First, the hard disks HD0 to HD4 that form a plurality of disk areas are
Each has a data block divided into sector 0, sector 1, sector 2, ...

For example, the hard disk HD0 has sector 0
, A data block d0 is provided, a sector 1 is provided with a data block d4, a sector 2 is provided with a data block d8, and a sector 3 is provided with a data block d12. A parity block dp4 is provided in sector 4. After sector 5,
Four data blocks are provided again. On the other hand, the hard disk HD1 has sector 0 as shown in this figure.
From sector 3 to sector 2, three data blocks d1 to d9 are provided, and in sector 3, a parity block dp3 is provided.
In the RAID architecture, as shown in this figure, parity blocks are sequentially provided in different sectors of each disk area.

The control device 3 shown in FIG. 1 accesses the file device 5 having such a configuration to read / write data. Therefore, when viewed from the host computer, as shown in the upper part of FIG.
From sector 1 to sector 2, it can be regarded as a storage device in which data is arranged in order. In this example, the size of one block that is read and written collectively by one access is expressed as one sector size.

FIG. 3 shows a data read operation sequence chart of the above device. The above device enables simultaneous access to a plurality of disk areas as described above. In the case of data reading, the actual processing is executed in the sequence shown in this figure. First step S
In 1, the host computer 1 requests the control device 3 to read the data blocks d0 and d1. In response to this, the control device 3 gives an instruction to read the sector 0 of the hard disk HD0 and the sector 0 of the hard disk HD1 in step S2. This instruction is sent to the file device 5.

In step S3, the file device 5 seeks and reads sector 0 of the hard disk HD0. Further, in step S4, seeking and reading are performed for sector 0 of the hard disk HD1. Next, in step S5, the data of the data block d0 is transmitted to the control device 3, and further in step S6,
The data of the data block d1 is transmitted to the control device 3.
In step S7, the control device 3 temporarily stores the data from the hard disks HD0 and HD1 in the buffer memory 6
Then, the data is transmitted to the host computer 1. As a result, the host computer 1 receives the data of the data blocks d0 and d1 in step S8, and the read process is completed.

The processing time T seconds from the block read request (step S1) to the data reception (step S8) as described above is normally several tens of milliseconds. In this example, two types of read requests are processed simultaneously, but a device provided with five disk areas as shown in FIG. 1 can process five types of read requests simultaneously.

FIG. 4 is an explanatory diagram of a parity data generation method. When the data write operation is performed, the parity data is rewritten each time the data is rewritten as follows. First, for example, it is assumed that the data block d6 of the hard disk HD2 shown in FIG. 2 is rewritten. The parity data of this data block d6 is stored in the parity block dp1 provided in the hard disk HD3. That is, the parity data before the update is the data blocks d4, d5, d as shown in the equation (1) of FIG.
It is generated by calculating the exclusive OR of the data of 6 and d7.

Here, the updated parity block is dp
1 *, and the updated data block is d6 *,
After the update, the parity data will be rewritten as shown in the equation (2) of FIG. In this case, by comparing the expressions (1) and (2), the contents of the actual parity block dp1 before update, the contents of the data block d6, and the contents of the new data block d6 * are exclusively excluded. It can be seen that a new parity block dp1 * can be obtained by performing arithmetic processing by logical sum.

In the actual updating operation, the parity block dp1 of the hard disk HD3 and the data block d6 of the hard disk HD2 shown in FIG. 2 are read in advance,
An operation of obtaining the parity block dp1 * and writing it to the hard disk HD3 is performed after the arithmetic processing as shown in the equation (3) of FIG. 4 is performed together with the content of the data block d6 * to be newly written.

5 and 6 show sequence charts of a comparative example when such a data write operation is performed without using the cache memory 7 shown in FIG. First, in step S1, a write request for the data block d6 * is made. At the same time, in step S2, a read request for the data block d18 is made.
When the request from the host computer 1 is transmitted to the control device 3, the control device 3 issues a read instruction for the sector 1 of the hard disk HD2 in step S3, and further issues a read instruction for the sector 1 of the hard disk HD3. This instruction is transmitted to the file device 5, and first, in step S4, seek and read are performed on the sector 1 of the hard disk HD2. At the same time, in step S5, seek and read are performed on sector 1 of the hard disk HD3.

As a result, in step S6, the file device 5 reads the parity block dp1 and sends it to the control device 3. At the same time, in step S7, the data block d6 is read out and transmitted to the control device 3. In step S8, the control device 3 generates a new parity block dp1 * according to the procedure described above. Also, in step S9, a new data block d6 * is written to sector 1 of the hard disk HD2. At the same time, in step S10, since the parity block dp1 * is written,
A write instruction is issued to the sector 1 of the hard disk HD3.

Upon receiving such a write instruction, the file device 5 first executes seek and write to the sector 1 of the hard disk HD2 in step S11, whereby the write of the data block d6 * is completed. In step S12, the hard disk H
Seek and write to sector 1 of D3 to complete writing of parity block dp1 *. Step S1
3, the file device 5 is a hard disk HD.
3 and the end notification of the writing of the hard disk HD2 are simultaneously transmitted. In the control device 3, step S1
In step 4, the write completion notification is received and transmitted to the host computer 1. At the same time, the control device 3
Sends a read instruction for the sector 4 of the hard disk HD3 to the file device 5.

When the host computer 1 receives the write end notification, the write end process of the data block d6 * is performed in step S15. The file device 5 determines in step S16 that the hard disk HD3
Seek and read from sector 4 of
At 17, the data block d18 is read out and transmitted to the control device 3. In the control device 3, step S
In 18, the data block d18 from the hard disk HD3 is received, stored in the buffer memory, and transmitted to the host computer 1 at a predetermined timing. The host computer 1 executes step S19.
The data block d18 is received by the
The read operation of No. 8 is completed.

Such processing requires twice as much processing time for writing and three times as much processing time for reading, including waiting time, as compared with the reading processing of FIG. This is to process the write request of data block d6 *,
This is because the hard disk HD3 is continuously accessed many times and the access of another data block d18 provided in the same hard disk HD3 is awaited.

Therefore, in the present invention, only the parity blocks dp0 to dp4 are extracted and stored in advance from the file device 5 in the cache memory 7 shown in FIG. The cache memory 7 is usually used for high-speed access processing of data copied from a storage device having a low access speed such as a hard disk. However, such normal cache memory processing requires complicated processing for control for so-called copying and cash back. Further, effective effects cannot be obtained unless a relatively large memory area is secured.

However, in the present invention, only the parity block having a relatively small amount of data is stored in the cache memory 7. In this case, even if the cache memory 7 is made sufficiently small, a sufficient area can be secured, and reading and updating of parity data can be performed at high speed. Further, it is easy to control copying and cash back.

When the file device is composed of a plurality of hard disk devices as in the embodiment, such a cache memory is composed of at least a semiconductor memory device or the like which can be accessed at a higher speed than the hard disk devices. Is preferred. Of course, if the cache memory can be secured in an area that can be accessed separately from these hard disk devices, the present invention can be implemented even if the cache memory is a memory element that can be accessed at the same speed as the hard disk device. It is possible.

FIG. 7 and FIG. 8 show a data write operation sequence chart by the device of the present invention. First, in step S1, the host computer 1 makes a write request for the data block d6 *. At the same time, in step S2, a read request for the data block d18 is issued.
The control device 3 sends such a request to the host computer 1
In step S3, a read instruction is issued for sector 1 of the hard disk HD2. Also,
When the parity block dp1 exists in the cache memory 7, the parity block dp1 is read. On the other hand, in step S4, the data block d1
In accordance with the read request of No. 8, the read instruction for sector 4 of the hard disk HD3 is issued.

When the file device 5 receives the read instruction from the control device 3, the file device 5 executes seek and read to the sector 1 of the hard disk HD2 in step S5. At the same time, in step S6, the hard disk HD3
The seek and the read to the sector 4 are executed. here,
The reading of the parity block dp1 from the cache memory in the above step S3 is performed at a very high speed. For example, normally, in a semiconductor memory, this operation can be executed in a unit of several milliseconds. Therefore, hard disk HD2
The read operation for the cache memory 7 is completed well before the read operation for the cache memory 7 is completed.

In step S7, the file device 5 transmits the data block d18 read in step S6 to the control device 3. In step S8, the control device 3 temporarily stores the data block d18 received from the hard disk HD3 in the buffer memory and transmits it to the host computer 1. The host computer 1 receives the data block d18 and ends the read operation of the data block d18.

On the other hand, when the data block d6 is read in step S5, in step S10
The data block d6 is transmitted to the control device 3. Old write data in this data block d6,
New write data to be newly written, and step S3
In step S11, the parity block dp1 * is generated using the parity block dp1 read from the cache memory in. Next, step S1
In 2, the write instruction for the data block d6 * is issued to the sector 1 of the hard disk HD2. At the same time, in step S13, to the cache memory 7,
Writing of the parity block dp1 * generated in step S11 is executed.

When there is a request for writing the data block d6 * from the control device 3, the file device 5 determines in step S1.
At 4, the seek and the write to the sector 1 of the hard disk HD2 are executed. Then, in step S15, a write completion notification of the hard disk HD2 is transmitted. Upon receiving this notification, the control device 3 sends a write end notification to the host computer 1 in step S16. When the host computer 1 receives this write end notification, it executes the write request end processing. This completes all write requests for the data block d6 * and read requests for the data block d18 by the host computer 1.

After that, the controller 3 is used by utilizing the idle time.
In step S18, transmits a write instruction for sector 1 of hard disk HD3. As a result, the parity block dp1 * from the cache memory 7
Is transferred to the file device 5, and so-called cash back is executed. In step S19, the file device 5 executes seeking and writing to the sector 1 of the hard disk HD3. Thus parity block d
When p1 * is written to the hard disk, step S
At 20, the writing completion notification of the hard disk HD3 is transmitted to the control device 3. Note that such cash-back processing is often adopted in conventional cache memory control. This process is performed, for example, in a constant cycle or in a random cycle using an appropriate free time.

When the above operation is performed, for example, a read request for the data block d18 is executed in T seconds, and a write request for the data block d6 is executed in 2T seconds. Therefore, at the maximum, the data writing will be completed in a time twice the unit time T. Comparing this with the comparative example shown in FIG. 5, it can be seen that the processing time is reduced to two-thirds and the effect of parallel access can be expected sufficiently. In the above example, if the access speed of the cache memory is equal to or faster than the access speed of the hard disk, the above effect can be sufficiently realized.

9 and 10 show another example of the data write operation sequence chart. In this example, an operation in which a parity block does not exist in the cache memory in advance will be described. First, in step S1, the host computer 1 requests writing of the data block d6 *. Further, in step S2, a read request for the data block d18 is simultaneously issued. This request is issued to the control device 3
In step S3, the control device 3 stores the content of the data block d6 * in the buffer memory, while transmitting a read instruction for sector 1 of the hard disk HD2 and sector 1 of the hard disk HD3.

When the file device 5 receives this instruction, in step S4, the sector 1 of the hard disk HD2 is
Seek and read are simultaneously executed, and at the same time, seek and read to sector 1 of the hard disk HD3 are executed in step S5. As a result, in step S5,
First, the parity block dp1 is read out, and the control device 3
Sent to. Further, in step S7, the data block d6 is read and transmitted to the control device 3. In this way, when the control device 3 receives the parity block dp1 and the data block d6 before being updated, step S
At 8, a new parity block dp1 * is generated using the new data block d6 * stored in the buffer memory in advance. The calculation process is as described above with reference to FIG.

Next, in step S9, a write instruction to sector 1 of the hard disk HD2 is executed. This is a request to write the data block d6 * to the hard disk. When the file device 5 receives this request, in step S11, the hard disk HD2
Seek to and write to sector 1. On the other hand, in the control device 3, in step S10, step S8
Writing of the parity block dp1 * generated in step 3 to the cache memory 7 is executed.

Next, in step S12, a read instruction for sector 4 of hard disk HD3 is transmitted. This is to meet the read request for the data block d18 in step S2. In step S13, the file device 5 executes seek and read to the sector 4 of the hard disk HD3.
Then, in step S14, the data block d18 is transmitted to the control device 3. In step S15, the control device 3 stores the data block d18 from the hard disk HD3 in the buffer memory and transmits it to the host computer 1 at a predetermined timing.

On the other hand, the file device 5 operates in step S16.
At the end, the writing of the hard disk HD2 is completed,
The end notification is sent to the control device 3. Control device 3
Sends this write end notification to the host computer 1. This is executed simultaneously with the transmission of the data block d18 in step S15. The host computer 1 receives the data block d18 read in step S17, and simultaneously executes the request end process for writing the data block d6 * in step S18.

After that, the cashback as described above is executed by utilizing the free time. That is, in step S19, the control device 3 transmits a write instruction to the sector 1 of the hard disk HD3, and the file device 5 causes the parity block dp from the cache memory 7 to be transmitted.
1 * is accepted, and seek and write to sector 1 of hard disk HD3 are executed. And step S2
In 1, the writing of the hard disk HD3 is completed, and the notification is sent to the control device 3.

In this embodiment, the data block d
Both the 6 * write request and the data block d18 read request are completed in a processing time of 2T seconds. Therefore, similar to the embodiment shown in FIGS. 7 and 8, parallel processing of data writing and reading is executed in a maximum of 2T seconds. Of course, the cash-back processing from step S19 onward uses the free time, and therefore does not increase the actual read or write processing. As a result of the above operation, in any of the embodiments shown in FIGS. 7 to 10, the waiting time of the read request generated at the same time as the write request is shortened to about one half of that of the comparative example shown in FIG. , High-speed parallel access processing becomes possible.

The present invention is not limited to the above embodiments. In the above-mentioned embodiment, the example in which the file device is applied to the one using the RAID architecture is shown. However, the file device is divided into a plurality of simultaneously accessible disk areas, and data blocks and parity blocks are formed in these disk areas. As long as it is provided, the configuration itself is free. Further, although the hard disk has been described as an example of the disk device, the present invention can be widely applied to various storage devices whose access speed is longer than the actual processing time of the processor. Therefore, the file device may be composed of various devices such as a semiconductor memory and an optical disk. Further, a part or all of the parity block may be extracted and transcribed in the cache memory, and its capacity can be freely selected.

[0040]

As described above, the disk array device of the present invention temporarily stores the data of a parity block which is frequently used in advance when a file device divided into a plurality of simultaneously accessible disk regions is accessed in parallel. By providing a cache memory in advance, the time required to update the parity block and store new write data can be reduced to about half compared to when the cache memory is not used, and data write requests and read requests can occur simultaneously. This has the effect of accelerating the parallel processing in such a case.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a disk array device of the present invention.

FIG. 2 is an explanatory diagram of a data writing format of a disk array device.

FIG. 3 is a data read operation sequence chart.

FIG. 4 is an explanatory diagram of a parity data generation method.

FIG. 5 is a sequence chart (part 1) of a data writing operation comparative example.

FIG. 6 is a sequence chart (part 2) of a data writing operation comparative example.

FIG. 7 is a data write operation sequence chart (No. 1).

FIG. 8 is a data write operation sequence chart (No. 2).

FIG. 9 is a data write operation sequence chart (No. 3).

FIG. 10 is a data write operation sequence chart (No. 4).

[Explanation of symbols]

 1 Host computer 3 Control device 5 File device HD0 to HD4 Hard disk (disk area) d0 to d19 Data block dp0 to dp4 Parity block

Claims (3)

[Claims] 1. A file device and a control device for controlling access to the file device, wherein the file device is divided into a plurality of simultaneously accessible disk areas, and write data is written in each disk area. A data block for storing and a parity block for storing parity data generated based on write data stored in a plurality of data blocks are provided, and the control device includes the parity from the file device. A disk array device having a cache memory for extracting and storing only data. 2. When updating write data already stored in the file device, the controller updates the parity data in the cache memory using the new write data and the old write data read from the file device. A disk array device, which controls to transfer updated parity data from the cache memory to a corresponding parity block of the file device during a free time after storing new write data in the file device. 3. The disk area of the file device is composed of a hard disk device that is separately accessed in parallel, and the cache memory is composed of at least a memory element that can be accessed at a higher speed than the hard disk device. The disk array device according to claim 1 or 2.