JPH07236148A - Picture element signal generating device - Google Patents

Abstract

PURPOSE:To suppress the deterioration of picture quality when a picture element(PE) signal is missed due to the existence of a defective photodiode. CONSTITUTION:A 1st field PE signal obtained from a 1st CCD is directly inputted from a 1st scanning memory 41 to a selection switch 91a. A 1st field PE signal obtained from a 2nd CCD is inputted from a 1st scanning memory 43 to the switch 91a through a latch 91e. The latch 91e delays the signal by one PE and guides the PE signal to the switch 91a. The switch 91a is normally set up to the opposite side of the latch 91e. When the PE signal from the memory 41 is missed, the switch 91a is switched to the latch 91e side. Thereby the missed PE is corrected by the PE signal inputted through the latch 91e.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for generating a pixel signal to be obtained by a photodiode when a part of the photodiode constituting an image pickup device is missing.

[0002]

2. Description of the Related Art In a conventional still video camera or the like, in order to generate a color signal, a color filter composed of three color filter elements of red, green and blue (such as a Bayer type color filter), or magenta, green, yellow and cyan. Color filter consisting of four color filter elements (complementary color checkered color filter)
Is known on the light receiving surface of the image sensor.
Each color filter element is provided on each photodiode of the image sensor, and a color signal corresponding to the pixel is obtained via each photodiode.

For example, about 380,000 photodiodes are formed in a regular arrangement in one image pickup device, but not all the photodiodes are normally operated, and a normal pixel signal may be generated. There may be defective photodiodes that cannot. In such a case, conventionally, information on the position of the photodiode is stored in the ROM, and the pixel is separated from the photodiode by two pixels or more.
The correction is performed using the color signal of the photodiode provided with the same color field element.

[0004]

However, since the pixel corresponding to the correction data is too far from the original pixel position, when the difference between the color of the correction data and the actual color is large, the defective photodiode There is a problem that the image quality of the part corresponding to is deteriorated.

According to the present invention, in a structure using a complementary color checkered color filter, even if a defective photodiode exists, a pixel that can generate a color signal as close as possible to a color signal that should be originally obtained from the pixel. An object is to provide a signal generation device.

[0006]

In the pixel signal generating device according to the present invention, a complementary color checkered color filter in which color filter elements of magenta, green, yellow and cyan are regularly arranged is provided on the light receiving surface. The first image sensor and the complementary color checkered color filter having the same configuration as the complementary color checkered color filter are provided on the light receiving surface, and each color filter element is arranged in the horizontal direction with respect to the corresponding color filter element of the first image sensor. When there is a missing pixel that cannot generate a normal signal in the second image sensor and the first image sensor that are displaced by the pixel, the color filter element that is adjacent to the missing pixel and has the same color filter element as the missing pixel And a correcting means for compensating for the pixel signal of the second image sensor in which is arranged.

[0007]

The present invention will be described below with reference to illustrated embodiments. FIG. 1 is a block diagram of a still video camera which is an embodiment of the present invention.

The system control circuit 10 is a microcomputer, and controls the entire still video camera.

The image pickup optical system 11 includes a lens 12 and a diaphragm 13. The lens 12 is driven by the zoom drive circuit 14 during the zooming operation, and is driven by the focus drive circuit 15 during the focusing operation. The aperture of the diaphragm 13 is adjusted by the iris drive circuit 16 during exposure control.
The zoom drive circuit 14, the focus drive circuit 15, and the iris drive circuit 16 are controlled by the system control circuit 10.

The light beam that has passed through the image pickup optical system 11 is guided to the first and second CCDs (image sensors) 22 and 23 through the prism 21, and the same subject image is formed on these CCDs 22 and 23. It Further, this light beam is guided to the finder optical system 25 via the prism 21 and the mirrors 24 and 29. First and second CCDs 22, 2
3 are provided with filters 101 and 102, respectively. The CCDs 22 and 23 are driven by the CCD driver 26, and thereby pixel signals corresponding to the subject image formed on the CCDs 22 and 23 are supplied to the correlated double sampling (CDS) circuits 31 and 32. CC
The D driver 26 operates by the pulse signal output from the synchronization signal generation circuit 27 controlled by the system control circuit 10.

The pixel signals input to the CDS circuits 31 and 32 are subjected to predetermined processing such as gamma correction in the preprocessing circuits 33 and 34 after removing reset noise. Then, this pixel signal is converted into a digital signal in the A / D converters 35 and 36, and the first scan memory 41 of the first CCD and the second scan memory 4 of the first CCD are provided.
2, first scan memory 43 of second CCD, second CCD
In the second scan memory 44. Each of the scan memories 41 to 44 has a storage capacity capable of storing a pixel signal for one field. The addresses of the scan memories 41 to 44 in which the pixel signals are stored are
It is controlled by the system control circuit 10 via the address control circuit 45.

The pixel signals read from the scan memories 41 to 44 are passed through the correction circuit 91 and the video processing circuit 46.
Entered in. The correction circuit 91, as will be described later, when the photodiode of either the first or second CCD 31, 32 cannot generate a normal pixel signal,
It is provided to supplement a defective pixel signal obtained from such a photodiode with a pixel signal obtained from another photodiode.

The video processing circuit 46 includes a scan memory 41.
The processes described later are performed on the pixel signals read from the memory cells 44 to 44 through the correction circuit 91, and thereby the R signal, the G signal, and the B signal are output together with the luminance signal.
These signals are output to the monitor device 92 or the like as monitor signals. Further, when recording these signals as a still image on a recording medium such as the IC memory card 93, these signals are data-compressed by the image compression / expansion circuit 94, and I
It is recorded in the IC memory card 93 via the C memory card control circuit 95.

The manual switch 47 connected to the system control circuit 10 is provided for operating the present still video camera, and the display element 48 is provided for displaying the contents of the operation by the manual switch 47 and the like. Further, in the system control circuit 10, when a missing pixel that cannot generate a normal signal exists in a part of the photodiodes of the CCDs 22 and 23,
Missing pixel data ROM 9 for storing the position of this missing pixel
6 is connected.

The prism 21 has first and second light separation surfaces 21a and 21b.
By the action of a and 21b, the first and second CCD2
The amount of light guided to 2, 23 and the finder optical system 25 is separated into a ratio of 4: 4: 2, for example, and light of the same intensity is guided to each CCD 22, 23. That is, a part of the light rays that have entered the prism 21 from the imaging optical system 11 are reflected by the first light splitting surface 21a and guided to the second CCD 23, and the other light rays pass through the first light splitting surface 21a. The light is transmitted and guided to the second light separation surface 21b. At the second light separation surface 21b, a part of the light rays is reflected and guided to the first CCD 22, and the other light rays, that is, the first and second light separation surfaces 21a and 21b.
The light beam that has passed through is emitted to the outside of the prism 21.
This light beam is reflected by the mirrors 24 and 29 and guided to the finder optical system 25. The mirrors 24 and 29 are members for shifting the optical axis of the finder optical system 25 from the optical axis of the photographing optical system 11, and can be omitted.

It is preferable that the light amounts guided to the first and second CCDs 22 and 23 are the same, but they are not necessarily the same, and when these light amounts are different, CC
The magnitudes of these output signals may be made the same by adjusting the gains of the outputs of D22 and D23.

FIG. 2 shows the first and second CCDs 22, 23.
Color filters 101, 102 provided on the light receiving surface of the
Is an array of. These color filters 10
Reference numerals 1 and 102 are complementary color checkered color filters having the same configuration. These color filters 101, 10
2, the filter elements that transmit magenta (Mg), yellow (Ye), cyan (Ce), and green (G) are alternately arranged. That is, in addition to green (G), magenta (Mg), yellow (Ye), and cyan (Ce) having different spectral characteristics of complementary colors are included in a total of 4 pixels in which two pixels are arranged in each of the horizontal direction and the vertical direction. Three pixels are provided.

CCD 23 of the second color filter 102
Relative to C of the first color filter 101.
Compared to the positional relationship with respect to the CD 22, the second color filter 102 is provided so as to be shifted by one pixel in the horizontal direction (left direction in FIG. 2) with respect to the CCD 23. For example, focusing on the pixel P in the upper left corner of the screen, the first color filter 101 is magenta, but the second color filter 102 is green.

As described above, the pixel spectral characteristics of the CCDs 22 and 23 are regularly changed and are of the complementary color difference line sequential type. Further, the pixel spectral characteristic of the second CCD 23 is horizontally displaced from the pixel spectral characteristic of the first CCD 22 by one pixel. Therefore, the four pixels of the two pixels arranged in the vertical direction of the first CCD 22 and the two pixels arranged in the vertical direction of the second CCD 23 at the same optical position of the two pixels.
The pixels have different spectral characteristics. That is, for example, when one of the two pixels is Mg and Ye, the other two pixels are G and Cy.

The output signal of the first CCD 22 and the second CC
The output signal of D23 is temporarily stored in the scan memories 41 to 44 as a digital signal, but is read from these memories and processed in the video processing circuit 46. That is, the corresponding pixels are superimposed on each other, and the R signal, the G signal, and the B signal corresponding to each pixel are extracted from the superimposed signals to obtain a video signal.

FIG. 3 shows this superposed state. As understood from this figure, the magenta (Mg) of the filter 101 of the first CCD 22 and the second CCD 23
The green (G) of the filter 102 of
Green (G) and filter 102 magenta (Mg)
However, the yellow (Ye) of the filter 101 and the filter 10
The cyan (Cy) of 2 is the cyan (Cy) of the filter 101.
y) and yellow (Ye) of the filter 102 respectively correspond to the same pixel. Note that, in FIG. 3, Px represents an interval between pixels in the horizontal direction (1 pitch), and Py represents an interval between pixels in the vertical direction (1 pitch).

First, the extraction of the R signal will be described. The R signal included in magenta (Mg) is R _Mg , the B signal is B _Mg ,
The R signal included in yellow (Ye) is R _Ye and the G signal is G
_When G signal included in _Ye and cyan (Cy) is G _Cy and B signal is B _Cy , Mg = R _Mg + B _Mg , Ye = R _Ye + G _Ye , Cy = G _Cy + B
It can be represented as _Cy .

The R signal is a magenta (M
g) and yellow (Ye), and the four pixels of green (G) and cyan (Cy) (pixels shaded in FIG. 3) superimposed on them are obtained by the following formula. R _S = (Mg + Ye) -α (G + Cy) = R _Mg + B _Mg + R _Ye + G _Ye −αG-αG _Cy −αB _Cy = R _Mg + R _Ye + G _Ye −α (G + G _Cy ) + B _Mg −αB _Cy = R _Mg + R _Ye (1) However, in order for this expression (1) to hold, the condition is that α = G _Ye / (G + G _Cy ) = B _Mg / B _Cy .

The B signal is similarly obtained by the following equation. B _S = (Mg + Cy) -β (G + Ye) = R _Mg + B _Mg + G _Cy + B _Cy -βG-βR _Ye -βG _Ye = B _Mg + B _Cy + G _Cy -β (G + G _Ye ) + R _Mg -βR _Ye = B _Mg + B _Cy (2) However, in order for this equation (2) to hold, it is a condition that β = G _Cy / (G + G _Ye ) = R _Mg / R _Ye holds.

Regarding the G signal, a luminance signal (Y) and
It is obtained from R _S and B _S obtained by the equations (1) and (2). That is, G _S = Y−R _S −B _S = (Mg + Cy + G + Ye) −R _S −B _S = G + G _Ye + G _Cy (3)

Next, the actual method of extracting the RGB signals will be described with reference to FIG. In the pixel arrangement of this figure,
The first and second CCDs 22 and 23 are represented by parameters A and B, respectively, the horizontal direction is represented by a parameter i, and the vertical direction is represented by a parameter j. In this figure, among the pixels shown in an overlapping manner, the one located above is the first C
Corresponding to the CD22, the one below is the second CCD
23. The signal from each pixel is
For the CCD 22 of, VA, i, j = Mg, VA, i + 1, j = G VA, i, j + 1 = Ye, VA, i + 1, j + 1 = Cy VA, i, j + 2 = G, VA, i + 1, j + 2 = Mg VA, i, j + 3 = Ye, VA, i + 1, j + 3 = Cy, and for the second CCD 23, VB , i, j = G, VB, i + 1, j = Mg VB, i, j + 1 = Cy, VB, i + 1, j + 1 = Ye VB, i, j + 2 = Mg, VB, i The arrangement is such that + 1, j + 2 = G VB, i, j + 3 = Cy and VB, i + 1, j + 3 = Ye. Where i = 1,3,5, ...; j = 1,5,
It shall take the values of 9, ...

In the first scan, the signal of the first field, that is, VA, i, j = Mg, VA, i + 1, j = G VA, i, j + 2 = G, VA, i + 1, j + 2 = Mg VB, i, j = G, VB, i + 1, j = Mg VB, i, j + 2 = Mg, VB, i + 1, j + 2 = G are extracted, and in the second scan Signal of the second field, that is, VA, i, j + 1 = Ye, VA, i + 1, j + 1 = Cy VA, i, j + 3 = Ye, VA, i + 1, j + 3 = Cy VB , i, j + 1 = Cy, VB, i + 1, j + 1 = Ye VB, i, j + 3 = Cy, VB, i + 1, j + 3 = Ye are extracted.

The above all pixel signals are the scan memories 41 to 41.
Stored in 44. These pixel signals are corrected by the correction circuit 91.
Is read out to the video processing circuit 46 through the calculation, and Ri, k = (VA, i, j + VA, i, j + 1) -α (for the i-th pixel of the odd-even scanning line of the odd field is calculated. VB, i, j + VB, i, j + 1) = (Mg + Ye) -α (G + Cy) (4) Ri, k + 1 = (VB, i, j + 2 + VA, i, j + 3) -α (VA, i, j + 2 + VB, i, j + 3) = (Mg + Ye) -α (G + Cy) (5) Bi, k = (VA, i, j + VB, i, j + 1) -β (VB, i, j + VA, i, j + 1) = (Mg + Cy) -β (G + Ye) (6) Bi, k + 1 = (VB, i, j + 2 + VB, i, j + 3)- β (VA, i, j + 2 + VA, i, j + 3) = (Mg + Cy) -β (G + Ye) (7) Gi, k = (VA, i, j + VA, i, j + 1 + VB, i, j + VB, i, j + 1) -pRi, k-qBi, k = (Mg + Ye + G + Cy) -pRi, k-qBi, k (8) Gi, k + 1 = (VB, i, j + 2 + VA, i, j + 3 + VA, i, j + 2 + VB, i, j + 3) -pRi, k + 1-qBi, k + 1 = (Mg + Ye + G + Cy) -pRi, k + 1-qBi, k + 1 (9) RGB signal is obtained.

Similarly, Ri + 1, k = (VB, i + 1, j + VB, i + 1, j + 1)-. Alpha. (VA , i + 1, j + VA, i + 1, j + 1) = (Mg + Ye) -α (G + Cy) (10) Ri + 1, k + 1 = (VA, i + 1, j + 2 + VB, i + 1, j + 3) -α (VB, i + 1, j + 2 + VA, i + 1, j + 3) = (Mg + Ye) -α (G + Cy) (11) Bi + 1, k = (VB, i + 1, j + VA, i + 1, j + 1) -β (VA, i + 1, j + VB, i + 1, j + 1) = (Mg + Cy) -β (G + Ye) (12) Bi + 1, k + 1 = (VA, i + 1, j + 2 + VA, i + 1, j + 3) -β (VB, i + 1, j + 2 + VB, i + 1, j + 3) = (Mg + Cy) -Β (G + Ye) (13) Gi + 1, k = (VB, i + 1, j + VB, i + 1, j + 1 + VA, i + 1, j + VA, i + 1, j + 1) -pRi + 1, k-qBi + 1, k = (Mg + Ye + G + Cy) -pRi + 1, k-qBi + 1, k (14) Gi + 1, k + 1 = (VA, i + 1, j + 2 + VB, i + 1, j + 3 + VB, i + 1, j + 2 + VA, i + 1, j + 3) -pRi + 1, k + 1 -qBi + 1, k + 1 = (M + Ye + G + Cy) - pRi + 1, k + 1 - qBi + 1, k + 1 RGB signal (15) is obtained. Here, p and q may be 1 by referring to the expression (3), but it is preferable that they can be appropriately adjusted according to the value of the Y component.

The constants α, β, p and q are determined by adjusting the parameters of software executed in the system control circuit 10.

For the even field, the j + 1 th and j
By combining the + 2nd pixel, the above (4)
An RGB signal can be obtained by a formula similar to the formulas (15) to (15).
Note that the above equation is a linear calculation method without gamma correction, and the gamma-corrected signal is the image memory 41.
If they are stored in .about.44, they are once linearly converted, and then those operations are performed. After the operations, regular gamma correction is performed.

FIG. 5 shows an example of an arithmetic circuit configuration for extracting RGB signals based on the pixel signals read from the scan memories 41 to 44. This circuit is a correction circuit 91.
And a video processing circuit 46. FIG. 6 schematically shows pixel signals read from the first and second CCDs 22 and 23. Referring to these drawings, RGB signals are generated from pixel signals, and still image video signals are converted into IC signals.
The operation recorded in the memory card 93 will be described.

The output signal from the first CCD 22 is input to one of the scan memories 41 and 42 via the switch 51, and the output signal from the second CCD 23 is the switch 52.
Is input to one of the scan memories 43 and 44 via. The switches 51 and 52 are switched for each field under the control of the system control circuit 10, and when the image signal of the first field is input, one of the terminals 5
When the image signal of the second field is input to the 1a and 52a sides, it is connected to the other terminals 51b and 52b side, respectively.

Each scan memory 41-44 has one
The first scan memory 4 has a storage capacity for a field.
1 stores the pixel signal of the first field (reference numeral A1 in FIG. 6) obtained from the first CCD 22, and the second scan memory 42 stores the second signal obtained from the first CCD 22.
The pixel signal of the field (reference numeral A2 in FIG. 6) is stored. In the first scan memory 43, the pixel signal of the first field (reference numeral B in FIG. 6) obtained from the second CCD 23.
1) is stored, and the second scan memory 44 stores the pixel signal of the second field (reference numeral B2 in FIG. 6) obtained from the second CCD 23.

The correction circuit 91 includes four sets of selection switches 9
1a to 91d and four latches 91e to 91h are provided. One input end of the selection switch 91a is the first
The first scan memory 41 of the CCD 22 and the other input end are connected to the first scan memory 43 of the second CCD 23 via the latch 91e. Similarly, each input terminal of the selection switch 91b is connected to the second scan memory 42 of the first CCD 22 and the latch 91f connected to the second scan memory 44 of the second CCD 23.
Each input terminal of the selection switch 91c is connected to the first of the second CCD 23.
It is connected to the scan memory 43 and a latch 91g connected to the first scan memory 41 of the first CCD 22. Each input terminal of the selection switch 91d is connected to the second scan memory 44 of the second CCD 23 and the latch 91h connected to the second scan memory 42 of the first CCD 22. Each selection switch 91a to 91d is composed of a number of switches corresponding to the number of bits of input data.

The pixel signals input to the selection switches 91a to 91d via the latches 91e to 91h are delayed by one pixel relative to the pixel signals input without passing through the latches. That is, the lead wires that directly connect the scan memories 41 to 44 and the selection switches 91a to 91d are
A first pixel signal output means for outputting the pixel signals obtained by the CCDs 22 and 23 without delay is constituted, and the latch 9 is provided.
Reference numerals 1e to 91h constitute second pixel signal output means for delaying the pixel signals obtained by the CCDs 22 and 23 by one pixel relative to the output of the first pixel signal output means and outputting them. .

The selection switches 91a to 91d are usually set on the opposite side of the latches 91e to 91h. Therefore, normally, the pixel signals read from the scan memories 41 to 44 are input to the video processing circuit 46 without passing through the latches 91e to 91h. The operation of the latches 91e to 91h and the selection switches 91a to 91d will be described later.

The pixel signal is read from the scan memories 41 to 44 for each horizontal scanning line, and a predetermined operation is performed in any of the adders 61 to 65, the subtracters 66 to 69 and the level shift circuits 71 to 76. Then, the G signal, the R signal and the B signal are obtained. The G signal is directly output from the G terminal 81, but the R signal and the B signal are output from the switches 53 and 5.
It is output from the R terminal 82 or the B terminal 83 via the No. 4 terminal. The operation by the operation circuit of FIG. 5 is in accordance with the equations (4) to (15), and the operation of this circuit will be described by taking the equation (4) as an example.

First, the switches 51 and 52 are switched to the terminals 51a and 52a, respectively, and the scan memory 41 has the magenta signal (V) of the first field.
A, i, j) is stored, and the green signal (VB, i, j) of the first field is stored in the scan memory 43. Then, the switches 51 and 52 are switched to the other terminals 51b and 52b, the yellow signal (VA, i, j + 1) of the second field is stored in the scan memory 42, and the second field is stored in the scan memory 44. Cyan signal (VB, i, j + 1)
Is stored.

The magenta signal of the first field (VA, i,
j) and the yellow signal (VA, i, j + 1) of the second field is
It is added in the adder 61. The green signal (VB, i, j) of the first field and the cyan signal (VB, i, j + 1) of the second field are added by the adder 63.
The output signal of the adder 61 is multiplied by the coefficient 1 in the level shift circuit 74, and the output signal of the adder 63 is multiplied by the coefficient α in the level shift circuit 73. Subtractor 6
In 7, the output signal of the level shift circuit 73 is subtracted from the output signal of the level shift circuit 74, whereby (2)
The expression has been executed. At this time, the switch 53 is switched to the R output terminal side.
The signal is output.

The level shift amounts in the level shift circuits 71 to 76 are controlled by the system control circuit 10 according to the contents of the calculation. That is, the level shift circuits 71 to 74 are set to one of α, β and 1, and the level shift circuits 75 and 76 are set to one of p and q. The switches 53 and 54 are i
When calculating the th pixel, switch to the upper side of the figure
When the first pixel is calculated, it is switched to the lower side of the figure.

G terminal 81, R terminal 82 and B terminal 83
Is connected to the image compression / expansion circuit 94, and G signal, R signal
The signal and the B signal are data-compressed in the image compression / expansion circuit 94, and are I
It is recorded in the C memory card 93.

Select switches 91a to 91d and latch 91
e to 91h are provided to correct the pixel signals obtained from such photodiodes when some of the photodiodes of the CCDs 22 and 23 cannot generate normal pixel signals due to manufacturing reasons. ing. The correction operation of this pixel signal will be described with reference to FIGS. 5, 6 and 7.

In FIG. 7 (1), the pixel signal indicated by reference numeral SA1 is the signal read from the first scan memory 41 of the first CCD 22 and directly input to the selection switch 91a, and the pixel signal indicated by reference numeral SA2 is the pixel signal. The signal read from the second scan memory 42 of the 1CCD 22 and directly input to the selection switch 91b, the pixel signal indicated by reference symbol SB1 is read from the first scan memory 43 of the second CCD 23 and input to the direct selection switch 91c. Signal from the second scan memory 44 of the second CCD 23 and the direct selection switch 91.
This is a signal input to d. That is, the pixel signal SA1,
SA2, SB1 and SB2 are pixel signals A1 and A of FIG.
It corresponds to 2, B1, and B2. These pixel signals are
The scan memories 41 to 44 are pixel by pixel in synchronization with the clock signal output from the address control circuit 45 (FIG. 1).
Read from.

In FIG. 7 (2), the pixel signal indicated by the reference symbol TA1 is read from the first scan memory 41 and input to the selection switch 91c via the latch 91g, and the pixel signal indicated by the reference symbol TA2 is The signal read from the second scan memory 42 and input to the selection switch 91d via the latch 91h, that is, the pixel signal denoted by the symbol TB1 is read from the first scan memory 43 and latched.
The signal input to the selection switch 91a via 1e and the pixel signal indicated by the symbol TB2 are read from the second scan memory 44, and selected via the latch 91f.
This is a signal input to b.

In FIG. 6, it is assumed that the photodiode P1 for generating a hatched pixel signal cannot generate a normal signal due to manufacturing reasons, that is, a missing pixel exists. This missing pixel is a CCD
Information indicating which position of the photodiodes 22 and 23 corresponds to the photodiode is stored in the pixel missing data ROM 96 in the manufacturing process of the still video camera.

This missing pixel corresponds to the “G ⁴ ” pixel signal read from the first scan memory 22 in FIG. 7A, and this pixel signal is input to the selection switch 91a at a predetermined timing. . At this time, the pixel signal Q of “G ³ ”, which is read from the first scan memory 23 and guided through the latch 91e, is input to the selection switch 91a, and the selection switch 91a outputs from the system control circuit 10. The control signal D is switched to the side of the latch 91e. Thus the selection switch 91a, instead of the pixel signals of "G ^4" is a pixel signal of "G ^3" is output.

FIG. 7C shows pixel signals output from the selection switches 91a to 91d. That is, the code U
The pixel signal indicated by A1 is the pixel signal output from the selection switch 91a, and most of it is the pixel signal of the first field of the first CCD 22, but when there is a missing pixel, the pixel signal of the first field of the second CCD 23 is detected. It is corrected by the pixel signal. Similarly, the pixel signal indicated by reference numeral UA2 is the pixel signal output from the selection switch 91b, and most of it is the pixel signal of the second field of the first CCD 22, but when there is a missing pixel, the second CCD 23
Is corrected by the pixel signal of the second field of. The pixel signals denoted by reference numerals UB1 and UB2 are similarly corrected when there are missing pixels.

As shown in FIG. 6, the pixel signal of "G ³ " for correcting the missing pixel of "G ⁴ " in the above-mentioned example is adjacent to this missing pixel and has the same color filter element as this missing pixel. It is obtained from the pixel P2 of the arranged second CCD 23. That is, the distance between these pixels P1 and P2 is one pixel (X) on the screen. On the other hand, if the pixel signal obtained from the same CCD as the CCD in which the missing pixel is generated is corrected, the distance between the pixel P3 provided with the same color filter element as the missing pixel and the missing pixel P1 is two pixels. (2X). Therefore, as in the present embodiment, by using the pixel signal output from the CCD in which the missing pixel has not occurred, the pixel information closest to the missing pixel can be used for correction, and the presence of the missing pixel Nevertheless, it is possible to minimize the deterioration of the image quality.

[0050]

As described above, according to the present invention, it is possible to generate a color signal that is as close as possible to the color signal that should be originally obtained from the photodiode even if there is a defective photodiode. can get.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of a still video camera to which an embodiment of the present invention is applied.

FIG. 2 is a diagram showing an array of color filters provided on the light receiving surfaces of the first and second CCDs.

FIG. 3 is a diagram showing a state in which corresponding pixels are overlapped with each other regarding output signals of the first and second CCDs.

FIG. 4 is a diagram for explaining a color signal extraction method according to the embodiment.

FIG. 5 is a circuit diagram showing a configuration example of a video signal processing circuit.

FIG. 6 is a diagram schematically showing pixel signals read from first and second CCDs.

FIG. 7 is a timing chart showing a pixel signal read from a scan memory, a pixel signal passed through a latch, and a pixel signal output from a selection switch.

[Explanation of symbols]

 22, 23 CCD (image sensor) 101, 102 filter

Claims (3)

[Claims] 1. A first image sensor having a complementary color checkered color filter formed by regularly arranging magenta, green, yellow and cyan color filter elements on a light receiving surface, and the complementary color checkered color filter. A second image sensor in which a complementary color checkered color filter having the same configuration is provided on the light-receiving surface, and each color filter element is horizontally displaced by one pixel with respect to the corresponding color filter element of the first image sensor; When a missing pixel that cannot generate a normal signal is present in the first image sensor, the second image sensor of the second image sensor adjacent to the missing pixel and having the same color filter element as the missing pixel is arranged. A pixel signal generation device, comprising: a correction unit that compensates for the pixel signal. 2. The correction means includes first pixel signal output means for outputting a pixel signal obtained by one of the first and second image sensors, and the other of the first and second image sensors. Second pixel signal output means for delaying the pixel signal obtained by (1) relative to the output of the first pixel signal output means by one pixel, and outputting the first and second pixels. The pixel signal generation device according to claim 1, further comprising: a pixel signal selection unit that selects and outputs a pixel signal that is not the missing pixel among pixel signals that are simultaneously output from the signal output unit. 3. The pixel signal selection means has a missing pixel storage means for storing a position of a missing pixel, and outputs the first or second pixel signal output based on the position stored by the missing pixel storage means. The pixel signal generation device according to claim 2, wherein the pixel signal that is not the missing pixel is selected and output from the pixel signals output from the means.