JPH07235833A - Sine wave oscillation circuit - Google Patents

Abstract

PURPOSE:To provide the sine wave oscillation circuit whose circuit size is made small and which provides a sine wave signal with less distortion. CONSTITUTION:The sine wave oscillation circuit is formed by including a biphase oscillation circuit 1 generating a biphase signal having a phase difference of alpha-degrees, an LC element 2 whose two inductor conductors formed on a semiconductor substrate receive the biphase signal and in which capacitors each comprising a pn junction layer are formed between the two inductor conductors in terms of distributed constant and an amplifier 3 amplifying an output of the LC element 2. Then the LC element 2 acts like a tuning circuit that produces resonance upon the receipt of the biphase signals including the phase difference alpha and outputs only a sine wave signal tuned to the signal of the resonance frequency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sine wave oscillating circuit for generating a sine wave signal with little distortion.

[0002]

2. Description of the Related Art Generally, a sine wave signal is a basic waveform signal of an electric signal and is generally used as a signal for measuring the linearity and frequency characteristic of a circuit network.

Various LC oscillation circuits are known as circuits for generating such a sine wave signal with low distortion. For example, Colpitts-type and Hartley-type LC oscillator circuits are well known and are used for oscillating a sine wave signal having a relatively high frequency.

[0004]

By the way, the above-mentioned conventional general LC oscillator circuit includes a coil having a predetermined inductance L in the circuit, and since this coil uses an external component, There was a problem that it took time to assemble and wire.

There is also a problem that it is difficult to reduce the size of the entire circuit because the coil is externally attached. In particular, this externally attached coil is generally formed by winding a conducting wire, and since it has a certain volume, it is not possible to reduce the size of a conventional oscillation circuit including this. difficult. In addition, since external components are required in this way, it cannot be integrally formed on a semiconductor substrate or the like, and it is difficult to include the oscillation circuit itself in a part of an IC or LSI.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a sine wave oscillating circuit which can be miniaturized and can obtain a sine wave signal with little distortion. It is in.

[0007]

In order to solve the above-mentioned problems, a sine wave oscillation circuit according to a first aspect of the present invention forms two inductor conductors formed on a semiconductor substrate and a distributed constant between them. And a first signal having a frequency substantially equal to the resonance frequency of the LC element is generated and input to one of the two inductor conductors, and a predetermined signal is applied to the signal. A two-phase oscillator circuit for generating a second signal having a phase difference and inputting the second signal to the other of the two inductor conductors, and by resonating the LC element, one of the two inductor conductors is provided. It is characterized in that a sine wave signal is output from.

A sine wave oscillating circuit according to a second aspect is the sine wave oscillating circuit according to the first aspect, wherein the LC elements are two concentric spiral coils arranged in the same plane and adjacent to each other. Of the inductor conductor and the two electrodes, the p region is electrically connected to one of the two electrodes, and the n region is electrically connected to the other of the two electrodes, and a reverse bias voltage is applied. And a spiral pn junction layer that operates as the capacitor.

A sine wave oscillating circuit according to a third aspect is the sine wave oscillating circuit according to the first aspect, wherein the LC elements are two in a meandering shape arranged in the same plane and adjacent to each other substantially concentrically. Of the inductor conductor and the two electrodes, the p region is electrically connected to one of the two electrodes, and the n region is electrically connected to the other of the two electrodes, and a reverse bias voltage is applied. And a meandering pn junction layer that operates as the capacitor.

A sine wave oscillator circuit according to a fourth aspect is the sine wave oscillator circuit according to the second or third aspect, wherein the lengths of the two inductor conductors are different.

In the sine wave oscillating circuit according to claim 5, in the sine wave oscillating circuit according to claim 2 or 3, one of the two inductor conductors is divided into a plurality of pieces, or one of the two inductor conductors is divided. A corresponding one of the pn junction layers is divided into a plurality of pieces, and a part of each of the divided pieces is electrically connected.

According to a sixth aspect of the present invention, there is provided a sine wave oscillator circuit according to the second aspect.
In any one of the sine wave oscillating circuits described in No. 5, by changing the reverse bias voltage applied to the pn junction layer, the resonance frequency of the LC element is changed to change the frequency of the sine wave signal output from the LC element. It is characterized by doing.

According to a seventh aspect of the present invention, there is provided a sine wave oscillator circuit according to the first aspect.
In the sine wave oscillation circuit according to any one of 6 above, the two-phase oscillation circuit has at least two series circuits each including a delay section and a waveform shaping section, and these series circuits are connected in a ring shape to form a plurality of the waveforms. The odd number of the shaping units is characterized in that the logic of the signal is inverted and a two-phase signal is taken out from two of the delay units or two of the waveform shaping units.

According to an eighth aspect of the present invention, in the sine wave oscillation circuit of the seventh aspect, each of the waveform shaping sections includes an exclusive OR circuit, and the exclusive OR circuit. By setting the logic of the signal input to one of the input terminals to L or H, the logic of the input signal is inverted or non-inverted by each of the waveform shaping sections.

A sine wave oscillating circuit according to a ninth aspect is the sine wave oscillating circuit according to the seventh aspect, wherein each of the waveform shaping sections is configured by connecting one or a plurality of inverter logic circuits in series. By setting the number of the inverter logic circuits to an odd number or an even number, the logic of the input signal is inverted or non-inverted by each of the waveform shaping sections.

A sine wave oscillator circuit according to a tenth aspect of the present invention is the seventh aspect.
In the sine wave oscillation circuit of any one of 1 to 9, the delay portion includes a long gate electrode formed on the surface of the semiconductor substrate with an insulating layer interposed therebetween, and a long gate electrode formed on the surface of the semiconductor substrate in the longitudinal direction of the gate electrode. A low-pass filter including a source and a drain provided near both ends and having a channel formed on the surface of the semiconductor substrate corresponding to the gate electrode as a signal input / output path, and the gate electrode having a predetermined width. The time constant of the low-pass filter is set arbitrarily by setting the gate length.

A sine wave oscillator circuit according to an eleventh aspect of the present invention is the one according to the first aspect.
In the sine wave oscillator circuit of 0, the frequency of the first and second signals generated by the two-phase oscillator circuit is controlled by variably controlling the voltage applied to the gate electrode to change the time constant of the low-pass filter. And adjusting the phase difference between these signals.

A sine-wave oscillator circuit according to a twelfth aspect of the present invention is the seventh aspect.
In the sine wave oscillating circuit according to any one of items 1 to 9, the delay unit is configured by a charge / discharge circuit in which an element constant of at least one of a resistor and a capacitor is variable.

According to a thirteenth aspect of the present invention, there is provided a sine wave oscillator circuit according to the first aspect.
In the sine wave oscillating circuit of No. 2, the resistor is constituted by an equivalent resistor using a MOS transistor, or the capacitor is constituted by a variable capacitance using a pn junction layer, and at least one element constant is set according to an applied voltage. By changing the frequency, the frequencies of the first and second signals generated by the two-phase oscillation circuit and the phase difference between these signals are adjusted.

A sine wave oscillator circuit according to a fourteenth aspect is the one according to the first aspect.
In any one of the sine wave oscillating circuits 0 to 13, the pseudo sine wave signal is taken out from each of the delay sections, and the taken pseudo sine wave signal is used as a two-phase signal generated by the two-phase oscillating circuit. Characterize.

A sine wave oscillator circuit according to a fifteenth aspect is the one according to the first aspect.
1 or a sine wave oscillation circuit, a reference frequency signal and a feedback signal are input, the frequency and phase of these two signals are compared, and a phase comparator for outputting a voltage signal according to the difference, A low-pass filter that is connected to the output side of the phase comparator and applies an output voltage to the delay section, and outputs either one of the first and second signals output from the two-phase oscillation circuit. By inputting the feedback signal to the phase comparator, a sine wave signal synchronized with the reference frequency signal is output.

[0022]

According to a first aspect of the present invention, an LC element is formed on a semiconductor substrate by two inductor conductors and a capacitor formed in a distributed constant between them, and the LC element is used as a tuning circuit. Is. In this LC element, the capacitors are formed along the inductor conductor in a distributed constant manner, so that the signal input to each of the two inductor conductors is almost equal to the resonance frequency and is necessary to cause resonance. It must be a two-phase signal with a phase difference. The two-phase oscillator circuit is for generating a two-phase signal having such frequency and phase,
By inputting this two-phase signal to each of the two inductor conductors of the LC element, a sine wave signal tuned to the resonance frequency of the LC element can be obtained. The sine wave signal thus obtained is tuned to the resonance frequency of the LC element and has little distortion. Further, since the LC element itself is formed on the semiconductor substrate, it can be integrally formed with other circuits such as a two-phase oscillation circuit, and external parts such as a coil around which a conductor is wound are unnecessary, The circuit can be miniaturized.

According to a second aspect of the present invention, the above-mentioned LC element is composed of two spiral inductor conductors and a pn junction layer formed therebetween. That is,
Two spiral inductor conductors are formed so as to substantially concentrically and substantially in parallel. Therefore, each of these two electrodes functions as an inductor. A pn junction layer is formed in a spiral shape between the two inductor conductors, and a distributed constant capacitor is formed between the two inductor conductors by the pn junction layer.

The LC element having such a structure has a predetermined resonance frequency, that is, a tuning frequency, which is determined on the basis of the element constants of the inductor and the capacitor formed in a distributed constant, and at this frequency. When various waveform signals such as substantially equal clock signals or pseudo sine wave signals are input, a sine wave signal with less distortion comes out from the LC element.

This LC element can be manufactured by forming a spiral pn junction layer on the semiconductor substrate and further forming two spiral inductor conductors on the surface side thereof. Becomes very easy. In particular, since this LC element is integrally formed on the semiconductor substrate, it is possible to form this LC element together with the two-phase oscillation circuit as part of an IC or LSI. When it is formed as, it is possible to omit the assembly of parts and the wiring work in the subsequent process.

Further, the invention of claim 3 is such that the above-mentioned spiral inductor conductor is replaced with a meandering inductor conductor. That is, generally, the inductor conductor is formed in a spiral shape to function as an inductor. However, when the frequency band of the signal to be used is limited to a high frequency, the shape of the inductor conductor can be made a meandering shape. . That is, when handling a high frequency signal, a small inductance is sufficient, and therefore it is not always necessary to wind the inductor conductor in a spiral shape, and a serpentine shape is often sufficient. As described above, when the inductor conductor is formed in a meandering shape, a part of each inductor conductor is located on the outer peripheral portion, and therefore, wiring for connecting to the two-phase oscillator circuit and wiring for extracting the sine wave to the outside are required. Easy to attach terminals.

The invention of claim 4 is such that the lengths of the two inductor conductors included in the above-mentioned LC element are changed. Even in this case, similarly, the inductors function as two inductors having different lengths, and a capacitor formed by the pn junction layer exists between them in a distributed constant manner. Therefore, by inputting into each of these two inductor conductors a two-phase signal having a frequency substantially equal to the resonance frequency and having a predetermined phase difference, the L
The C element can be used as a tuning circuit, and a sinusoidal signal with little distortion can be taken out.

According to a fifth aspect of the present invention, one of the above-mentioned two inductor conductors or a corresponding pn junction layer is divided into a plurality of pieces, and the self-inductance of each divided piece of the divided inductor conductor. It is possible to use an LC element that is less affected by, and it is possible to obtain sinusoidal signals of different frequencies by changing the resonance frequency.

Further, according to the invention of claim 6, the resonance frequency of the LC element, that is, the tuning frequency can be made variable by changing the reverse bias applied to the above-mentioned pn junction layer, and according to the applied voltage. A voltage-controlled oscillation circuit capable of oscillating a frequency-variable sine wave signal can be easily realized.

According to a seventh aspect of the present invention, the above-described two-phase oscillation circuit is configured such that a plurality of series circuits each including a waveform shaping section and a delay section are connected in a ring shape, and two delay sections or two waveform shaping are connected. The two-phase signals having different phases are extracted from the section.

Further, these waveform shaping sections are set so that the logic of the signal is inverted in an odd number of them, and focusing on the output of one waveform shaping section, the delay amounts of all the delay sections are set. After the added time, the logic of the signal is inverted, and the oscillation of the predetermined frequency is continued and performed. Therefore, when the signals are extracted from the two delay sections or the two waveform shaping sections, a two-phase signal having a phase difference determined based on the delay amount of each delay section is extracted. In particular, it is possible to arbitrarily set the phase difference between the two output signals by arbitrarily setting the delay amount in each delay unit, and to easily obtain the two-phase signal that causes resonance in the LC element. be able to.

According to the invention of claim 8, each of the above-mentioned waveform shaping sections includes an exclusive OR.
By setting the logic of the signal input to one input end to H or L, the logic of the signal input to the other input end is inverted as necessary. When the waveform shaping section is configured to include the exclusive OR as described above, all the waveform shaping sections can have the same configuration, which facilitates the design such as the setting of the delay amount by the delay section.

According to a ninth aspect of the present invention, each of the above-mentioned waveform shaping sections is configured to include an odd number or an even number of inverter logic circuits. By changing the number of included inverter logic circuits, one cycle is completed as a whole. Then, it tries to invert the logic of the returned signal. Functionally, the odd-numbered inverter logic circuit or the even-numbered inverter logic circuit is equivalent to the exclusive OR circuit described above, and the frequency and the two signals output are delayed by the delay amount of the delay unit inserted between them. The phase difference is determined. When each of the waveform shaping sections is formed by using the inverter logic circuit as described above, the respective structures are simplified and the two-phase oscillation circuit, that is, the sine wave oscillation circuit can be downsized.

According to a tenth aspect of the present invention, the delay section described above is constituted by a MOS transistor having a long gate electrode. This MOS transistor is
The channel serves as a signal input / output path and functions as a low-pass filter formed by the resistance of the channel and the capacitance between the channel and the gate electrode. Therefore, the output of the waveform shaping section input to the low-pass filter is converted into a signal having a waveform in which a sharp rise or fall is blunted by charging / discharging according to the time constant of the low-pass filter. Since the output after this conversion is further input to the waveform shaping section at the next stage, this waveform shaping section outputs a signal having a phase shift according to the time constant of the low-pass filter described above.

Particularly, in the MOS transistor functioning as a low-pass filter described above, when the channel length (gate length) is L and its width is W, the resistance R of the channel is proportional to L and inversely proportional to W. become. Also,
The capacitance C of the capacitor formed between the channel and the gate electrode is proportional to L and W, respectively.
Therefore, the product RC of R and C used to determine the time constant of the low pass filter is (L / W) × LW =
It will be proportional to L ² . Therefore, by changing only the gate length of the MOS transistor, the time constant of the low-pass filter can be arbitrarily changed, the oscillation frequency of the two-phase oscillation circuit can be easily adjusted or changed, and the design can be facilitated. .

Even when a low-pass filter is constructed by separately providing a resistor and a capacitor as in the conventional case, the value of RC can be changed by changing the size of each and changing the element constant. Although it was possible, when the above-mentioned MOS transistor is used, the delay amount of the low-pass filter is changed in proportion to the square of the gate length L only by changing the gate length L, so that the oscillation frequency is significantly increased. Easy to change. Further, since only the gate length needs to be changed without changing the gate width of the MOS transistor, the increase in the area size of the gate electrode can be minimized. On the other hand, in the conventional low-pass filter, if the same time constant is changed by increasing the capacitance of the capacitor, for example, both the length and the width of the capacitor must be increased at the same time. In the case of being integrally formed on the upper side, the increase of the mounting area due to the change of the time constant becomes remarkable.

The invention of claim 11 is based on the MO described above.
By variably controlling the voltage applied to the gate electrode of the S-transistor, the resistance value of the channel is changed, and by changing the delay amount of the delay section, the oscillation frequency of the two-phase oscillation circuit can be controlled as a whole. Therefore, a voltage-controlled two-phase oscillation circuit can be constructed by changing the gate voltage, and the resonance frequency (tuning frequency) of the LC element
In the case of changing significantly, the frequency of the signal output from the two-phase oscillation circuit can be made to follow this resonance frequency.

According to a twelfth aspect of the present invention, the delay section described above is configured by a charge / discharge circuit in which the element constant of at least one of a resistor and a capacitor is variable.
That is, a low-pass filter can be easily configured by combining a resistor and a capacitor, and this low-pass filter functions as a charging / discharging circuit. Therefore, based on the same principle as the MOS transistor of claim 10 described above, It is possible to cause the two-phase oscillation circuit to perform the oscillation operation. Further, since the time constant of the low-pass filter is changed by changing the element constant of at least one of the resistor and the capacitor, the frequency variable two-phase oscillation circuit can be easily constructed.

The thirteenth aspect of the present invention shows a preferable structure for changing each element constant of the resistor or the capacitor. For example, in order to change the resistance value, the resistor is formed by a general MOS transistor and the gate is formed. The resistance value can be changed by changing the voltage. When the capacitance of the capacitor is changed, for example, a varicap using a pn junction layer is used and the capacitance can be changed by changing the reverse bias voltage. In any case, it can be integrally formed on the semiconductor substrate.

Further, the invention of claim 14 is based on claim 10.
The pseudo sine wave signal extracted from the delay unit shown in 13 is used as a two-phase signal. A sinusoidal signal with less distortion can be obtained by the resonance of the LC element described above, but more preferably, a sinusoidal signal with further reduced distortion can be extracted by inputting a signal close to a sinusoidal wave to this LC element. . Therefore, it is preferable to use the pseudo sine wave obtained by the charge and discharge by the delay unit described above.

According to a fifteenth aspect of the present invention, a phase lock loop (PLL) is formed by using the above-described two-phase oscillation circuit.
Is configured. That is, the reference frequency signal whose frequency and phase are stable and the 2 output from the two-phase oscillator circuit specified by claim 11 or 13
Either one of the phase signals is input to the phase comparator, and the phase comparator generates a voltage signal according to the difference between the input signals. This voltage signal is input to the low-pass filter, and its output is input to the above-described two-phase oscillation circuit, and the frequency is changed. Therefore, the oscillation frequency is determined so that there is no error in the frequency and phase of the output of the two-phase oscillation circuit and the reference frequency signal. The stable oscillation output by this two-phase oscillation circuit is input to the LC element, and similarly, it becomes possible to take out a sine wave output with stable frequency and phase.

[0042]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A sine wave oscillator circuit according to an embodiment of the present invention will be specifically described below with reference to the drawings.

(1) Overall Configuration and Operation of Embodiment FIG. 1 is a diagram showing a schematic configuration of a sine wave oscillator circuit of an embodiment. The sine wave oscillation circuit shown in the figure includes a two-phase oscillation circuit 1 for generating two signals having a phase difference of α degrees, and two inductor conductors formed on a semiconductor substrate for the two signals. An LC element 2 in which a capacitor having a pn junction layer is distributed-constantly formed between these two inductor conductors, and an amplifier for amplifying a signal output from one of the inductor conductors of the LC element 2 And 3 are included.

The LC element 2 has a predetermined resonance frequency determined by the inductance of the two inductor conductors and the capacitance of the pn junction layer formed between the two inductor conductors. Only the frequency signal tuned to the resonance frequency is taken out in the form of a sine wave. In addition, since the pn junction layer is formed along the inductor conductor in a distributed constant manner, the LC element resonates only when two signals having a predetermined phase difference are input to the two inductor conductors. Become.

Therefore, the two-phase oscillating circuit 1 oscillates a two-phase signal having a predetermined phase difference α degrees at which the LC element 2 resonates, and its frequency is made substantially equal to the resonance frequency of the LC element 2. There is a need.

Since the LC element 2 has inductors and capacitors formed in a distributed constant manner, a sharp resonance phenomenon such as a series LC resonant circuit or a parallel LC resonant circuit formed in a lumped constant is generated. Do not mean. Therefore, the frequency of the signal output from the two-phase oscillating circuit 1 does not need to match the resonance frequency of the LC element 2 so strictly, and may be set to be substantially equal.

In the two-phase oscillator circuit 1, a rectangular wave signal or a pseudo sine wave signal can be considered as an output signal. The rectangular wave signal has an advantage that it can be generated by a simple digital circuit (described later), which is convenient when a pseudo sinusoidal signal is used to obtain a more undistorted sine wave output. . That is, since the sine wave oscillation circuit of this embodiment obtains a sine wave by utilizing the resonance in the LC element 2, the waveform of the signal input to this LC element 2 is not necessarily close to a sine wave. No need.
For example, when Q is large, a sine wave signal with a very small amount of distortion can be obtained even when a rectangular wave signal is input. However, when the Q of the LC element 2 cannot be set so high, it is preferable to input a pseudo sine wave signal as close as possible to a sine wave as an input signal, whereby a sine wave signal with almost no distortion can be obtained. become able to.

As described above, according to the sine wave oscillating circuit of this embodiment, a two-phase signal that causes resonance is generated in the LC element 2 in which the inductor and the capacitor are formed in a distributed constant on the semiconductor substrate. By oscillating by the two-phase oscillator circuit 1 and inputting, a sine wave signal with little distortion is taken out from the LC element 2. Therefore, it is not necessary to externally attach a coil or the like around which the conductive wire is wound, and it is not necessary to form an LC resonance circuit with the coil and the capacitor, so that it is possible to downsize the circuit and simplify the mounting or wiring. Become.

(2) Detailed Configuration and Operation of LC Element Next, the detailed configuration and operation of the example of the LC element 2 shown in FIG. 1 will be specifically described.

FIG. 2 is a plan view showing a first example of the LC element 2. 3 is an enlarged sectional view taken along the line AA of FIG.

As shown in these figures, the LC element 2 is
P-type silicon substrate (p-Si substrate) 2 which is a semiconductor substrate
Spiral-shaped n ⁺ region 22 formed near the surface of No. 4
And a p ⁺ region 20 having a spiral shape formed in a part thereof, and these n ⁺ region 22 and p ⁺ region 20 form a pn junction layer 26. Further, as compared with the p-Si substrate 24 described above, the n ⁺ region 22 and p ⁺
The impurity concentration of each of the regions 20 is set high, and a reverse bias voltage is applied between the p-Si substrate 24 and the n ⁺ region 22 to function as an isolation region. . Actually, the voltage of the reverse bias may be surely applied by setting the same potential as that of the input / output electrode 18 described later.

[0052] In addition, LC element 2 of this embodiment is a surface side of the n ⁺ regions 22 described above, the first spiral electrode 10 of the spiral shape at a position along the n ⁺ region 22 is formed There is. Similarly, a surface side of the p ⁺ region 20, the second spiral electrode 12 is formed at a position along the p ⁺ region 20. Two input / output electrodes 14 and 16 are connected to both ends of the first spiral electrode 10. An input / output electrode 18 is provided at one end (for example, the outer peripheral side) of the second spiral electrode 12. As described above, the attachment of the input / output electrodes 14 and 16 or the input / output electrode 18 to the first and second spiral electrodes 10 and 12 is performed by using the thin n ⁺ region 22 or p ^{+ as} shown in FIG.
It is done outside the active area so as not to scratch the area 20.

In the LC element 2 of this embodiment having such a structure, the first and second spiral electrodes 10 and 12 each having a spiral shape function as inductor conductors. Further, when the pn junction layer 26 electrically connected to each of the first and second spiral electrodes 10 and 12 is used in a reverse bias state, it functions as a spiral capacitor. Therefore, the first and second
The LC element 2 in which the inductor formed by the spiral electrodes 10 and 12 and the capacitor formed by the pn junction layer 26 exist in a distributed constant manner is formed.

FIG. 4 is a diagram showing an equivalent circuit of the LC element 2 of this embodiment. As shown in FIG. 3A, the first spiral electrode 10 functions as an inductor having an inductance L1, and a signal input from one of the input / output electrodes 14 is propagated through the first spiral electrode 10. It is output from the other input / output electrode 16. In addition, the second spiral electrode 12 functions as an inductor having the inductance L2, and the input / output electrode 18 provided at one end
A signal whose frequency is equal to that of the signal input to the other inductor and whose phase is shifted by α degrees is input.

In such a connection state, when the voltage level input to the input / output electrode 14 is set higher than the voltage level of the input / output electrode 18, the n ⁺ region 22 and the p ⁺ region 22 are formed ^.
Since a reverse bias voltage is applied to the pn junction layer 26 composed of the region 20, the pn junction layer 26 has a capacitance T C.
Function as a capacitor having Further, this capacitor is formed in a distributed constant over the entire length of the first spiral electrode 10 and the second spiral electrode 12, and exhibits a resonance characteristic, that is, a tuning characteristic, which is not present in the conventional lumped constant type LC element. be able to.

Further, in FIG. 4B, a reverse bias voltage is forcibly applied to the pn junction layer 26, which allows the pn junction layer 26 to reliably operate as a capacitor. Specifically, a bias power supply 28 for applying a predetermined reverse bias voltage is connected between the input / output electrode 14 and the input / output electrode 18, and only the DC component in the input signal is removed. The capacitor 30 is connected to the input / output electrodes 14 and 18 side. By adding such a circuit, a constant reverse bias voltage can be constantly applied to the pn junction layer 26, and a signal superimposed on this reverse bias voltage can be applied to the LC element 2 of this embodiment.
Can be entered.

Since a reverse bias voltage is applied to the signal output from the input / output electrode 16, it is desirable to remove the reverse bias voltage by connecting a capacitor 32 to the outside of the signal.

In FIG. 4C, instead of the bias power supply 28 described above, a variable bias power supply 34 capable of arbitrarily changing the reverse bias voltage level is connected. In general, the width of the depletion layer generated at the pn junction surface changes according to the magnitude of the reverse bias voltage applied to the pn junction layer 26, and the capacitance C also changes accordingly. Therefore, by changing the reverse bias voltage applied to the pn junction layer 26 via the two input / output electrodes 14 and 16, the capacitance C existing in a distributed constant is arbitrarily changed, and the resonance frequency characteristic of the LC element 2 is changed. Can be adjusted or changed.

FIG. 5 is a diagram showing the manufacturing process of the LC element 2 of this embodiment, and shows the state of each manufacturing process of the cross section taken along the line BB of FIG.

Growth of Epitaxial Layer: First of all,
After removing the oxide film on the surface of the p-Si substrate 24 (wafer), the n ⁺ -type epitaxial layer 25 is grown on the entire surface of the p-Si substrate 24 (FIG. 8A).

Formation of isolation region: Next, diffusion of p-type impurities or ion implantation is carried out to make the region other than the n ⁺ region 22 and the p ⁺ region 20 shown in FIG. 2 an isolation region.

Specifically, first, the surface of the epitaxial layer 25 is thermally oxidized to form the oxide film 70. Then, after removing the oxide film 70 at the position where the p region is to be formed by photolithography, the p region is selectively formed by selectively adding p-type impurities by thermal diffusion or ion implantation. The p region thus formed becomes a part of the p-Si substrate 24 to form an isolation region (FIG. 2 (B)).

As a result of the formation of the isolation region in this way, the spiral-shaped n ⁺ region 22 is formed by the remaining epitaxial layer 25.

Formation of pn junction layer: Next, a p-type impurity is introduced into a part of the spirally formed n ⁺ region 22 by thermal diffusion or ion implantation to form a spiral p ⁺ region 20. To do.

Specifically, first, p− including the n ⁺ region 22 is formed.
The surface of the Si substrate 24 is thermally oxidized to form an oxide film 72. Then, the p ⁺ region 20 is formed by photolithography.
After removing the oxide film 72 at the position where the p ⁺ region is to be formed, the p ⁺ region 20 is selectively formed by selectively adding p-type impurities by thermal diffusion or ion implantation.

This p ⁺ region 20 is formed by the n ⁺ formed previously.
Since it needs to be formed in the region 22, the p ⁺ region 20 is formed by adding the p-type impurity in an amount equal to or larger than the amount of the n-type impurity that has already been introduced (FIG. 7C).

In this way, the spiral pn junction layer 26 composed of the n ⁺ region 22 and the p ⁺ region 20 is formed.

Formation of spiral electrode: Next, an oxide film 74 is formed on the surface by thermal oxidation, and then spiral holes are formed on each surface of the n ⁺ region 22 and the p ⁺ region 20 by photolithography. The first and second spiral electrodes 10 and 12 are formed by, for example, vapor-depositing aluminum on the spirally formed portion.
Are formed ((D) in the figure). Further, thereafter, each of the two input / output electrodes 14 and 16 and the input / output electrode 18 is formed by vapor deposition of aluminum.

Finally, P-glass is deposited on the entire surface and then heated to form a flat surface, whereby the LC element 2 is completed.

The process for manufacturing the LC device 2 of this embodiment is as follows.
Basically, the process is similar to that of manufacturing a normal bipolar transistor or diode, and the pn junction layer 26
And the shape of the isolation region between them are different. Therefore, it can be dealt with by changing the shape of the photomask in the process of manufacturing a general bipolar transistor, which facilitates manufacturing and is suitable for downsizing. Further, it can be formed on the same substrate as semiconductor components such as general bipolar transistors and MOS-FETs, and can be formed as a part of IC or LSI. Moreover, when it is formed as a part of an IC or an LSI, it is possible to omit the work of assembling the parts in the subsequent process.

In the above-described manufacturing process of this embodiment, the case where isolation is performed after first forming the n ⁺ region on the entire surface by epitaxial growth has been described as an example. However, on the surface of the p-Si substrate 24, After forming the oxide film, a spiral-shaped n
⁺ Performs Apertures corresponding to the region 22, formed directly p ⁺ region 20 after formation of the n ⁺ region 22 by introducing n-type impurities by thermal diffusion or ion implantation in this part, in the same manner You may. Further, as a method of forming the pn junction layer, a general semiconductor manufacturing technique can be used.

As described above, in the LC element 2 of this embodiment, each of the first and second spiral electrodes 10 and 12 forms an inductor and the spiral pn junction layer formed between these electrodes. 26 functions as a capacitor by being used in reverse bias. Moreover, since the pn junction layer 26 is formed over the entire length of the first and second spiral electrodes 10 and 12, the first and second spiral electrodes are formed.
The inductances L1 and L2 formed in the spiral electrodes 10 and 12 and the capacitance C formed by the pn junction layer 26 exist in a distributed constant manner. Therefore,
This LC element 2 will function as a low-pass filter having an attenuation characteristic over a wide band in a high frequency region. That is, from another point of view, it can be said that the distributed constant type LC element 2 has a wide-band attenuation characteristic in the high frequency region, but its attenuation tendency is gentle near the resonance point.

Further, as described above, this LC element 2 is
Since it can be manufactured by applying a manufacturing technique of a general bipolar transistor or the like, it is easy to manufacture and suitable for miniaturization. Also, this L is used as a part of the semiconductor substrate.
When the C element is manufactured, wiring with other components such as the two-phase oscillation circuit 1 can be performed at the same time, and the assembling work or the like in the subsequent process becomes unnecessary.

Further, in the LC element 2 of this embodiment, the capacitance C of the capacitor formed in a distributed constant can be variably controlled by changing the value of the reverse bias voltage applied to the pn junction layer 26. Since the resonance frequency (tuning frequency) of the LC element 2 can be adjusted or changed, the frequency of the sine wave signal output from the circuit of FIG. 1 can also be changed. In particular, as described above, the distributed constant type LC
Since the element 2 has a gentle attenuation characteristic in the vicinity of the resonance point, the frequency of the signal output from the two-phase oscillation circuit 1 shown in FIG. 1 and the resonance frequency of the LC element 2 are slightly different from each other. However, the amplitude level of the sine wave signal output from the amplifier 3 is not so affected.

As described above, the frequency of the sine wave signal is also changed by using the distributed constant type LC element 2 and changing the resonance frequency of the LC element 2 by variably controlling the reverse bias voltage applied to the pn junction layer 26. It can be arbitrarily changed within a certain range.

Next, a second example of the LC element 2 will be described.
The LC element 2 in the above-mentioned first example is formed in parallel over almost the entire length of the first and second spiral electrodes 10 and 12, that is, in approximately the same length, but in the second example. The LC element 2 is the first element shown in FIG.
The spiral electrode 12 is shortened by about 1 turn, and the corresponding pn junction layer 26 is shortened by about 1 turn.

FIG. 6 is a plan view of the LC element 2 of the second example. As shown in FIG. 6, even when the second spiral electrode 12 and the corresponding pn junction layer 26 are partially omitted, the inductor formed by the shortened second spiral electrode 12 and the inductor are shortened. Since the capacitor formed by the pn junction layer 26 is formed in a distributed constant manner, it has the same tendency as the LC element 2 shown in FIG.

FIG. 7 is a diagram showing an equivalent circuit of the LC element 2 of this embodiment. As shown in FIG. 7A, the inductance L3 is reduced by the number of turns of the second spiral electrode 12, and correspondingly the capacitance C1 existing in a distributed constant is also reduced.

Further, as shown in FIGS. 7B and 7C, a capacitor 30 is connected between the input / output electrode 14 and the input / output electrode 18 together with the bias power source 28 or the variable bias power source 34. As a result, the pn junction layer 26
It is possible to reliably realize the reverse bias of
Similar to the LC element 2 shown in FIG. 2, the characteristic value can be changed by variably controlling the value of the reverse bias voltage.

Next, a specific example of the LC element 2 in the third example will be described. L in the above-mentioned first and second examples
The C element 2 is one in which the second spiral electrode 12 is formed of one conductor, but the LC element 2 in the third example has a plurality of second spiral electrodes 12 (for example, three divided electrodes). It is characterized in that it is divided into pieces 12-1, 12-2, 12-3) divided electrode pieces.

FIG. 8 is a plan view of such an LC element 2. As shown in the same figure, this LC element 2 includes the second spiral electrode 12 used in the LC element 2 shown in FIG. 2 as three divided electrode pieces 12-1, 12-2, 12-3.
It has a structure replaced with. A common input / output electrode 18 is connected to each of the split electrode pieces 12-1 to 12-3 having a spiral shape as a whole.

FIG. 9 is a diagram showing an equivalent circuit of the LC element 2. As shown in FIG. 1A, the entire first spiral electrode 10 functions as an inductor having an inductance L1, and each split electrode piece 12-1, 1
2-2 and 12-3 are inductances L3 and L, respectively.
4 and L5 function as an inductor. And
First spiral electrode 10 and divided electrode pieces 12-1 to 12-1
The pn junction layer 26 between each of 2-3 functions as a capacitor having capacitances C2, C3, C4, and these capacitors exist in a distributed constant manner.

Further, FIG. 9B and FIG. 9C show circuits for applying a forced reverse bias voltage or a variably settable reverse bias voltage. These figures correspond to FIGS. 4B and 4C,
With such a circuit configuration, the pn junction layer 26
Can be operated reliably as a capacitor, or the resonance frequency of the LC element 2 can be changed by changing the capacitance of this capacitor.

In the LC element 2 of this embodiment, the self-inductances L3, L4 and L5 of the divided electrode pieces 12-1, 12-2 and 12-3 are small. Therefore, the influence of these self-inductances on the characteristics of the LC element 2 is reduced, and the inductance L1 of the first spiral electrode 10 and the capacitances C2, C3, C4 formed in a distributed constant form the LC element 2 as a whole. The resonance frequency will be almost determined.

Next, a specific example of the LC element 2 in the fourth example will be described. In each of the LC elements 2 described above, the first and second spiral electrodes 10 and 12 are formed in a spiral shape, and correspondingly, the pn junction layer 26 is also formed in a spiral shape. On the other hand, the LC element 2 shown below is characterized in that the electrode shape is formed in a meandering shape, and the pn junction layer formed along the electrode shape is also formed in a meandering shape.

That is, generally, by forming the electrode in a spiral shape, it functions as an inductor having a large inductance, but when the frequency band to be used is a high frequency, a small inductance is sufficient, and therefore it is always necessary to form the spiral shape. There is no. Therefore, even when the conductor is formed in a meandering shape, it is possible to form an LC element that can be used in a high frequency region.

FIG. 10 shows a planar structure of the LC element 2 in which the first and second spiral electrodes 10 and 12 shown in FIG. 2 are replaced with meandering electrodes 10a and 10b. The LC element 2 is the same as the LC element 2 shown in FIG. 2 except that the meandering electrodes 10a and 10b are used, and the sectional structure and the like shown in FIG. Further, the equivalent circuit shown in FIG. 4 can be applied.

FIG. 11 is a diagram showing the principle of the inductor when the meandering electrode is used in this way. As shown in the figure, the meandering electrode 10a having a meandering shape bent in an uneven shape.
Alternatively, when a current in one direction is applied to 10b, magnetic fluxes whose directions are opposite to each other are alternately generated in the adjacent uneven portions, resulting in a state in which coils of 1/2 turn are connected in series. For this reason, although not so much as the case where the spiral spiral electrode is used, it can function as an inductor conductor having a predetermined inductance.

When a spiral spiral electrode is used, one of both ends of the electrode is located at the center and the other is located at the periphery, whereas a meandering electrode is used. Since both ends of the electrode are located in the peripheral part,
This is convenient when providing terminals or connecting to other circuits.

FIG. 12 shows two meandering electrodes 10a and 1a.
7 shows a planar structure of the LC element 2 when the length of 0b is different, and the first and second spiral electrodes 10 and 12 of the LC element shown in FIG. 6 are replaced with the meandering electrode 10 shown in FIG.
It is replaced with a and 10b.

The same applies to the case where the first and second spiral electrodes 10 and 12 of the LC element shown in FIG. 8 are replaced with meandering electrodes. L with little influence of inductance
A C element can be formed.

(3) Detailed Configuration and Operation of Two-Phase Oscillation Circuit Next, the detailed configuration and operation of the specific example of the two-phase oscillation circuit 1 shown in FIG. 1 will be described.

FIG. 13 is a diagram showing the principle of the two-phase oscillator circuit 1 in one embodiment, which is applied when the phase difference α of signals is near 90 degrees. The waveform shaping section 110 shown in FIG.
The waveform of the voltage level at the input terminal is shaped into a logical output of H level or L level, that is, a rectangular wave signal. Similarly, the waveform shaping section 114 also outputs a rectangular wave signal based on the voltage level applied to the input end. here,
Either one of the two waveform shaping sections 110 and 114, for example, the waveform shaping section 110 is for inverting the logic of the input signal at the same time as the waveform shaping, and the other waveform shaping section 114 is for inverting the logic of the input signal. As it is, only the waveform is shaped and output.

Further, each of the delay units 112 and 116 is for outputting the input signal after delaying it by a predetermined time, and in the simplest case, is constituted by a low-pass filter having a charging / discharging function as described later. can do.

The above-described two-phase oscillator circuit 1 includes the waveform shaping section 1
10, delay unit 112, waveform shaping unit 114, delay unit 116
Are connected in series in a ring shape. The signals f2 output from the waveform shaping units 110 and 114,
f1 is taken out to the outside.

The oscillation principle of the two-phase oscillation circuit 1 of this embodiment having such a configuration is as follows.

Assuming that the logic of the output signal of the waveform shaping section 110 is H at a certain time point, this signal is directly input to the waveform shaping section 114 via the delay section 112. Since the waveform shaping section 114 outputs the signal as it is without changing the logic, the signal of this logic H is returned to the waveform shaping section 110 as it is through the delay section 116. The waveform shaping section 110 inverts the logic of the signal and outputs the L signal. This state change is transmitted to the waveform shaping section 114 after being delayed by the delay section 112 for a predetermined time. That is, the logic of the output signal of the waveform shaping unit 114 also becomes L after the elapse of a predetermined time.
To the waveform shaping section 110 after being further delayed by the delay section 116.

In this way, the logic of the output signal of the waveform shaping section 110 is inverted every time the state change of the output of the waveform shaping section 110 completes, so that continuous oscillation is performed. Further, the oscillation frequency at this time is determined according to the time when the state change makes one round, and therefore the two delay units 112 and 116 are provided.
By varying the delay amount due to, the overall oscillation frequency can be arbitrarily changed.

FIG. 14 is a diagram in which the configuration of FIG. 13 is further embodied. In the two-phase oscillator circuit 1 shown in the figure, the waveform shaping unit 110 is made to include an EX-NOR circuit 120 and a delay unit 112.
The CR element 122 controls the waveform shaping section 114 to be EX-N.
The OR circuit 124 causes the delay unit 116 to move the CR element 126.
Shows the case where they are respectively formed.

One of the two input terminals of the EX-NOR circuit 120 is grounded, and the output of the CR element 126 is input to the other. That is, EX-
The NOR circuit 120 has a function as an inverter logic circuit. When the voltage level of the input signal exceeds a predetermined threshold value, the logic of the output signal is set to L, and the voltage level of the input signal is below the predetermined threshold value. The output signal logic becomes H
As, a rectangular wave signal that maintains one of two logic states is output.

On the other hand, in the EX-NOR circuit 124, one of the two input terminals is at a predetermined potential (voltage level corresponding to logic H), and the logic H signal is always input. There is. Therefore, it has a function of outputting the logic of the signal input to the other as it is, and when the voltage level of the input signal becomes equal to or higher than a predetermined threshold value, the logic of the output signal is set to H and vice versa. The logic of the output signal is set to L when it becomes less than or equal to the threshold value.

Further, each of the CR elements 122 and 126 has a structure similar to that of a normal MOS transistor, and by setting the gate length to be twice or more the gate width, the resistance due to the channel and the channel A capacitor formed between the gates functions as a CR composite element formed in a distributed constant, that is, a low-pass filter. The detailed structure will be described later.

FIG. 15 is a circuit diagram of the two-phase oscillator circuit 1 shown in FIG.
5 is a diagram showing the operation timing of FIG. Figure 15 (A) shows EX
-The output f2 of the NOR circuit 120, the output of the CR element 122 in the same figure (B), and the EX-NOR circuit 12 in the same figure (C).
4 shows the output f1 of FIG. 4 and the output of the CR element 126 is shown in FIG.

In FIG. 10A, when the output of the EX-NOR circuit 120 falls, the output voltage of the CR element 122 acting as a low pass filter having a charging / discharging function gradually decreases. Then, when this output voltage becomes lower than a certain threshold value, the logic of the output of the EX-NOR circuit 124 changes from H to L. Then, the output voltage level of the CR element 126 also gradually decreases. Therefore, when this output voltage level becomes equal to or lower than the predetermined threshold value, the logic of the output of the EX-NOR circuit 120 is inverted from L to H.

In this way, the EX-NOR circuit 120
The output logic changes from H to L or from L to H,
A continuous oscillation operation can be obtained. The oscillation frequency at that time depends on the time constant determined by the channel resistance of the two CR elements 122 and 126 and the capacitance between the channel and the gate.

FIG. 16 is a diagram showing a detailed structure of the CR elements 122 and 126. FIG. 7A is a plan view of the CR elements 122 and 126 formed on the semiconductor substrate, and FIG. 8B is a sectional view taken along the line AA.

As shown in the figure, the CR elements 122, 12
6 is a gate electrode 13 having a predetermined gate length
6 and a source 12 which is two diffusion regions (n regions) provided on the semiconductor substrate (for example, p-type silicon substrate) 144 near both ends in the longitudinal direction of the gate electrode 136.
8 and the drain 130, and two input / output electrodes 13 electrically connected to the source 128 and the drain 130.
2, 134 and a gate oxide film 142 formed between the semiconductor substrate and the gate electrode 136. A control electrode 138 is connected to the gate electrode 136 to apply a voltage from the outside.

The CR element 122 having such a structure,
126 has a configuration similar to that of a general MOS transistor as described above, and by setting the gate width L of the gate electrode 136 to be long, the gate electrode 136 is formed.
Is characterized in that the resistance of the channel 140 formed corresponding to and the capacitance formed between the gate electrode 136 and the channel 140 are formed in a distributed constant manner.

Generally, the delay amount by the low-pass filter is proportional to the product RC of the resistance R and the capacitance C, but the channel resistance R in the CR elements 122 and 126 is proportional to the gate length L and inversely proportional to the gate width W. Also, the gate electrode 1
The capacitance C between 36 and the channel 140 is proportional to the gate length L and the gate width W, respectively. Therefore, RC multiplied by these is proportional to (L / W) × LW = L ² , and the delay amount is largely changed by changing only the gate length L regardless of the gate width W. be able to. That is, it is possible to drastically change the oscillation frequency by changing only the gate length L, and it is possible to easily design the two-phase oscillation circuit 1 that can obtain an arbitrary frequency output from a low frequency to a high frequency.

Further, since the depth of the channel 140 can be changed by changing the gate voltage applied to the gate electrode 136 via the control electrode 138, the channel resistance R can be arbitrarily changed. For example, when an n-channel is formed on a p-type silicon substrate and the enhancement type is taken as an example, the depth of the channel 140 is increased and the channel resistance R is increased by increasing the value of the positive gate voltage. Becomes smaller. The relationship between the gate voltage and the channel resistance R can be arbitrarily changed when using a p-channel or when using a depletion type MOS structure.

Therefore, by changing the gate voltage to change the channel resistance R, the CR elements 122, 1
It is possible to variably control the delay amount by 26 to arbitrarily control the oscillation frequency.

As described above, according to the two-phase oscillator circuit 1 described above, the EX-NOR circuit and the CR element are set as one set, and these two sets are connected in a ring shape, so that the phases are substantially 90 degrees. Two shifted clock signals can be obtained. Further, by making the gate voltages of the CR elements 122 and 126 different, it is possible to change the phase difference before and after the center of 90 degrees. This two-phase oscillator circuit 1
Is configured by using only two EX-NOR circuits and two CR elements, respectively, and the configuration is very simplified. Further, each of the CR elements 122 and 126 is integrally formed on the semiconductor substrate, and the EX-NOR circuit 12
Since 0 and 124 can be similarly formed on the semiconductor substrate, the two-phase oscillation circuit 1 together with the LC element 2 described above can be formed.
Can be formed on one semiconductor substrate, and M
Mass production by OS manufacturing technology becomes possible.

FIG. 17 is a diagram showing a configuration for obtaining a two-phase clock signal having a phase difference of approximately 180 degrees from each other by adding a simple configuration to the circuit shown in FIG. 18 is a diagram showing operation timing of the additional circuit shown in FIG.

FIG. 17 shows a structure for producing a two-phase clock signal whose phases are shifted from each other by about 180 degrees, and is composed of an AND circuit 146 and a NOR circuit 148.
The respective outputs of the EX-NOR circuits 120 and 124 shown in FIG. 14 are input to the two input terminals of the AND circuit 146 and the NOR circuit 148. FIG. 18 (A),
Each of (B) shows signals f1 and f2 output from the EX-NOR circuits 120 and 124 and input to the respective input terminals of the AND circuit 6 and the NOR circuit 148.

Then, the AND circuit 146 obtains the logical product of the two signals f1 and f2, and outputs the signal f3 shown in FIG. 18C. Similarly, the NOR circuit 148 obtains the logical sum of the two signals f1 and f2, further inverts this result, and outputs the signal f4 shown in FIG. 18 (D). The two signals f3 and f4 thus obtained become two-phase clock signals whose phases are shifted by 180 degrees. Further, by making the gate voltages of the CR elements 122 and 126 different, it is possible to change the phase difference before and after the center of 180 degrees.

FIG. 19 is a diagram showing a configuration in the case where a phase lock loop (PLL) using the above-described two-phase oscillator circuit 1 is formed. According to the two-phase oscillation circuit 1 shown in FIG. 14, the oscillation frequency is unstable, and the frequency and phase may fluctuate slightly. Therefore, in order to obtain an oscillation output with a stable frequency and phase, a crystal oscillation is required. A method of locking the frequency and the phase to a reference signal created based on a child or the like is well known, and an example of the configuration shown in the figure is shown.

The reference frequency oscillator 152 amplifies the weak oscillation signal obtained by the crystal oscillator and then divides it to output a reference frequency signal fr. The reference frequency signal fr is input to one input terminal of the phase comparator 154.

The phase comparator 154 has one output signal f2 of the VCO 158, which will be described later, inputted to the other input terminal thereof, and outputs the phase and frequency of the reference frequency signal fr and the feedback signal f2 inputted to the two input terminals thereof. It compares and outputs the signal according to the error. For example, the phase comparator 154 has two output terminals A and B, and when the phase of the feedback signal f2 is ahead of the reference frequency signal fr, the phase advanced from one output terminal A. Logical H equivalent to minutes
And a signal having a pulse width of logic H corresponding to the delayed phase is output from the other output terminal B in the opposite case. These signals are input to the LPF (low pass filter) 56 at the next stage.

The LPF 56 sets a voltage level according to the output signal of the phase comparator 154 and applies it to the VCO (voltage controlled oscillator) 158 in the subsequent stage. Specifically, when the pulse signal is output from the phase comparator 154, the voltage level according to the duty ratio is set.

The VCO 158 is an oscillation circuit whose oscillation frequency is controlled according to the applied voltage, and the two-phase oscillation circuit 1 shown in FIG. 14 can be applied as it is. In this case, the signal f1 output from the EX-NOR circuit 124 is generated by applying the output voltage of the LPF 156 to the gate electrodes 136 of the CR elements 122 and 126, respectively.
And the signal f2 output from the EX-NOR circuit 120
It suffices to control each of the frequencies.

Further, one output signal f2 is input to one input end of the phase comparator 154 as a feedback signal, whereby the one output signal f2 matches the reference frequency signal fr in phase and frequency. Like VCO15
Oscillation by 8 is performed.

FIG. 20 shows the structure shown in FIG. 19 in more detail. The phase comparator 154 is shown in FIG.
And an example of detailed connection of the LPF 156 is shown. For example, from the phase comparator 154, when one output signal f2, which is a feedback signal, is ahead of the reference frequency signal fr in phase, a signal having a pulse width corresponding to the advanced phase is output from the output terminal A. Output from. Further, when the output signal f2 lags behind the phase of the reference frequency signal fr, a signal having a pulse width corresponding to the delay is output terminal B.
Output from. In addition, the phase comparator 154 and the LPF 156
A voltage dividing circuit composed of two resistors 160 and 164 and an inverter logic circuit 162 is connected between and. That is, the resistor 160 is connected to the output terminal B side of the phase comparator 154, and the resistor 164 is connected to the output terminal A side via the inverter circuit 162, and these two resistors 160 and 164 are connected. The point is connected to the input side of the LPF 156 composed of, for example, a capacitor and a resistor.

Next, in the PLL having such a configuration, the output signal f2 of the VCO 158 is converted into the reference frequency signal fr.
The operation when the lock is performed will be described.

For example, when the phase and frequency of the output signal f2 are equal to the phase and frequency of the reference frequency signal fr, a logic L signal is output from each of the two output terminals A and B of the phase comparator 154. . At this time, the logic L signal output from one output terminal B is inverted by the inverter logic circuit 162 to become a logic H signal. Therefore, the voltage level of the logic L signal and the voltage level of the logic H signal are changed. The voltage divided by the two resistors 160 and 164 is applied to the LPF 156. In this case, since the voltage applied to the LPF 156 does not change,
The applied voltage is directly applied to the VCO 158, that is,
An output signal f2, which is applied as the gate voltage of the EX-NOR circuits 122 and 126 shown in FIG. 14 and oscillates at a constant frequency, is obtained.

When the phase of the output signal f2 lags the phase of the reference frequency signal fr, a signal having a pulse width corresponding to this delay is output from one output terminal B of the phase comparator 154. It will be. Therefore, the average level of the voltage division by the two resistors 160 and 164 rises by the amount corresponding to this pulse width and is applied to the LPF 156, so that the EX of FIG.
-The gate voltage applied to the NOR circuits 122 and 126 will rise. Accordingly, the EX-NOR circuit 1
The resistance value of each channel forming the signal paths of 22, 126 becomes low, and the EX-NOR circuits 122, 1
The amount of signal delay due to 26 is reduced, and the phase of the oscillation output f2 advances. In this way, when the phase of the output signal f2 lags behind the reference frequency signal fr, control is performed to advance the phase.

On the other hand, when the phase of the output signal f2 leads the reference frequency signal fr, the output terminal A of the phase comparator 154 outputs a signal having a pulse width corresponding to the lead. Therefore, the average level of the voltage division by the two resistors 160 and 164 is reduced by an amount corresponding to this pulse width, and the voltage of which the average level is reduced constitutes the LPF 156 to the VCO 158 of FIG.
-It is applied as the gate voltage of each of the NOR circuits 122 and 126. Therefore, contrary to the case described above, the resistance value of each channel increases, the delay amount increases, and the phase is controlled to be delayed.

As described above, by using the two-phase oscillator circuit 1 shown in FIG. 14 as the VCO 158, the output signal f whose phase and frequency are locked to the reference frequency signal fr is output.
You can get 2. Since the two-phase clock oscillator circuit 1 shown in FIG. 14 can output another output signal f1 which is synchronized with one output signal f2 and whose phase is shifted by 90 degrees, it is shown in FIG. Even when the PLL is configured, it is possible to simultaneously generate two output signals f1 and f2 whose phases are shifted from each other by approximately 90 degrees.

In particular, the VCO 158 of this embodiment is shown in FIG.
It is possible to integrally form all the components on the semiconductor substrate, as shown in FIG. 1, and similarly, when the phase comparator 154 and the LPF 156 are formed on the semiconductor substrate, a crystal oscillator is used. It is possible to integrally mold the entire PLL except the PLL on the semiconductor substrate.

FIG. 20B shows an example of a case where the LPF 156 described above is composed of CR elements.
As described above, since the CR elements 122 and 126 function as a low-pass filter in which the resistance and the capacitor are formed in a distributed constant, the CR elements 122 and 126 directly constitute the PLL.
It can also be used as the PF 156. In this case,
Since it is not necessary to change the characteristics of the LPF 156, the gate voltage Vg of the CR element can be fixed. Further, the gate voltage Vg may be changed according to the oscillation frequency.

FIG. 21 is a diagram showing another detailed example of the two-phase oscillation circuit 1 whose principle is shown in FIG. As shown in FIG. 21, one waveform shaping section 110 is configured by an inverter logic circuit 170, and the other waveform shaping section 114 is configured by two inverter logic circuits 176 and 178.
Also, an MO using one delay unit 112 as a resistor.
The MOS transistor 180 and the capacitor 18 which use the other delay unit 116 as a low antibody by the low-pass filter including the S transistor 172 and the capacitor 174.
Each of them is composed of a low-pass filter of 2 and.

The inverter circuit 170 forming one of the waveform shaping sections 110 is the EX-NOR circuit 120 shown in FIG.
And the logic inversion at the same time as waveform shaping is performed. In addition, the two inverter circuits 17 that configure the other waveform shaping unit 114.
Reference numerals 6 and 178 perform operations that are functionally equivalent to those of the EX-NOR circuit 124 shown in FIG. 14, and as a whole, only waveform shaping can be performed without logical inversion.

The MOS transistor 172 and the capacitor 174 forming the one delay section 112 are C shown in FIG.
It is functionally the same as the R element 122. The CR element 122 described above functions as a low-pass filter in which a resistor and a capacitor are formed in a distributed constant, but a MOS transistor 172 and a capacitor 174.
The circuit composed of and functions as a low-pass filter formed of lumped constant elements, and it can be said that the relationship between the input and the output is almost the same. That is, when the output of the inverter logic circuit 170 changes from H to L or from L to H, the output is changed gently according to the time constant, and the delay amount according to the time constant is determined. The entire oscillation frequency is controlled in the same manner as the circuit shown in FIG. In particular, since the channel resistance changes by controlling the gate voltage of each of the MOS transistors 172 and 180, the time constant of the low pass filter also changes, which allows the oscillation frequency to be arbitrarily changed.

Therefore, the two-phase clock signal can be easily generated by the simple circuit shown in FIG. In addition, by adding the configuration shown in FIG. 17, there is no change in that a two-phase clock signal whose phase is shifted by approximately 180 degrees can be easily generated, and by configuring the PLL shown in FIG. A stable oscillation output can be obtained. Moreover, since the circuit shown in FIG. 21 can be integrally molded on a semiconductor substrate, it can be formed as a part of an IC or the like even when a PLL is configured, or when it is manufactured as a single unit. Can be easily mass-produced.

The waveform shaping section 110 shown in FIG. 14 and the delay section 112 shown in FIG. 21 are combined, or the delay section 112 shown in FIG. 14 and the waveform shaping section 1 shown in FIG.
It goes without saying that any combination such as a combination of 10 and 10 is possible.

Further, the present invention is not limited to the above embodiments, and various modifications can be made within the scope of the gist of the present invention.

For example, in the above-described two-phase oscillator circuit having the configuration shown in FIG. 14 or FIG. 21, a series circuit including a waveform shaping section and a delay section is formed into a two-stage ring shape in order to generate a two-phase clock signal. Although the case of connection has been described, it is also possible to form a polyphase oscillation circuit that generates an arbitrary polyphase clock signal including an even phase by increasing the number of stages of this series circuit, and by extracting only two of these phases. , A two-phase signal having an arbitrary phase difference can be obtained. Therefore, it is more convenient when a two-phase signal having a phase difference α that causes resonance in the LC element 2 of FIG. 1 is obtained.

FIG. 22 is an expanded version of the circuit shown in FIG.
It is a figure which shows the structure at the time of forming the two-phase oscillation circuit 1 of a step. As shown in the figure, the configuration shown in FIG.
-A third series circuit composed of the NOR circuit 176 and the CR element 178 and a fourth series circuit composed of the EX-NOR circuit 180 and the CR element 182 are added to connect the whole in a ring shape. 2 phase oscillator circuit 1
Is configured. Then, four-phase clock signals having different phases are obtained from the four EX-NOR circuits,
Only two of them are taken out.

Further, the delay unit 11 shown in FIG.
Each of 2 and 116 has been described as an example in which a low-pass filter is formed by a MOS transistor and a capacitor. However, the MOS transistor is replaced with a low antibody whose element constant is fixed, and the capacitor is formed by varicap using a pn junction layer. It may be formed. In this case, the time constant of the low pass filter may be changed by variably controlling the capacitance of the varicap by changing the bias voltage applied to the varicap. Further, it goes without saying that a low pass filter can be formed by combining a MOS transistor and a varicap.

Further, in each of the above-described embodiments, the oscillator circuit capable of obtaining the two-phase clock signal has been described. For example, as shown in FIGS. 15B and 15D, charging / discharging is performed in the delay section. Since the waveform after being cut is a pseudo sine wave that is almost equal to the sine wave, the pseudo sine wave output may be taken out from each delay unit. In this case, a two-phase pseudo sine wave oscillator circuit can be formed with a simple structure. In particular, if such a pseudo sine wave signal can be input to the LC element 2 shown in FIG.
Even if the value is not so large, a sine wave signal with very little distortion can be obtained as its output.

Further, in the above-mentioned oscillation circuit shown in FIG. 14 or FIG. 21, the oscillation starts immediately when the power is turned on. However, in order to prevent abnormal oscillation at startup, -A configuration for performing stop control may be added. For example, in the case shown in FIG. 14, a signal of logic L is input to one input end of the EX-NOR circuit 124 immediately after the power is turned on, and then switching to the signal input of logic H is made to start oscillation. Good. In addition, FIG.
In the case shown in (1), either the inverter circuit 170 or the inverter logic circuit 176 is replaced with a NAND circuit, and the logic of the signal input to one input terminal is set to L immediately after the power is turned on, and then the logic of this signal is set to H. It may be switched and oscillated.

The inverter circuits used in the above-described embodiments are MOS inverters or CMOS.
Although it is preferable to use an inverter, other logic such as TTL may be used. Especially MOS
Alternatively, in the case of a CMOS structure, the CR element 122
Since it becomes possible to manufacture the whole including the above and the like by the MOS manufacturing technique, it is more convenient for mass production or facilitation of manufacturing.

[0142]

As described above, according to the first aspect of the invention, the LC element is formed on the semiconductor substrate by the two inductor conductors and the capacitors formed in a distributed constant manner between them, and the LC element is formed. By inputting a two-phase signal having a phase difference necessary for causing resonance in the element,
It is possible to obtain a sine wave signal with little distortion, which is tuned to the resonance frequency of the LC element. Further, since the LC element itself is formed on the semiconductor substrate, it can be integrally formed with other circuits such as a two-phase oscillation circuit, and an external component such as a coil around which a conductor is wound is unnecessary, The circuit can be miniaturized.

Further, according to the invention of claim 2, the above-mentioned LC element is composed of two spiral inductor conductors and a capacitor having a pn junction layer formed between them, which is very easy to manufacture. It will be easy. Especially this LC
Since the element can be easily integrally formed on the semiconductor substrate, it is possible to form this LC element together with the two-phase oscillation circuit as part of an IC or LSI. It is possible to omit assembly work of parts and wiring work in a later process.

According to the third aspect of the present invention, the spiral inductor conductor described above is replaced with a meandering inductor conductor, which is particularly suitable for handling high frequency signals. Further, when the inductor conductor is formed in a meandering shape as described above, a part of each inductor conductor is located in the outer circumference, and therefore, when connecting to the two-phase oscillation circuit or extracting the sine wave signal to the outside. Wiring and terminals are easy.

Further, according to the invention of claim 4, the length of the two inductor conductors included in the above-mentioned LC element is changed, and the point that the capacitors exist between them in a distributed constant manner. Since there is no change, a sinusoidal signal with less distortion can be taken out by using this LC element as a tuning circuit.

Further, according to the invention of claim 5, one of the two inductor conductors included in the above-mentioned LC element or the pn junction layer corresponding thereto is divided into a plurality of pieces. The LC element is less affected by the self-inductance, and the sine wave signal having different frequencies can be obtained by changing the resonance frequency.

According to the invention of claim 6, the resonance frequency of the LC element, that is, the tuning frequency can be made variable by changing the reverse bias voltage applied to the pn junction layer described above, and the applied voltage can be changed. It is possible to easily realize a voltage control type oscillating circuit capable of outputting a frequency-variable sine wave signal according to the above.

Further, according to the invention of claim 7, the above-mentioned two-phase oscillation circuit is constituted by connecting a plurality of series circuits composed of a waveform shaping section and a delay section in a ring shape,
By arbitrarily setting the number of stages of the series circuit and the delay amount by each delay unit, it is possible to arbitrarily set the phase difference between the two output signals, and a two-phase signal that causes resonance in the LC element. Can be easily obtained.

Further, according to the invention of claim 8, each of the waveform shaping sections is configured to include an exclusive OR, and when configured to include an exclusive OR as described above, all Since the waveform shaping section can have the same configuration,
This makes it easy to design the delay amount by the delay unit.

Further, according to the invention of claim 9, each of the waveform shaping sections is configured to include an odd number or an even number of inverter logic circuits. The respective configurations are simplified and the entire circuit can be downsized.

According to the tenth aspect of the present invention, each delay section is constituted by a MOS transistor having a long gate electrode, and the delay R and the capacitance C used for determining the time constant are set. The product RC will be proportional to L ² . Therefore, by changing only the gate length of the MOS transistor, the time constant of the MOS transistor functioning as a low-pass filter can be arbitrarily changed, and the oscillation frequency of the two-phase oscillation circuit can be easily adjusted or changed. It becomes easy to peel off.

According to the invention of claim 11, the resistance value of the channel is changed by variably controlling the voltage applied to the gate electrode of the MOS transistor, and the voltage is changed by changing the gate voltage. A control-type two-phase oscillation circuit can be configured, and when the resonance frequency (tuning frequency) of the LC element is significantly changed, the frequency of the signal output from the two-phase oscillation circuit follows the resonance frequency of the LC element. It becomes possible.

According to the twelfth aspect of the present invention, the delay section of the two-phase oscillation circuit is configured by a charge / discharge circuit in which at least one of the resistor and the capacitor has a variable element constant, and the frequency is variable in two phases. The oscillator circuit can be easily configured.

According to the thirteenth aspect of the present invention, there is shown a preferable configuration for changing the element constant of the resistor or the capacitor. For example, in order to change the resistance value, the resistor is formed by a general MOS transistor. The resistance value can be changed by changing the gate voltage.
Further, in order to change the capacity of the capacitor, for example, a varicap using a pn junction layer is used, and the capacity can be changed by changing the reverse bias voltage. In any case, it can be integrally formed on the semiconductor substrate.

According to the fourteenth aspect of the invention, the pseudo sine wave signal extracted from the delay section shown in the tenth to thirteenth aspects is used as a two-phase signal to be inputted to the LC element, and the resonance of the LC element is caused. Can obtain a sinusoidal signal with little distortion.

According to the fifteenth aspect of the present invention, the above-described two-phase oscillator circuit is used to form a phase-locked loop, and a two-phase signal having a stable phase and frequency can be obtained. As a result, a sine wave output whose frequency and phase are stable can be taken out.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a schematic configuration of a sine wave oscillator circuit according to an embodiment.

FIG. 2 is a diagram showing a specific example of an LC element.

FIG. 3 is a view showing an enlarged cross section taken along the line AA of FIG.

4 is a diagram showing an equivalent circuit of the LC element shown in FIG.

5 is a diagram showing an example of a manufacturing process of the LC element shown in FIG.

FIG. 6 is a diagram showing a modification of the LC element of FIG.

7 is a diagram showing an equivalent circuit of the LC element shown in FIG.

FIG. 8 is a diagram showing a modification of the LC element shown in FIG.

9 is a diagram showing an equivalent circuit of the LC element shown in FIG.

10 is a diagram showing a modification of the LC element shown in FIG.

11 is a diagram showing the operating principle of the inductor of the LC element shown in FIG.

12 is a diagram showing a modified example of the LC element shown in FIG.

13 is a diagram showing a schematic configuration of an example of the two-phase oscillation circuit shown in FIG.

14 is a diagram showing a specific example of the two-phase oscillator circuit shown in FIG.

15 is a diagram showing an operation timing of the circuit shown in FIG.

16 is a diagram showing a specific structure of the CR element shown in FIG.

17 is a diagram showing an example of a circuit added to the circuit shown in FIG.

18 is a diagram showing an operation timing of the circuit shown in FIG.

19 is a diagram showing an example of a case where the two-phase oscillator circuit shown in FIG. 13 is a PLL.

20 is a diagram showing a specific example of the PLL shown in FIG.

FIG. 21 is a diagram showing another example of a two-phase oscillator circuit.

FIG. 22 is a diagram showing another example of a two-phase oscillator circuit.

[Explanation of symbols]

 1 2 Phase Oscillation Circuit 2 LC Element 3 Amplifier 10 1st Spiral Electrode 12 2nd Spiral Electrode 14, 16, 18 Input / Output Electrode 24 p-Si Substrate 26 pn Junction Layer

Claims (15)

[Claims] 1. An LC element having two inductor conductors formed on a semiconductor substrate and a capacitor formed between them in a distributed constant manner, and a first element having a frequency substantially equal to a resonance frequency of the LC element. 2 is generated and input to one of the two inductor conductors, and a second signal having a predetermined phase difference with respect to this signal is generated and input to the other of the two inductor conductors. A phase oscillating circuit, and by resonating the LC element,
A sine wave oscillating circuit which outputs a sine wave signal from one of the inductor conductors of the book. 2. The LC element according to claim 1, wherein the LC element has two spiral inductor conductors arranged in the same plane and concentrically adjacent to each other, and a position along the two electrodes. And a p-region is electrically connected to one of these two electrodes, and an n-region is electrically connected to the other of the two electrodes, and a spiral-shaped pn junction layer that operates as the capacitor by applying a reverse bias voltage. A sine wave oscillation circuit comprising: 3. The LC element according to claim 1, wherein the LC element has two meandering inductor conductors arranged in the same plane and concentrically adjacent to each other, and a position along the two electrodes. And a p region is electrically connected to one of the two electrodes and an n region is electrically connected to the other of the two electrodes, and a meandering pn junction layer that operates as the capacitor by applying a reverse bias voltage is formed. A sine wave oscillation circuit comprising: 4. The sine wave oscillation circuit according to claim 2, wherein the two inductor conductors have different lengths. 5. The method according to claim 2, wherein one of the two inductor conductors is divided into a plurality of pieces, or the corresponding pn junction layer is divided into a plurality of pieces together with one of the two inductor conductors. Then, a sine wave oscillating circuit characterized in that a part of each of the divided pieces is electrically connected. 6. The LC according to claim 2, wherein the resonance frequency of the LC element is changed by changing the reverse bias voltage applied to the pn junction layer.
A sine wave oscillation circuit characterized in that the frequency of a sine wave signal output from an element is variable. 7. The two-phase oscillator circuit according to claim 1, wherein the two-phase oscillator circuit includes at least two series circuits each including a delay unit and a waveform shaping unit.
In addition to having a set, these series circuits are connected in a ring shape, the logic of the signal is inverted for an odd number of the plurality of waveform shaping sections, and two of the delay sections or two to two of the waveform shaping sections are provided. A sine wave oscillating circuit that extracts phase signals. 8. The waveform shaping section according to claim 7, wherein each of the waveform shaping sections includes an exclusive OR circuit, and the logic of a signal input to one input terminal of the exclusive OR circuit is L. Alternatively, when set to H, the sine wave oscillation circuit is characterized in that the logic of the input signal is inverted or non-inverted by each of the waveform shaping sections. 9. The inverter according to claim 7, wherein each of the waveform shaping sections includes an inverter logic circuit.
One or a plurality of inverter logic circuits are connected in series, and the logic of the input signal is inverted or non-inverted by each of the waveform shaping sections by setting the number of the inverter logic circuits to an odd number or an even number. And a sine wave oscillator circuit. 10. The delay section according to claim 7, wherein the delay portion is a long gate electrode formed on the surface of a semiconductor substrate with an insulating layer sandwiched between the delay portion and the gate electrode on the surface of the semiconductor substrate. The gate electrode includes a source and a drain provided in the vicinity of both ends in the longitudinal direction, and a low-pass filter having a channel formed on the surface of the semiconductor substrate corresponding to the gate electrode as a signal input / output path. The sine wave oscillator circuit is characterized in that the time constant of the low-pass filter is arbitrarily set by setting a predetermined gate length. 11. The device according to claim 10, wherein the voltage applied to the gate electrode is variably controlled to change the time constant of the low-pass filter.
A sine wave oscillation circuit characterized by adjusting the frequencies of the first and second signals generated by the phase oscillation circuit and the phase difference between these signals. 12. The sine wave oscillation circuit according to claim 7, wherein the delay unit is configured by a charge / discharge circuit in which at least one element constant of a resistor and a capacitor is variable. 13. The device according to claim 12, wherein the resistor is an equivalent resistor using a MOS transistor, or the capacitor is a variable capacitor using a pn junction layer, and at least one of the element constants is set to an applied voltage. A sine wave oscillator circuit, characterized in that the frequency of the first and second signals generated by the two-phase oscillator circuit and the phase difference between these signals are adjusted by changing accordingly. 14. The pseudo sine wave signal is extracted from each of the delay sections, and the extracted pseudo sine wave signal is used as a two-phase signal generated by the two-phase oscillator circuit. A sine wave oscillation circuit characterized by the above. 15. The phase comparison according to claim 11, wherein the reference frequency signal and the feedback signal are input, the frequencies and phases of these two signals are compared, and a voltage signal according to the difference is output. And a low-pass filter connected to the output side of the phase comparator and applying an output voltage to the delay unit, the first and second signals output from the two-phase oscillation circuit. A sine wave oscillating circuit which outputs a sine wave signal synchronized with the reference frequency signal by inputting one of the two as the feedback signal to the phase comparator.