JPH07231145A - Semiconductor light emitting element and its manufacture - Google Patents

Abstract

PURPOSE:To provide a semiconductor light emitting element, which enables a low threshold and high-speed modulation, bonding an insulating film such as an SiO2 film, etc., and semiconductor crystals directly with each other thereby using the insulating film as a current constriction layer in place of p-n junction. CONSTITUTION:An insulating film 12 is grown on the first conductive InP substrate 11, and an etch stop layer such as InGaAs (P), or the like and an InP layer 13 are provided on an another InP substrate, and surface treatment is applied to these wafers, and then the surfaces are brought into contact with each other and are heat-treated, whereby those are bonded. After this, the another InP substrate and the InGaAs (P) etch stop layer are removed by etching, and further the InP layer 13 and the insulating film 12 are removed to make stripe shapes, thereon a necessary layer structure is made, whereby a semiconductor light emitting element is manufactured.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device used in the fields of optical communication and optical information processing, and more particularly to a semiconductor light emitting device having a carrier confinement type structure and a manufacturing method thereof.

[0002]

2. Description of the Related Art As a semiconductor light emitting device of this type, there is one disclosed in "Semiconductor Laser" (1991) Baifukan p103-108, edited by Ryoichi Ito and Michiharu Nakamura.
Among these, BH (Buried heterostr
structure), VSB (vgr)
oversubscribed burried he
What is called a "structure" structure has been mainly put into practical use. These are structures in which the carrier is also confined by a heterojunction, among the refractive index waveguide stripe structures.

The operating principle is the same for both structures, p-type and n-type.
By applying a voltage between the mold electrodes so that the p-type electrode has a higher potential, electrons and holes injected into the active layer cause recombination emission, and laser oscillation can be obtained. Here, a current confinement layer made of a pn junction is provided on both outer sides of the active layer, and when the above-mentioned laser drive voltage is applied, the pn junction interface is reverse biased, so that almost no current flows. Utilizing this, a semiconductor light emitting device having a low threshold current and a high efficiency operation, which has a function of confining current only in the active layer, is realized.

[0004]

However, the layer structure of the conventional semiconductor light emitting device described above has the following drawbacks.

(1) The current blocking by the current-confining layer of the reverse-biased pn junction is not perfect from the beginning, and a considerable amount of current flows out from the active layer through the pn-junction, especially when the reverse bias applied voltage becomes high.

This increase in leak current causes an increase in threshold current. In addition, the current-light output characteristic curve tends to be saturated, and even if the applied voltage is increased, the light output efficiency is deteriorated.

(2) The reverse-biased pn junction has its own junction capacitance, which makes it impossible to perform high-speed modulation of the laser in response to changes in the applied current.

For the reasons (1) and (2) above, there is a demand for a semiconductor light emitting device which is excellent in insulation and has a small junction capacitance.

[0009]

In order to solve the above-mentioned problems, the present invention provides a semiconductor light emitting device, wherein a first conductivity type semiconductor substrate and an active layer provided on the first conductivity type substrate in a predetermined shape are provided. A current confinement layer provided on both sides of the active layer on the first conductivity type substrate and including an insulating film, and a second conductivity type semiconductor layer provided on the active layer and the current confinement layer. And a step of preparing a first substrate body having an insulator formed on the main surface of the first conductivity type semiconductor substrate, and a second substrate body having a semiconductor single crystal layer formed on the main surface of the semiconductor substrate. The step of preparing, the step of unifying the main surfaces of the first and second substrate bodies by adhering them to each other, and the step of etching the integrated substrate body from the back surface side of the second substrate body to form the semiconductor Exposing the single crystal layer, and the semiconductor It is manufactured by a step of exposing the first conductive type semiconductor substrate by etching and removing the crystal layer and the insulating film into a predetermined shape, and a step of forming an active layer on the exposed first semiconductor substrate. .

[0010]

According to the present invention, as described above, the insulating film made of silicon oxide or the like is directly bonded to the semiconductor single crystal layer, so that the insulating film is used as the current confinement layer instead of the pn junction. By manufacturing according to this manufacturing method, a semiconductor light emitting device having a current confinement layer, which prevents a leak current by an insulating film, has a small junction capacitance, and thus has a low threshold current and is capable of high-speed modulation is obtained.

[0011]

Embodiments of the present invention will now be described in detail with reference to the drawings.

1 and 2 show a structure of a semiconductor light emitting device according to the present invention, which is a structure obtained by improving the conventional BH and VSB structures, respectively.

It should be noted that the numbers in the chemical formulas should be indicated by subscript half-width characters, but for convenience, they will be indicated by simple half-width characters.

As shown in FIG. 1, InGaAs or InGaAsP which functions as an active layer which becomes a light emitting region.
The layer 15 is a first conductivity type InP that functions as a cladding layer.
The stripes are provided on the substrate 11 and the first conductivity type InP layer 14. InGaAs on the substrate 11
The insulating films 12 provided on both sides of the (P) layer 15 function as current confinement layers. The second conductivity type InP layer 16 provided on the InGaAs (P) layer 15 functions as a clad layer.

FIG. 2 shows an example in which the light emitting device having the BH structure shown in FIG. 1 is applied to the VSB structure. In FIG.
The GaAs (P) layer 15 is located between the first conductivity type InP layer 14 and the second conductivity type InP layer 16 as a clad layer provided in the V-shaped groove, and is substantially right next to the insulating film 12. It is provided in.

First Embodiment FIGS. 3 (a) to 3 (d) and FIGS. 4 (e) to 4 (g) show a manufacturing process of a semiconductor light emitting device according to a first embodiment of the present invention. The following description is divided into items corresponding to the drawings.

(A) Si on the first conductivity type InP substrate 11
The insulating film 12 made of O2 or the like is formed by a normal chemical vapor deposition method (CVD)
Etc. to a thickness of about 0.1 μm to 0.5 μm.

(B) InGaAs or InGaAs functioning as an etch stop layer on another InP substrate 21.
The P layer 22 (thickness is about 0.1 μm) and the InP layer 13 (thickness is about 1 μm) which is a semiconductor single crystal are sequentially grown by a normal crystal growth method such as metal organic chemical vapor deposition (MOCVD). The prepared wafer is prepared.

(C) Next, direct bonding is performed by the following procedure. The surfaces of the two wafers prepared in (a) and (b) are washed with a mixed solution of H2SO4: H2O2: H2O = 3: 1: 1 for about 30 seconds, and washed with water for about 5 minutes. Immediately after spin drying, both wafers are aligned and brought into contact with each other in the air at room temperature. At this time, in these wafers, OH groups are absorbed on the surfaces of the insulating film 12 and the InP layer 13 which is the semiconductor single crystal layer on both wafers by the above-mentioned surface treatment (steps of washing and washing with a sulfuric acid solution). Therefore, when these surfaces are brought into contact with each other, the OH groups absorbed on the surfaces form hydrogen bonds between the two wafers, and the wafers can be bonded to each other to the extent that positional displacement does not occur.

A pressing force of about 30 g / cm 2 is applied to the bonded wafer, and the wafer is placed in an annealing furnace and heat-treated in a hydrogen atmosphere at a temperature of about 450 ° C. to 700 ° C. for about 30 minutes. By this heat treatment, a dehydration condensation reaction of hydrogen bonds occurs and the adhesive strength is strengthened. Through this heat treatment, the adhesive strength becomes sufficient to withstand the subsequent steps and device fabrication.

(D) In order to uniformly etch the InP substrate 21 of the directly bonded wafer, chemical etching is performed using Br-CH3OH or the like until the thickness is about 100 μm, and the InGaAs (P) etch stop is performed with HCl. Etch until layer 22 is exposed. HCl
Is a selective etchant for InP, InGa
As (P) is not etched. Therefore, InGa
The etching automatically ends when the As (P) etch stop layer 22 is exposed. Br-CH first
The reason why 3OH is used for etching is that it is difficult to perform uniform etching with HCl. After this, I
The nGaAs (P) etch stop layer 22 is formed of H2SO4: H.
2O: H2O2 = 3: 1: 1 is etched and removed.

(E) The width of the InP layer 13 and the insulating film 12 is set to 1 μm by using the usual photolithography and etching method.
Stripped in a m-2 μm pattern. (F) First conductivity type InP using a normal crystal growth method or the like
Layer 14, undoped InGaA that functions as active layer
s or InGaAsP layer 15, second conductivity type InP layer 1
6. Second conductivity type InGaAs that functions as a cap layer
Layer 17 is grown in sequence. (G) The first conductivity type electrode 18 and the second conductivity type electrode 19 are deposited.

Second Embodiment Since the manufacturing steps (a) to (e) in the second embodiment are the same as those in the first embodiment, the description thereof will be omitted. FIG. 5 (f)-
FIGS. 6 (h) and 6 (i) to 6 (j) are diagrams of the manufacturing process in the second embodiment.

(F) A selective etchant for the insulating film 12, for example, a buffered hydrofluoric acid solution (HF (49%): N
Insulating film 1 using H4F (40%) = 1: 4 mixture)
Only 2 is side-etched by about 0.05 μm to 0.1 μm. (G) Wafer in a hydrogen atmosphere at 650 ° C. to 700 ° C.
Heat treatment is performed at a temperature of about C for about 30 to 60 minutes. At this time, the wafer is placed in the carbon boat 32 and covered with another InP substrate 31 with a small distance (about 100 μm). This is the surface of the wafer (InP substrate 11 and InP
This is because phosphorus (P) is vaporized by heat from the layer 13) and is removed from the surface of the wafer to prevent surface roughness. Phosphorus is vaporized from the InP substrate 31 to a saturated state in the space formed with the InP substrate 31 so that the space between the wafer and the InP substrate 31 is saturated. The InP layer 1 is formed by the heat treatment in the steps (h) and (g).
3 causes mass transport, and the insulating film 12 is covered with the InP layer 13.

(I) Similar to the first embodiment, the first conductivity type InP layer 14, the non-doped InGaAs or InGaAsP layer 15 functioning as an active layer, and the second conductivity type InP layer 16 are formed by using a normal crystal growth method or the like. , A second conductivity type InGaAs layer 17 functioning as a cap layer is sequentially grown. (J) As in the first embodiment, the first conductivity type electrode 18 and the second conductivity type electrode 19 are deposited.

Although it is impossible to grow a semiconductor single crystal layer on the insulating film and it is difficult for the semiconductor crystal to grow in the portion in contact with the insulating film, in the second embodiment, the insulating film 12 is formed as a thin InP layer. Covering with 13 has an effect that crystal growth is favorably performed. Further, when considering simply growing the InP layer 14 by crystal growth, it suffices to cover the insulating film 12 with some semiconductor layer. In the second embodiment, the InP layer 1 directly bonded onto the insulating film 12 is used.
By using No. 3, the insulating film 12 can be easily and surely covered, and the thickness can be easily limited by adjusting the side etching.

Further, although the semiconductor laser is taken up in the above-mentioned embodiments, the semiconductor light emitting device of the present invention is not limited to this, and a light emitting diode which can be realized by the same carrier confinement type, a traveling wave type optical amplifier, etc. It also includes.

In the above embodiment, the cleaning solution for surface treatment is a sulfuric acid-based solution. However, the cleaning solution is not limited to this because it is for absorbing hydroxyl groups on the surfaces of the insulating film and the semiconductor single crystal layer. The same effect (making the surfaces of both wafers hydrophilic) can be expected with the solution of. Further, the reason why hydrogen peroxide solution and water are added is to increase the supply of hydroxyl groups by adding hydrogen peroxide solution and to dilute the etching effect of sulfuric acid by adding water. Besides this,
It is not necessary to limit to the above-mentioned example as long as it is a solution or the like having a similar effect (which absorbs a hydroxyl group and does not have a bad influence), and even in the case of washing with water thereafter, unnecessary components adhering to the wafer surface are removed. Other methods may be used as long as they are expected to have the effect of promoting the absorption of hydroxyl groups.

In addition, in the heat treatment process, a hydrogen atmosphere was used. Since hydrogen acts as a reducing agent for hydroxy, the bonded hydroxyl groups are reduced and the bonded portion becomes water. This is because the adhesion is strengthened by coming off. In order to accelerate this reducing action, heat treatment of about 30 minutes requires heat of about 450 ° C. or higher. However, in order to prevent deterioration of quality due to heat, it is not preferable to set the temperature to 700 ° C. or higher.

In the above embodiment, the thickness of the insulating film to be grown is set to about 0.1 μm to 0.5 μm, but it is preferably about 0.3 μm to 0.5 μm. This is because the junction capacitance and the insulating property are determined by the thickness of the insulating film, so the thicker the insulating film, the better. However, if the insulating film is too thick, cracks are likely to occur. This is because.

As described above, conventionally, it was impossible to grow a semiconductor single crystal layer on an insulating film, but in the embodiment of the present invention, the insulating film 12 such as SiO 2 and InP which is a semiconductor single crystal are formed. By directly adhering to the layer 13, the insulating film 12 can be used as the current constriction layer.

Therefore, in the conventional semiconductor laser, 15 m
Although the threshold current was about A, the semiconductor laser manufactured according to the example of the present invention recorded a threshold current of 10 mA or less.

Further, even when the applied voltage is increased, the leak current can be kept extremely low, so that the optical output is prevented from being saturated, and at the same time, the threshold current of the laser is prevented from becoming high. This enables low power consumption and high temperature operation.

Further, since the junction capacitance is reduced by about 1/10 to 1/3 of that of the current confinement layer of the pn junction, it is possible to provide a laser which is excellent in high speed modulation in response to an applied current. Conventionally, the high speed modulation band was limited to 1 GHz or less, but in the semiconductor laser according to the present invention, it is 5 GHz to 10 GH.
It is thought that it will be possible to handle up to about z.

[0035]

As described above in detail, according to the present invention, since the semiconductor light emitting device has the current confinement layer including the thin insulating film, the leakage current is prevented and the junction capacitance is reduced in the current confinement layer. it can. Further, according to the manufacturing method of the present invention, the semiconductor single crystal layer and the insulating film can be directly bonded, and the semiconductor light emitting device can be easily manufactured.

[Brief description of drawings]

FIG. 1 is a sectional view showing a semiconductor light emitting device structure according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing another semiconductor light emitting device structure according to the present invention.

FIG. 3 is a manufacturing process (No. 1) according to the first embodiment of the present invention.
FIG.

FIG. 4 is a manufacturing process (No. 2) according to the first embodiment of the present invention.
FIG.

FIG. 5 is a manufacturing process (No. 1) according to a second embodiment of the present invention.
FIG.

FIG. 6 is a manufacturing process (No. 2) according to the second embodiment of the present invention.
FIG.

[Explanation of symbols]

 11: First conductivity type InP substrate 12: Insulating film 13: InP layer 14: First conductivity type InP layer 15: InGaAs (P) layer 16: Second conductivity type InP layer 17: Second conductivity type InGaAs (P) layer 18: First conductivity type electrode 19: Second conductivity type electrode 21: InP substrate 22: InGaAs (P) layer

Claims (9)

[Claims] 1. A first conductive type semiconductor substrate, an active layer provided in a predetermined shape on the first conductive type semiconductor substrate, and an insulating layer provided on both sides of the active layer on the first conductive type semiconductor substrate. A semiconductor light emitting device comprising: a current confinement layer including a film; and a second conductivity type semiconductor layer provided on the active layer and the current confinement layer. 2. The semiconductor light emitting device according to claim 1, wherein the current confinement layer is provided on both sides of the active layer with a semiconductor single crystal layer interposed therebetween. 3. The insulating film has a thickness of 0.1 μm to 0.5 μm.
3. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device has a thickness of μm. 4. A step of preparing a first substrate body having an insulating film formed on a main surface of a first semiconductor substrate, and a second substrate having a semiconductor single crystal layer formed on a main surface of a second semiconductor substrate. A step of preparing a body; a step of adhering the main surfaces of the first and second substrate bodies to each other to form an integrated body; and a step of etching the back surface side of the second substrate body of the integrated board body. Exposing the semiconductor single crystal layer, exposing the first semiconductor substrate by etching the semiconductor single crystal layer and the insulating film into a predetermined shape, and exposing the first semiconductor substrate on the exposed first semiconductor substrate. A method of manufacturing a semiconductor light emitting device, comprising the step of forming an active layer. 5. The semiconductor light emitting device according to claim 4, further comprising a step of covering the insulating film exposed by the step of exposing the semiconductor substrate with a semiconductor layer before the step of forming the active layer. Device manufacturing method. 6. The step of covering with the semiconductor layer, wherein the insulating film is covered with the semiconductor single crystal layer by performing side etching on the insulating film and then performing heat treatment. Method for manufacturing semiconductor light emitting device. 7. When integrating the first and second substrate bodies, after absorbing a hydroxyl group on the surface of the insulating film or the semiconductor single crystal, the main surfaces of the first and second substrate bodies are brought into contact with each other. The heat treatment is performed by allowing the heat treatment.
The method for manufacturing a semiconductor light emitting device according to any one of claims. 8. The second substrate body, wherein the semiconductor single crystal layer is provided on the main surface of the semiconductor substrate via an etch stop layer.
The method for manufacturing a semiconductor light emitting device according to any one of claims. 9. The method of manufacturing a semiconductor light emitting device according to claim 7, wherein the step of heat-treating by contacting is performed in a hydrogen atmosphere.