JPH07230391A - Verifier for information processor - Google Patents

Abstract

PURPOSE:To exclude a failure of manual input and to improve the operability by providing an external storage device with a hardware configuration table generating means, a tent execution procedure table generating means, and a test execution means to shorten the time for generation and input work of an operation test program. CONSTITUTION:The hardware configuration table of plural input/output devices 3i connected to an information processor 2 is generated from the test fundamental procedure table where operation test fundamental procedures of plural input/ output devices preliminarily stored in an external storage device 6 are described. Operation test fundamental procedures of the hardware configuration coinciding with the hardware configuration table are selected from the test fundamental procedure table, where operation test fundamental procedures of input/5output devices are described, to generate a tent execution procedure table. An operation test program is executed based on this test execution procedure table. Consequently, the operation test program is executed even if the hardware configuration is changed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a verification device for an information processing device.

[0002]

2. Description of the Related Art Conventionally, an information processing device and an input / output device connected to the information processing device (hereinafter referred to as an I / O device)
As a method for verifying the above, for example, as disclosed in Japanese Patent Laid-Open No. 4-172538, when testing I / O devices having the same hardware configuration, the first test data is stored and retested. There are known techniques for automatically using the same test data.

[0003]

However, in the prior art, when the hardware configuration of the I / O device is changed, an operation test program corresponding to the hardware configuration is created and input. There was a problem that I had to do.

Further, even if the I / O devices have the same hardware configuration, if the test contents are different, there is a problem that an operation test program corresponding to the test contents must be created and input. It was

Further, the work of creating and inputting the operation test program takes a lot of time due to manual work, and there is a problem that an input error occurs.

An object of the present invention is to provide a verification apparatus for an information processing apparatus, which shortens the time required for creating and inputting an operation test program, eliminates a manual input error, and improves operability. is there.

[0007]

The outline of the representative one of the inventions disclosed in the present application will be briefly described as follows.

That is, a central processing unit, a plurality of input / output devices, and an external storage device in which a test basic procedure table describing operation basic procedures for each of the plurality of input / output devices and an operation test program are stored in advance. And a hardware configuration table creating means for recognizing the hardware configurations of the plurality of input / output devices and creating a hardware configuration table in the external storage device. A test execution procedure table creating means for creating a test execution procedure table by selecting the operation test basic procedure matching the hardware configuration from the test basic procedure table and the hardware configuration table, and based on the test execution procedure table. And a test execution means for executing the operation test program.

[0009]

According to the above means, the plurality of input / outputs connected to the information processing device are selected from the test basic procedure table which describes the operation test basic procedure for each of the plurality of input / output devices stored in advance in the external storage device. A device hardware configuration table is created, and an operation test basic procedure of the hardware configuration that matches the created hardware configuration table is described, and a test basic procedure table describing the operation test basic procedure for each of the plurality of input / output devices. When a hardware configuration of the I / O device is changed, a test execution procedure table is created by selecting from the above, and the operation test program is executed based on the test execution procedure table.
Even when tests with different contents are performed by I / O devices having the same hardware configuration, the operation test can be executed without newly creating and inputting the operation test program or test procedure.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of a verification device for an information processing device to which the present invention is applied.

In FIG. 1, a verification device 1 for an information processing device.
Is the information processing device 2 and a plurality of input / output devices 3i (i = 1, 2, ..., N) connected to the information processing device 2 (hereinafter, I
/ O device 3) and a keyboard 4 having a display device for performing necessary input work.

The I / O device 3 referred to here is, for example, a hard disk device (HD) or a magnetic recording device (M).
T) etc.

The information processing device 2 includes a central processing unit 5 (hereinafter referred to as CPU 5) and an external storage device (External Memory).
y) 6 (hereinafter referred to as EM6).

FIG. 2 is an explanatory diagram for explaining the relationship between each means and each table according to the present invention.

As shown in FIG. 2, in the EM 6, a hardware configuration table creating means for recognizing the hardware configuration of the I / O device 3 connected to the information processing device 2 and creating the hardware configuration table 30. 20 and a test execution procedure table creating means 40 for creating a test execution procedure table 50 for executing the operation test program 70.
And a test execution means 60 for executing a test based on the test execution procedure table 50, and a pointer management table 80 for managing addresses of various tables necessary for the test.
And a test basic procedure table 90 that describes the basic test procedure are stored.

In this embodiment, each of the means and the plurality of tables are EM as a test section control program.
6, the verification method according to the present invention is realized by the CPU 5 executing the test section control program.

FIG. 3 is a table configuration diagram showing the configuration of various tables used in this embodiment.

In FIG. 3, reference numeral 30 is a hardware configuration table for storing hardware configuration information, and n types of hardware configuration information (31-1, 31-2, ...).
In the following, 31-n is representative of any one of them and is referred to as hardware configuration information 31), and the end sign 32 indicating the end of the hardware configuration table 30 is described at the end of the table. .

Reference numeral 50 denotes the test execution procedure table, which includes n kinds of test execution procedures (51-1, 51-2,
, 51-n is hereinafter referred to as a test execution procedure 51 on behalf of one of them, and an end sign 52 indicating the end of the test execution procedure table 50 is described at the end of the table. There is.

Reference numeral 90 is a test basic procedure table, n
Types of basic test procedures (91-1, 91-2,
, 91-n will be hereinafter referred to as a test basic procedure 91 on behalf of one of them, and an end sign 92 indicating the end of the test basic procedure table 90 is described at the end of the table. There is.

Although the drawing numbers are mixed up, the pointer management table 80 manages the addresses of various tables necessary for the test.

The pointer management table 80 stores a head address 81 of the hardware configuration table 30 and a hardware configuration table pointer 82 which describes addresses of the following hardware configuration information 31.
Further, the start address 83 of the test execution procedure table 50
And a test execution procedure table pointer 84 describing the address of the test execution procedure 51 that follows is stored.

Further, a basic address 85 of the test basic procedure table 90 and a basic procedure table pointer 86 describing the addresses of the following test basic procedures 91 are stored.

4 to 6 are explanatory views for explaining details of various tables. FIG. 4 is a diagram showing the details of the hardware configuration table 30, and the hardware configuration information 31 is such that the device type 311 corresponding to the type of the I / O device 3 and the I / O device 3 are connected to each other. And a connection position 312 indicating the input / output address that is set.

FIG. 5 shows the test execution procedure table 5
0 is a diagram showing the details of 0, and the test execution procedure 51 is
It is composed of a connection position 511 indicating an input / output address to which the O device 3 is connected, and a procedure 512.

FIG. 6 is a diagram showing the details of the test basic procedure table. Test basic procedure 9 as shown in FIG.
Reference numeral 1 is composed of a type of procedure, for example, a flag 911 indicating whether connection position setting is required / not required or valid / invalid, a device type 912, and an actual test procedure 913.

Here, there are several kinds of procedures 913, some of which need to obtain the connection position 312 of the I / O device 3 from the hardware configuration table 30 and some of which need not be obtained.

FIG. 6B is an explanatory diagram for explaining the meaning represented by the flag 911. As shown in FIG. 6B, the flag 911 is composed of a flag number 9111 and a flag content 9112. For example, if the flag number is “00”, it indicates “invalidate the basic test procedure”. There is.

The flag numbers "03 to 99" can be reserved as spares and set according to new test contents.

Next, the processing of the test execution procedure table creating means will be described in detail with reference to the flowchart of FIG. 7 (a flowchart showing the processing procedure of the test execution procedure table creating means).

First, it is checked whether or not the hardware configuration table pointer 82 of the pointer management table 80 points to the end sign 32 of the hardware configuration table 30 (step 701).

When pointing to the end sign 32 (step 701: Yes), the hardware configuration table 30
Is determined to have been checked, and the processing ends.

When the end sign 32 is not pointed (step 701: No), it is investigated whether or not the basic procedure table pointer 86 of the pointer management table 80 points to the end sign 92 of the test basic procedure table 90 (step 702). ).

If the end sign 92 is indicated (step 702: Yes), it is determined that all the test basic procedure tables 90 have been checked, and the process proceeds to step 710.

If the end sign 92 is not indicated (step 702: No), it is investigated whether the flag 911 in the test basic procedure table 91 is valid or invalid (step 7).
03).

If the flag 911 is invalid (step 70)
3: invalid), the process proceeds to step 708.

If the flag 911 is valid (step 70)
3: Valid), and it is checked whether or not the device type 311 of the hardware configuration information 31 indicated by the hardware configuration table pointer 82 of the pointer management table 80 and the device type 912 of the basic test procedure 91 match (step 704). ).

If they match (step 704: match), it is checked whether or not the test execution procedure table pointer 84 of the pointer management table 80 is set (step 705).

If they do not match (step 704: mismatch), the process moves to step 708.

In step 705, when the test execution procedure table pointer 84 is set (step 705: Yes), the process proceeds to step 706.

When the test execution procedure table pointer 84 is not set (step 705: No), it is determined that the test execution procedure table 50 is not secured, and EM6
An area for the test execution procedure table 50 is secured in the area (step 712), and its head address is set in the test execution procedure table head address 83 and the test execution procedure table pointer 84 in the pointer management table 80.

Next, the procedure 913 of the basic test procedure 91 is set to the test execution procedure 51 indicated by the test execution procedure table pointer 84 in the pointer management table 80 (step 706).

Next, it is checked whether or not the flag 911 in the test basic procedure 91 indicated by the basic procedure table pointer 86 needs to be the flag number "02" (step 707).

If necessary (step 707: Ye)
s), at the connection position 511 of the test execution procedure 51 indicated by the test execution procedure table pointer 84 in the pointer management table 80, the connection position 312 of the hardware configuration information 31 indicated by the hardware configuration table pointer 82 of the pointer management table 80 is set. Set (Step 71
3).

Then, the address next to the test execution procedure 51 is set in the test execution procedure table pointer 84 (step 708).

Then, the next address of the test basic procedure 91 is set in the basic procedure table pointer 86 in the pointer management table 80 (step 709), and the process returns to step 702.

If all the test basic procedure tables 90 have been checked (step 702: Yes),
The next address of the hardware configuration information 31 is set in the hardware configuration table pointer 82 in the pointer management table 80 (step 710).

Then, the start address of the test basic procedure table 90 is set in the basic procedure table pointer 86 of the pointer management table 80 (step 711).

The above processing is repeated until the end sign 32 in the hardware configuration table 30 is detected.

Next, the processing procedure of the test execution means 60 will be described. The test executing means 60 is composed of a test executing means decoding process and a test part starting process.

FIG. 8 is a flow chart showing the processing procedure of the test execution means.

As shown in FIG. 8, first, the test execution procedure table start address 8 in the pointer management table 80 is shown.
3 is set in the test execution procedure table pointer 84 (step 801).

Next, the test execution procedure table pointer 8
The test execution procedure 51 indicated by 4 is decoded by the test execution means decoding process (step 802).

Then, when the test section starting process is detected during the decoding of the test execution procedure 51 (step 803: Y).
es), the control is transferred from the test execution means decoding process to the test unit starting process, the operation test program (not shown) is started (step 806), and the test is started (step 807).

After the test is completed (step 808),
The processing of the test execution means 60 is ended.

In step 803, when one test execution procedure 51 is decoded without detecting the test starting process during the decoding of the test execution procedure 51 (step 803:
No), the next address of the test execution procedure 51 is set in the test execution procedure table pointer 84 (step 804).

Then, it is judged whether or not the end sign 52 is detected (step 805). If the end sign 52 is not detected (step 805: No), the process returns to step 802 to repeat the processing.

The above processing is performed by the test execution procedure table 5
The process is repeated until the end sign 52 within 0 is detected (step 804: Yes).

As can be seen from the description of this embodiment,
By preparing a plurality of hardware configuration information 31, a plurality of test execution procedures 51, and a plurality of test basic procedures 91 in advance, the type of the I / O device 3 to be connected or the connection position 312 is identified. , The test execution procedure 51 corresponding to the hardware configuration is selected and the operation test program (not shown) is executed. Therefore, even if the hardware configuration is different, the operation test program or the test procedure can be manually performed. Without having to create and enter
The operation test of the / O device 3 can be performed.

Even with the I / O devices 3 having the same hardware configuration, for example, when changing the contents of the first and second tests, the flag 911 of the basic test procedure 90 is operated from the keyboard 4. Then, the test execution procedure 51 is automatically selected and the operation test program is executed. Therefore, it is not necessary to create and input the operation test program or the test procedure according to the test content.

[0062]

As described above, according to the present invention,
The following effects can be obtained.

(1) Even when the hardware configuration of the I / O device connected to the information processing device is changed, an operation test program or test procedure corresponding to the hardware configuration is newly created and input. Since it is not necessary to do so, it is possible to reduce the work time when creating / inputting the operation test program or the test procedure.

(2) Even when testing different contents for I / O devices having the same hardware configuration, an operation test program or test procedure corresponding to the hardware configuration is newly created. Since it is not necessary to input it, it is possible to eliminate human error when creating / inputting the operation test program or test procedure.

(3) Due to the above (1) and (2), the operability at the time of verification of the I / O device connected to the information processing device is significantly improved.

[Brief description of drawings]

FIG. 1 is a block configuration diagram showing a configuration of an embodiment of a verification device of an information processing device to which the present invention has been applied.

FIG. 2 is a diagram showing each unit and various tables stored in an external storage device of this embodiment.

FIG. 3 is an explanatory diagram illustrating details of a pointer management table according to the present embodiment.

FIG. 4 is a diagram showing details of a hardware configuration table according to the present embodiment.

FIG. 5 is a diagram showing details of a test execution procedure table of the present embodiment.

FIG. 6 is a diagram showing details of a test basic procedure table of the present embodiment.

FIG. 7 is a flowchart showing the overall processing procedure of this embodiment.

FIG. 8 is a flowchart showing the processing procedure of the test execution means of the present embodiment.

[Explanation of symbols]

1 ... Information processing device verification device, 2 ... Information processing device, 3 ...
Input / output device 3 (I / O device 3), 4 ... Keyboard, 5 ...
Central processing unit 5 (CPU 5), 6 ... External storage device (Exte
rnal Memory) 6 (EM6), 20 ... Hardware configuration table creating means, 30 ... Hardware configuration table, 4
0 ... Test execution procedure table creating means, 50 ... Test execution procedure table, 60 ... Test execution means, 70 ... Operation test program, 80 ... Pointer management table, 90 ...
Test basic procedure table.

Claims (1)

[Claims] 1. A central processing unit, a plurality of input / output devices,
A verification device for an information processing device, comprising: a test basic procedure table describing an operation test basic procedure for each of the plurality of input / output devices; and an external storage device in which an operation test program is stored in advance. A hardware configuration table creating means for recognizing the hardware configurations of the plurality of input / output devices and creating a hardware configuration table; and the operation test basic procedure matching the hardware configuration, the test basic procedure table And a hardware configuration table to create a test execution procedure table, and a test execution procedure table executing means for executing the operation test program based on the test execution procedure table. A verification device for an information processing device.