JPH0722293A - Leadless chip solid electrolytic capacitor and production thereof - Google Patents

Abstract

PURPOSE:To prevent swelling and cracking by forming the exterior resin thinner on the mounting surface and sucking surface than on the side surface. CONSTITUTION:A capacitor element 5a planted with an anode lead 4a is masked on the outer peripheral surface thereof except two parallel surfaces, i.e., the mounting surface and the sucking surface. It is then subjected to electrostatic powder painting of powder resin and heat treated after the mask is removed thus forming a resin layer of 250mum thick. Subsequently, the anode lead and the surface opposing the lead planting surface are masked and subjected to electrostatic powder painting of powder resin. After removing the mask, it is heat treated to form a resin exterior 2b. Consequently, the resin layer is formed by 250mum thick on the mounting and sucking surfaces and by 125mum thick on the side surface. An anode electrode 1b and a cathode electrode 3b of solder layer are then formed on a conductor layer formed by applying a silver paste to the anode lead and the periphery thereof, and to the surface opposing the lead planting surface and the periphery thereof.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type solid electrolytic capacitor and a method of manufacturing the same, and more particularly to a leadless chip type resin outer package and its outer packaging method.

[0002]

2. Description of the Related Art Conventionally, a chip type solid electrolytic capacitor for mounting a printed wiring board on a surface mount is covered with an insulating resin by transfer molding as shown in FIG.
There is a mold type in which the external electrode terminals are led out using the lead terminals. This type had the advantage of high accuracy in external dimensions and excellent mountability, but the transfer molding method has a limit to the thin resin outer layer thickness that can be molded, and since the lead terminals are used, the outer dimension is large. There is a drawback that the volumetric efficiency of the capacitor is low.

Therefore, Japanese Patent Publication No. 6-3280 shown in FIG.
As shown in No. 8, there is a leadless simple exterior type in which the external dimensions are reduced and the volume efficiency is improved by directly applying external electrode terminals without using lead terminals by applying the external packaging method. Since the leadless chip type solid electrolytic capacitor of the type uses an electrostatic coating method as disclosed in, for example, Japanese Patent Publication No. 61-35808, the exterior has a uniform thickness on all surfaces as shown in FIG.

[0004]

In this conventional leadless chip type solid electrolytic capacitor, the resin outer package thickness is uniform on all sides for the reasons described above, but there are three conditions that determine the outer package thickness. Protection of the capacitor element from mechanical stress at the time of handling, second is protection from thermal stress at the time of mounting heating, and third is isolation between the capacitor element and the external atmosphere. The exterior thickness required by these three conditions is different for each exterior surface, but since the exterior thickness is uniform on all surfaces in the conventional manufacturing method and structure, the maximum exterior thickness required under all the above conditions is However, there is a problem in that the volume efficiency is reduced as a result.

In addition, although the capacitor element easily adsorbs moisture, the pressure of the moisture gasified during mounting heating is blocked by the exterior and rises, and the exterior resin is extended to cause blisters or clutches. .

Further, since the powder coating method is used in the conventional manufacturing method, there is a problem in that it is not possible to control the resin exterior thickness on an arbitrary surface during coating in a manner different from other surfaces. However, there is a problem in that the thickness of the outer casing cannot be controlled because of the possibility of damage to the capacitor element due to mechanical or chemical treatment.

[0007]

In the chip type solid electrolytic capacitor of the present invention, a dielectric element, a solid electrolyte layer, and a cathode conductor layer are formed on the surface of an anode body using a valve metal, and an anode of a capacitor element is led out. Part and the cathode lead-out portion are covered with an insulating resin and cured to form a resin exterior, and the anode lead-out portion and its peripheral portion exposed from the resin exterior and the cathode lead-out portion and its peripheral portion are exposed. In a leadless chip type solid electrolytic capacitor in which at least one or more conductor layers are formed to constitute an anode electrode and a cathode electrode, and the resin exterior is made to have a side surface thickness smaller than the mounting surface and the adsorption surface. There is.

Further, in the manufacturing method of the present invention, after at least one surface of the capacitor element is masked, the insulating resin is applied and the mask is removed, the step of performing heat curing is repeated at least twice to form the resin exterior. .

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, a leadless chip type solid electrolytic capacitor of the present invention and a method for manufacturing the same will be described with reference to the drawings.

FIG. 1 (a) is a perspective view of a leadless chip type solid electrolytic capacitor according to an embodiment of the present invention when it is surface-mounted on a printed wiring board, and FIG. 1 (b) is FIG. 1 (a).
FIG. 1C is a vertical sectional perspective view of the leadless chip type solid electrolytic capacitor shown in FIG. 1, and FIG. 1C is a lateral sectional perspective view of the leadless chip type solid electrolytic capacitor shown in FIG. 1A.

As shown in FIG. 1 (a), the leadless chip type solid electrolytic capacitor of the present invention is composed of an anode electrode 1a, a cathode electrode 3a and a resin sheath 2a, and in particular, the surface to be adhered to the printed wiring board 8 is mounted. The surface and the surface opposite thereto are the suction surfaces, and the two resin exterior surfaces other than the above two surfaces are called the side surfaces.

As shown in FIG. 1 (b), a dielectric layer, a solid electrolyte layer, and a cathode conductor layer (these are not shown) are formed on the anode body in which the anode lead 4a is planted by using a valve metal by a known technique.
Are sequentially formed to form the capacitor element 5a.

Next, a mask is applied to the entire outer peripheral surface of the capacitor element except for the two parallel surfaces, which are expected to become the mounting surface and the suction surface, and epoxy resin powder is used for 50K.
After performing electrostatic powder coating under conditions of V and 5 seconds, the mask is removed and heat treatment is performed at 100 ° C. for 5 minutes to form a resin layer having a thickness of 250 μm.

Next, a mask is newly provided on the opposite surface of the anode lead and the surface where the anode lead is erected, and electrostatic powder coating is performed using an epoxy-based powder resin under the conditions of 50 KV and 5 seconds, and then the mask is removed. Heat treatment is performed at 100 ° C. for 100 minutes to form the resin exterior 2b. As a result, the resin layer on the mounting surface and the suction surface is 250 μm thick, and the thickness on the side surface is 125 μm.
m thickness. Next, a silver paste is applied to the anode lead and its peripheral portion and the surface opposite to the anode lead embedding surface and its peripheral portion, and heat treatment is performed at 150 ° C. for 30 minutes to form a conductor layer (not shown). The whole is immersed in a eutectic solder in a molten state at 260 ° C. to form a solder layer (not shown) on the conductor layer to form an anode electrode 1b and a cathode electrode 3b. Configure.

This embodiment and the Japanese Patent Publication No. 6-3280 shown in FIG.
As a conventional example in FIG. 8, 1000 samples each having a 250 μm-thick exterior resin coating were prepared, and a peak temperature of 240
Table 1 shows the results of observing the occurrence of blisters and cracks on the exterior of the packaging test by reflowing at ℃.

[0016]

[Table 1]

In this embodiment, there is a size-reducing effect of about 250 μm as a reduction in the thickness of the resin outer casing on both sides, and it is clear from Table 1 that there is an effect of preventing blisters and cracks in the outer casing.

Further, both the mounting surface and the suction surface remain the same as before (about 250 μm), and the thickness of both side surfaces is 10
FIG. 5 shows the results of observing the state of occurrence of blisters and cracks on the exterior of each sample, which was produced by mounting a sample in the increments of 25 μm in the range of 0 to 300 μm.

However, mounting was performed by hot air reflow with a peak temperature of 240 ° C.

As is apparent from FIG. 5, the occurrence of cracks and blisters can be prevented by setting the thickness of the side surface resin coating to 150 μm or less.

This effect is obtained because the thickness of the side surface of the exterior is thinner than that of the conventional case (about 60% or less) and the air permeability is excellent, so that the pressure rise during mounting heating can be avoided.

On the other hand, in the leadless chip type solid electrolytic capacitor, the thickness of the mounting surface and the suction surface of the exterior resin layer is required to be a predetermined value in consideration of mounting by an automatic mounting machine. Therefore, the thickness of both side surfaces is always 100 μm, which is equal to the thickness of the mounting surface and the suction surface, and is 50 to 30 mm.
Samples were manufactured at intervals of 0 μm in steps of 25 μm, and each sample was mounted on 1000 mounting machines to confirm the occurrence rate of leakage current defects before and after mounting. The result is shown in FIG.

However, the mounting impact of the mounting machine is 1.8 kgf.

As is apparent from FIG. 6, when the thickness of the exterior resin on the mounting surface and the suction surface is less than 175 μm, the effect as a cushioning material is lost and a defect occurs, so that the thickness must be 175 μm or more. Recognize. Since no pressure is applied by the mounting machine to the side surface, there is no problem even if it is thin, but it is desirable that the thickness is 100 μm or more.

To summarize the above, the thickness of the exterior resin is 175 μm or more on the mounting surface and the suction surface,
By setting the side surface to 150 μm or less, the leadless chip type solid electrolytic capacitor intended by the present invention can be obtained. That is, the difference in thickness between the two is 75 μm or more.
The thickness on the side surface is 60 times the thickness of the mounting surface and the suction surface.
% Or less is desirable.

Further, as the exterior forming means, powdered resin is used, and fluidization of the powder generated by applying air flow and mechanical vibration is utilized to immerse the heated capacitor element in the powdered resin atmosphere. The same effect was confirmed also in the leadless chip type solid electrolytic capacitor of the present invention manufactured by using the so-called fluidized dipping method, which is deposited by the above.

Further, in this embodiment, both the two side surfaces of the exterior are made thin, but even if only one surface is formed, it is about 1 more.
The same effect could be confirmed by making the thickness twice as much (about 1/4 of the conventional thickness).

[0028]

As described above, according to the present invention, the exterior thickness can be controlled for each surface by forming the exterior by applying the mask twice and coating twice.
Using this manufacturing method, the thickness of the mounting surface and the suction surface, which are conventionally thought to require the other two surfaces (about 25
By making it much thinner (about 60% or less),
It has the effect of improving air permeability during mounting heating and preventing blisters and cracks on the exterior.

[Brief description of drawings]

FIG. 1A is a perspective view of a leadless chip type solid electrolytic capacitor of one embodiment of the present invention when it is surface-mounted on a printed wiring board, and FIG. 1B is a leadless chip type solid electrolytic shown in FIG. FIG. 3C is a vertical cross-sectional perspective view of the capacitor, and FIG. 6C is a horizontal cross-sectional perspective view of the leadless chip type solid electrolytic capacitor shown in FIG.

FIG. 2 is a sectional view of an example of a conventional chip-type solid electrolytic capacitor.

FIG. 3 is a vertical cross-sectional view of an example of a conventional leadless chip type solid electrolytic capacitor.

4 is a cross-sectional view of the leadless chip type solid electrolytic capacitor shown in FIG.

FIG. 5 is a characteristic diagram showing the relationship between the thickness of exterior resin and the occurrence of blisters and cracks on the exterior.

FIG. 6 is a characteristic diagram showing the relationship between the external resin thickness and the leakage current defect occurrence rate after mounting by an automatic mounting machine.

[Explanation of symbols]

 1a, 1b, 1c Anode electrode 2a, 2b, 2c, 2d, 2e, 2f Exterior resin 3a, 3b, 3c, 3d Cathode electrode 4a, 4b Anode lead 5a, 5b, 5c, 5d, 5e Capacitor element 6 External anode lead 7 External cathode lead 8 Printed wiring board 9 Anode land 10 Cathode land

Claims (6)

[Claims] 1. A capacitor element formed by forming a dielectric layer, a solid electrolyte layer, and a cathode conductor layer on the surface of an anode body using a valve metal, and insulating the entire outer peripheral surface excluding the anode lead-out portion and the cathode lead-out portion. A resin is applied and cured to form a resin sheath, and at least one or more conductor layers are formed on the anode lead-out portion and its peripheral portion and the cathode lead-out portion and its peripheral portion exposed from the resin sheath, respectively, and the anode is formed. A leadless chip type solid electrolytic capacitor in which an electrode and a cathode electrode are formed, wherein the resin coating has a thickness of at least two kinds. 2. The thickness of at least one of the remaining two surfaces is smaller than the thickness of the mounting surface of the resin exterior on the printed wiring board and the suction surface parallel to the mounting surface. Item 2. A leadless chip type solid electrolytic capacitor according to item 1. 3. The leadless chip type solid electrolytic capacitor according to claim 2, wherein the thin wall thickness is 60% or less of the thick wall thickness. 4. A resin exterior is formed by masking at least one surface or more of the capacitor element, applying an insulating resin, removing the mask, and then performing heat curing at least twice. Method for manufacturing leadless chip type solid electrolytic capacitor. 5. The production of a leadless chip type solid electrolytic capacitor according to claim 4, wherein the method of depositing the insulating resin is an electrostatic powder coating method using a powder resin and an electrostatic field. Method. 6. The method for depositing the insulating resin uses a powder resin, and the fluidization of the powder generated by applying a flow of air and mechanical vibration is used to make the heated capacitor element a powder resin. The method for producing a leadless chip type solid electrolytic capacitor according to claim 4, wherein the method is a fluidized dipping method in which the liquid dipping method is applied by dipping in an atmosphere.