JPH07222118A - Method and equipment for aspect ratio conversion - Google Patents

Abstract

PURPOSE:To superimpose information superimposed on a signal for a horizontal period onto a video signal with a different aspect ratio for a horizontal blanking period by applying aspect conversion to the information superimposed for the horizontal blanking period-and extracting the information without losing the superimposed information. CONSTITUTION:The equipment is provided with a WC control circuit 12 generating a WC signal 15 based on a write clock (WC) signal and a horizontal synchronizing signal (HD) 10 from a timing generating circuit 8. A write reset control circuit 13 is in write reset at a point before data are superimposed on a video signal whose aspect ratio is 16:9 for a horizontal blanking period. A FIFO memory 4 stores data whose quantity corresponds to a horizontal blanking period of a video signal whose aspect ratio is 4:3 based on a clock pulse of the WC signal 15 after the write reset. Thus, the information superimposed on the video signal whose aspect ratio is 16:9 for the horizontal blanking period is converted into a video signal whose aspect ratio is 4:3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal having an aspect ratio of 4: 3 obtained from an image pickup device capable of imaging at an aspect ratio of 16: 9 in an image pickup device such as a television camera device. The present invention relates to a method of changing to a video signal and a video signal processing device thereof.

[0002]

2. Description of the Related Art Conventionally, an imaging device such as a television camera device for obtaining a video signal with an aspect ratio of 4: 3 has been mainstream, but recently, an imaging device for obtaining a video signal with an aspect ratio of 16: 9 has appeared. . Along with that, the aspect ratio 16:
An image pickup apparatus has been developed which is provided with a means for converting a video signal of 9 into a video signal of aspect ratio 4: 3 and is capable of outputting a video signal of aspect ratio 4: 3.

FIG. 4 is a diagram showing a system configuration example of the conversion means. The configuration and operation of this conversion means will be described below.
The operation will be briefly described with reference to a timing chart (FIG. 5) showing the operation of aspect ratio conversion in one horizontal scanning period and a schematic diagram (FIG. 6) showing the relationship between the screen before and after the aspect ratio conversion.

In FIG. 4, a video signal 1 having an aspect ratio of 16: 9 picked up by an image pickup device (not shown) is A / D converted in an A / D conversion circuit 2 and output from a timing generation circuit 8. The digital video data 3 ′ having an aspect ratio of 16: 9 is output from the A / D conversion circuit 2 at the timing according to the write clock signal 9 that is generated.

This digital video data 3'is recorded in FIRS.
t-In First-Out memory 4 (hereinafter, FI
It is input to the FO memory) and the write clock signal 9
It is written at the write timing by.

In addition, the write reset control circuit 13 receives the HD signal (horizontal synchronizing signal) 10 and the write clock signal 9 output from the timing generation circuit 8 at the point B'as shown in FIG. A write reset signal 16 for resetting the write (write) operation control counter is generated. The FIFO memory 4 inputs the write reset signal 16 and resets the write (write) operation control counter value in the FIFO memory 4 at the above timing, discards the data accumulated in the memory, and resets it. The latter data is treated as the first data. Therefore, after the reset, B ′ shown in FIGS.
The data of the video signal 1 at the point is set to the head, and the data after that is sequentially written in the FIFO memory 4.

Next, the read operation will be described. First, from the read clock signal 11 which is the output of the timing generation circuit 8 and the above-mentioned HD signal 10,
The read reset circuit 14 generates a read reset signal 17 for resetting the read (read) operation control counter at the start of the horizontal blanking period as shown in FIG. The FIFO memory 4 inputs the read reset signal 17 and resets the read (read) operation control counter value in the FIFO memory 4 at the above timing, and then from the top data of the FIFO memory 4, that is, at the point B '. The data is sequentially output based on the timing of the read clock signal 11.

Therefore, the digital image data having the aspect ratio of 16: 9 is the data at the point B ', but the digital image data having the aspect ratio of 4: 3 is read out as the data at the point H', and thereafter. FIFO memory 4
Between the points H'to I'corresponding to the horizontal blanking period stored in sequence, and the points I'to L'corresponding to the video period.
Video data between points is sequentially output.

As described above, digital video data 5'having an aspect ratio of 4: 3 is output from the FIFO memory 4 and input to the D / A conversion circuit 6, for example, and the analog video signal 7'at the timing of the read clock signal 11. Is output to a subsequent stage (not shown).

As shown in FIGS. 5 and 6, when the video signal 1 having the aspect ratio of 16: 9 is converted into the video signal 7'having the aspect ratio of 4: 3, the image center E having the aspect ratio of 16: 9 and the aspect ratio The image centers K ′ of the ratio 4: 3 are made to match. Therefore, the amount of data between points D and E and the amount of data between points E and F are equal to half the amount of data in the video period of a video signal with an aspect ratio of 4: 3. The amount is a data amount corresponding to the length of the horizontal blanking period of the video signal with the aspect ratio of 4: 3.
The reset pulse timing of the write reset timing signal 16 is set.

Further, as shown in FIG. 5, the read reset signal 17 sets the write (read) operation control counter value of the FIFO memory 4 to be reset every horizontal period.

The write reset operation for resetting the write (write) operation control counter value and the read reset operation for resetting the read (read) operation control counter value both operate in synchronization with the horizontal scanning period.

By the above operation, the video data from the point B'to the point F of the video signal with the aspect ratio 16: 9 in FIGS. 5 and 6 is converted into the video data from the point H'to the point L'of the video signal with the aspect ratio 4: 3. Can be converted to.

[0014]

As described above,
With this method, a video signal with an aspect ratio of 16: 9 can be converted into a video signal with an aspect ratio of 4: 3.
As shown in FIGS. 5 and 6, from the B ′ point to the F point of the video signal with the aspect ratio of 16: 9, in this manner, sequentially from the H ′ point to the L ′ point of the video signal with the aspect ratio of 4: 3. When converted to F, the A to B ′ points, which are the starting points of the horizontal blanking period of the video signal with the aspect ratio of 16: 9, and F
The data from the point to the point G, which is the end point of the video period, is FI.
It is removed from the FO memory 4 without being output to the subsequent stage.

Therefore, it is composed of information superimposed in the horizontal blanking period from the point A to the point C of the video signal having the aspect ratio of 16: 9, for example, camera operation diagnosis data and black level detection data. Data α (Fig. 5
Since the middle) is completely removed, for example, the horizontal synchronization inspection diagnosis cannot be performed in the operation diagnosis processing operation, and the black level detection processing operation cannot be performed in the horizontal blanking period. This has to be done within a certain period, which causes a problem such as a slow processing response speed.

The present invention eliminates these drawbacks, and even if a video signal having an aspect ratio of 16: 9 is converted into a video signal having an aspect ratio of 4: 3, the video signal having an aspect ratio of 16: 9 can be displayed within the horizontal blanking period. It is an object of the present invention to prevent the information superimposed on the video signal from being lost and to be superimposed within the horizontal blanking period of the video signal having the aspect ratio of 4: 3.

[0017]

In order to achieve the above object, the present invention has an aspect ratio of 1 when writing digital video data with an aspect ratio of 16: 9 into a FIFO memory.
The period corresponding to the period in which the horizontal blanking period of the digital video data of 6: 9 is included, and the period corresponding to the video period of the digital video data with the aspect ratio of 4: 3 are selected. This is a method in which a write clock pulse is generated and written in the FIFO memory during the generation period.

Further, when writing digital video data with an aspect ratio of 16: 9 into the FIFO memory, the FIFO before the timing when the information included in the horizontal blanking period of the digital video data with the aspect ratio of 16: 9 is written into the FIFO memory. A write reset control circuit for performing a memory write reset is provided. Further, there is a clock pulse for writing during a period including the above information and a period corresponding to a video period of digital video data having an aspect ratio of 4: 3, and after the period including the above information, an aspect ratio of 4: 3. And a write clock control circuit for outputting a write clock signal, which assumes that there is no clock pulse for writing until a period corresponding to the video period of the digital video data.

[0019]

A horizontal blanking period of a video signal having an aspect ratio of 16: 9 and a portion including necessary information in the horizontal blanking period and a portion corresponding to a video period having an aspect ratio of 4: 3 are included. , The unnecessary data sandwiched between the two parts, which is held in the FIFO memory by the clock pulse of the write clock signal and does not generate the clock pulse of the corresponding write clock signal, is not held. By combining the portions, the data amount suitable for the video signal having the aspect ratio of 4: 3 can be obtained.

In the horizontal blanking period of the video signal having the aspect ratio of 4: 3, the portion including the necessary information is converted, and similarly, the video period portion is converted in the video period.

[0021]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing a system configuration of an embodiment of the present invention, FIG. 2 is a timing chart diagram showing an operation of aspect ratio conversion, and FIG. 3 is an image having an aspect ratio of 16: 9 and an aspect ratio of 4: 3. It is a schematic diagram which shows the mutual relationship at the time of converting into a video.

In FIG. 1, the configuration is different from the conventional system configuration diagram of FIG. 4 in that the write clock signal 9 output from the timing generation circuit 8 is not directly input to the A / D conversion circuit 2 and the FIFO memory 4. , A write clock control circuit 12 for generating a write clock signal 15 from the write clock signal 9 and the HD signal 10 is newly provided, and the write clock signal 15 is provided to the A / D conversion circuit 2 and the FIFO.
It is input to the memory 4. Other configurations are the same as those in FIG.

Further, the write reset control circuit 13 outputs a write reset signal 16 for write resetting the FIFO memory 4 as in the conventional example, but the reset timing is different from that in the conventional example, as shown in FIG. The write reset operation is performed at a point before the data α that is superimposed during the ranking period, for example, at the point A.

After the write reset, the FIFO memory 4 sequentially holds and stores the digital video data 3 from the point A by the clock pulse of the write clock signal 15, and the horizontal blanking of the video signal of the aspect ratio 4: 3. The data from point A to point B, which has a data amount corresponding to the data amount of the period, is stored in order, and the data α superimposed during that is also stored in the FIFO memory 4.

In the write clock signal 15, the clock pulse is temporarily stopped after the point B, and therefore, after the point B, the clock pulse is temporarily stopped, and the point D (the reading of the video signal of the aspect ratio 4: 3 is started. Data up to
It is not stored in the FIFO memory 4.

In the write clock signal 15, the clock pulse is generated again from the point D to the point F after the temporary stop period of the clock pulse, and the data of the video period from the point D to the point F is previously stored. Following the data from points A to B, they are sequentially held and stored in the FIFO memory 4. In addition,
The clock pulse may be generated after the point F, and the data after the point F may be stored and held.

The positions of the points D and F are half the data amount of the width corresponding to the video period having the aspect ratio of 4: 3 on both sides of the point E at the image center position in the video period, as in the conventional example.
The timing can be determined by allocating the data amount corresponding to.

The data stored by the above write operation is read from the H point as shown in the output waveform of the video signal output 7 with the aspect ratio of 4: 3 in FIG. 2 by the read operation similar to the conventional example. A video signal having an aspect ratio of 4: 3 is obtained in which a horizontal blanking period including the data α is provided between the points I and a video period in which the point K is the image center is provided from the points I to L.

[0029]

According to the present invention, the aspect ratio is 16: 9.
It is possible to convert into a video signal with an aspect ratio of 4: 3, including the information superposed in the horizontal blanking period of the video signal.

[Brief description of drawings]

FIG. 1 is a diagram showing a system configuration of an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of aspect ratio conversion.

FIG. 3 is a schematic diagram showing a mutual relationship when an image with an aspect ratio of 16: 9 is converted into an image with an aspect ratio of 4: 3.

FIG. 4 is a diagram showing an example of a conventional system configuration.

5 is a timing chart showing the operation of aspect ratio conversion shown in FIG.

FIG. 6 is a schematic diagram showing the relationship between the screens before and after the aspect ratio conversion shown in FIGS. 4 and 5;

[Explanation of symbols]

 1: video signal, 2: A / D conversion circuit, 3: digital video data, 4: FIFO memory, 5: digital video data, 6: D / A conversion circuit, 7: video signal, 8: timing generation circuit, 9 : Write clock signal, 10: HD signal, 11: read clock signal, 12: write clock control circuit, 13: write reset control circuit, 14: read reset control circuit, 15: write clock signal, 16: write reset signal, 17 : Read reset signal.

Claims (3)

[Claims] 1. A system for generating a video signal of a second aspect ratio smaller than the first aspect ratio from a video signal of a first aspect ratio, wherein the video signal of the first aspect ratio is The information part superimposed on the horizontal blanking period of the video signal of the first aspect ratio and the video signal part corresponding to the predetermined video period of the video signal of the second aspect ratio are aspect ratio converted and extracted. Aspect ratio conversion method. 2. In a system for generating a video signal of a second aspect ratio smaller than the first aspect ratio from a video signal of the first aspect ratio, the video signal of the first aspect ratio is A / A First-In First-Out memory (hereinafter, referred to as a FIFO memory) for writing the D-converted digital video data, and the FIFO memory includes information in the horizontal blanking period of the digital video data having the first aspect ratio. First part
And the second period, which is a portion corresponding to the video period of the video signal having the second aspect ratio, the clock pulse is generated, and the clock pulse is generated from after the first period to before the second period. And a write clock control circuit for controlling by a write clock signal that the clock pulse is not generated between the video signal processing device. 3. The video signal processing device according to claim 2, wherein a write reset control circuit that generates a write reset signal that resets a write (write) operation control counter of the FIFO memory and a read (read) operation of the FIFO memory. ) A read reset control circuit that generates a read reset signal that resets the operation control counter, and a timing generation circuit that generates and supplies a read clock signal as the read timing of the FIFO memory are provided, and a horizontal blanking period from the FIFO memory. A video signal processing device, which reads digital video data of a second aspect ratio in which information is superimposed on the video signal.