JPH07221713A - Coded signal decoder - Google Patents

Abstract

PURPOSE:To provide the coded signal decoder in which noise caused by mis- decoding is not distinct with simple configuration when a correction disable error is produced in a coded signal. CONSTITUTION:A synchronization detection section 1 detects synchronization of a coded signal S101. A bit allocation error detection section 2 and a scale factor error detection section 3 detect an error. A sample error count section 4 counts the number of errors of sample data. A repeat control section 5 controls repetition of errors in each error signal. Frame repeat is implemented by a frame repeat memory 6 in the case of the presence of the error. A demultiplexer 7 demultiplexes a coded signal S109. An inverse quantization section 8 applies inverse quantization to sample data S113. An inverse normalization section 9 implements inverse normalization. Through the constitution above, when errors of a prescribed number or over are in existence in the sample data, the noise due to the errors is not distinct with a simple processing and a small memory capacity by implementing the frame repeat.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a coded signal decoding device for decoding a coded signal obtained by coding a signal on a frame-by-frame basis, and more particularly to interpolation for errors in the coded signal.

[0002]

2. Description of the Related Art In recent years, with the progress and development of high-efficiency coding technology, the technology for high-efficiency coding of digital signals such as voice and images is about to expand its application field. A technique for performing high-efficiency coding for voice using a technique such as subband coding or transform coding, and transmitting or recording this coded signal by communication or using a storage medium is being widely applied.

FIG. 7 is a block diagram of a recording / reproducing apparatus using such high efficiency coding. In FIG. 7, 71 is a band dividing unit, 72 is an encoding unit, 73 is a modulating unit, 74 is a demodulating unit, 75 is a decoding unit, and 76 is a band synthesizing unit.

The operation of the recording / reproducing apparatus configured as described above will be described below. The band division unit 71 divides the input signal S71 into information of a plurality of frequency bands by orthogonal transformation or a filter bank, and the recording band division signal S
Output as 72. The encoding unit 72 performs high-efficiency encoding of the recording band division signal S72 on a plurality of samples in each frequency band on a frame-by-frame basis and outputs the recording coded signal S73. The modulator 73 adds a code for error correction to the recording coded signal S73 and modulates it, and outputs it as a recording signal S74. The recording signal S74 is obtained as a reproduction signal S75 via a storage medium or a transmission path. The demodulation section 74 demodulates the reproduced signal S75 thus obtained and performs error correction to output a reproduced coded signal S76. If there is an uncorrectable error, the uncorrectable signal S77 is output. The decoding unit 75 performs decoding from the reproduction coded signal S76 and the uncorrectable signal S77. Since the uncorrectable reproduction coded signal is coded, interpolation processing is performed according to the error location, and the reproduction band division signal S78 is output. The band synthesizing unit 76 synthesizes the signals of the respective bands of the reproduction band division signal S78 and outputs it as an output signal S79.

As such a coded signal decoding device,
For example, there is one as disclosed in Japanese Patent Laid-Open No. 24-83434.

An example of a conventional coded signal decoding device using such a technique will be described below.

FIG. 8 is a block diagram of a conventional coded signal decoding apparatus. In FIG. 8, 1 is a synchronization detection unit, 2 is a demultiplexer, 3 is an inverse quantization unit, 4 is an inverse normalization unit, 81 is a repeat control unit, and 82 is a frame repeat memory.

The operation of the coded signal decoding device configured as described above will be described below.

The synchronization detecting section 1 reproduces a coded signal S101 obtained by demodulation and error correction and an uncorrectable signal S1.
The synchronization pattern is extracted from No. 02 and the synchronization signal S103 is output. When the synchronization pattern cannot be extracted due to uncorrectability or the like, the synchronization error signal S104 is output. The demultiplexer 2 separates the reproduction coded signal S101 based on the synchronization signal S103, extracts the bit allocation S111 indicating the bit allocation of the sample data, and outputs it. By this bit allocation S111, a scale factor S11 indicating the level of sample data in each frequency band
2 and the sample data S113 are extracted and output. Further, when the bit allocation S111 and the scale factor S112 are separated and extracted, the uncorrectable signal S102
Indicates that there is an uncorrectable error in the reproduced coded signal S101, the bit allocation uncorrectable signal S801 and the scale factor uncorrectable signal S116 are output corresponding to the respective corresponding portions. The inverse quantization unit 3 inversely quantizes the sample data S113 by the bit allocation S111 and outputs an inverse quantized signal S114. The inverse normalization unit 4 uses the inverse quantized signal S1 of each frequency band.
14 is denormalized by the scale factor S112 of each band and output as a denormalized band division signal S115. The repeat control unit 81 outputs a repeat control signal S802 when the synchronization error signal S104, the bit allocation uncorrectable signal S801 or the scale factor uncorrectable signal S116 indicates an error.
The frame repeat memory 82 uses the repeat control signal S80.
When 2 indicates repeat, the denormalized band division signal S115 is repeated and output as the reproduction band division signal S803.

Here, processing such as interpolation when the sample data S113 has an error is not performed. This is because (1) the sample data, which is a band-divided signal, is decimated (decimated), and simple interpolation such as zero-order or first-order hold that is generally performed for a wide-band signal is not effective. (2) Even if an error occurs, the band is limited, and since the signal level is limited by the scale factor, even a small error is inconspicuous.
(3) Performing interpolation processing on all sample data complicates the processing and increases the hardware scale.

FIG. 9 shows an example of the structure of a coded frame of a coded signal. The structure of a sync pattern T, a bit allocation U, a scale factor V and sample data W is taken from the beginning of the coded frame. The synchronization pattern T includes a bit pattern for frame synchronization and system information necessary for synchronization and reproduction. The bit allocation U indicates the bit arrangement information of the scale factor V and the sample data W, that is, the number of bits assigned to each frequency band. The scale factor V is a coefficient for normalizing the sample data W included in the frame for each frequency band. The sample data W includes several samples to several tens of samples in one frame for each frequency band. In addition, a bit allocation U, scale factor V, and sample data W may be provided with a prohibition pattern that is a prohibition pattern for the purpose of suppressing the occurrence of a pseudo synchronization pattern.

FIG. 10 shows the operation timing of the conventional coded signal decoding device. Reproduction coded signal S10
When A, B, C, D, E frames of 1 are input,
The uncorrectable signal S102 has an error a in the bit allocation U in the frame B, an error b in the scale factor V in the frame C, and an error c, d, e, f, g in the sample data W in the frame D. To do. Since there is no error in the frame A, the bit allocation, scale factor, and sample data are separated from the reproduced coded signal S101 based on the synchronization signal S103 output from the synchronization detection unit 1, and inverse quantization and inverse normalization are performed. The DA of the denormalized band division signal S803 is output. In frame B, since bit error U exists in bit allocation U, scale factor V and sample data W are not correctly extracted. Therefore, the DB of the denormalized band-divided signal S114 cannot be correctly decoded as indicated by the diagonal lines. But,
Since the bit allocation U has an error a, the repeat control unit 81 outputs the repeat control signal S802,
The frame repeat memory 82 repeats the value DA of the immediately preceding frame. In the frame C, the scale factor V has an error b, so that the denormalization is not performed correctly. However, similar to the frame B, the repeat control signal S8
Since 02 is output, the value DA of the immediately preceding frame is repeated. The frame D has many errors c, d, e, f, and g in the sample data W, but is denormalized while including errors. Therefore, the DD of the reproduction band division signal S803
The signal obtained by band-combining is included in a part of the original signal indicated by the dotted line.

[0013]

The above-mentioned conventional coded signal decoding apparatus has a problem that noise is conspicuous when many errors occur in the sample data. Further, the conventional coded signal decoding device has a problem that it is necessary to store at least one frame of decoded sample data in order to repeat the coded frame.

The present invention solves the above-mentioned conventional problems, and when an error occurs in a coded signal, the coded signal decoding apparatus is capable of performing effective interpolation with a simple process and a small memory capacity. It is intended to provide.

[0015]

To achieve this object, a coded signal decoding device of the present invention comprises a coded signal obtained by performing error correction on a signal from a transmission line or a recording medium,
Sync detection means for inputting an uncorrectable signal indicating uncorrectable, extracting a synchronous pattern in the encoded signal, and outputting a synchronous signal and a synchronous error signal indicating that synchronization cannot be detected, and a synchronous signal and an uncorrectable signal Signal and a bit allocation error detection means for outputting a bit allocation error signal indicating that the bit allocation portion in the encoded signal contains an uncorrectable error based on the synchronization signal, and the synchronization signal and the uncorrectable signal Signal and a scale factor error detecting means for outputting a scale factor error signal indicating that the scale factor part in the encoded signal includes an uncorrectable error with reference to the synchronizing signal, and the synchronizing signal and the uncorrectable signal. Input the signal and count the number of uncorrectable data in the sampled data part of the encoded signal based on the sync signal. However, when there is a certain number or more of uncorrectable data in one frame, the sample error count means for outputting the sample error signal, the synchronization error signal, the bit allocation error signal, the scale factor error signal and the sample error signal are input. , If any one or more of these signals indicate an error, repeat control means for outputting a repeat control signal for instructing frame repeat or mute one or more times, and a repeat control signal, The coded signal is input, and the frame repeat memory means for outputting an interpolated coded signal obtained by performing frame repeat or mute on the coded signal in accordance with the repeat control signal, a synchronization signal and an interpolated coded signal. Input and input the interpolated coded signal based on the sync signal. A bit allocation that indicates the bit allocation of the sample data subjected to releasing,
A scale factor indicating the level of the sample data in each frequency band, a demultiplexing means for outputting the sample data, the sample data and the bit allocation are input, inverse quantization is performed according to the bit allocation, and an inverse quantized signal is obtained. An inverse quantizing means for outputting, an inverse quantized signal and a scale factor are inputted, the sample data of each frequency band is denormalized at a level indicated by the scale factor of each band, and an inverse normalization for outputting a band division signal. And means.

Further, the coded signal decoding device of the present invention is
The coded signal obtained by performing error correction on the signal from the transmission line or the recording medium and the uncorrectable signal indicating the uncorrectability are input, the synchronization pattern in the coded signal is extracted, and the synchronization signal and the synchronization are synchronized. A sync detecting means for outputting a sync error signal indicating that detection is impossible and a sync signal and an uncorrectable signal are inputted, and an uncorrectable error is included in a bit allocation portion in the encoded signal with reference to the sync signal. A bit allocation error detecting means for outputting a bit allocation error signal indicating that the input signal and a synchronizing signal and an uncorrectable signal are input, and the number of uncorrectable data of the sample data portion in the encoded signal is counted with reference to the synchronizing signal. A sample error counting means for outputting a sample error signal when a certain number of uncorrectable data exist in one frame, and a synchronization error Signal, a bit allocation error signal, and a sample error signal are input, and when any one or more of these signals indicate an error, a repeat for instructing frame repeat or mute one or more times. A repeat control means for outputting a control signal, a repeat control signal, an encoded signal, and an uncorrectable signal are input, and the encoded signal and the uncorrectable signal are subjected to through or frame-unit frame repeat or mute according to the repeat control signal. The frame repeat memory means for outputting the interpolated coded signal and the interpolated uncorrectable signal, and the sync signal, the interpolated coded signal, and the interpolated uncorrectable signal are input, and the interpolated coded signal is separated based on the sync signal. The bit allocation indicating the bit allocation of the sample data and the samples of each frequency band A scale factor indicating the level of the data, a scale factor uncorrectable signal indicating that each scale factor includes an uncorrectable error, a demultiplexing means for outputting the sample data, and the sample data and the bit allocation. Input, perform inverse quantization according to bit allocation, and input an inverse quantization means for outputting an inverse quantized signal, a scale factor and a scale factor uncorrectable signal,
If there is an error in the scale factor, the scale factor interpolating means that outputs the interpolated scale factor that replaces the value of the immediately preceding frame with no error or the level of that value is attenuated, and the inverse quantized signal and the interpolated scale factor. It has an inverse normalization means for inputting, denormalizing the sample data of each frequency band at the level indicated by the interpolation scale factor of each band, and outputting a band division signal.

Further, the coded signal decoding device of the present invention is
The coded signal obtained by performing error correction on the signal from the transmission line or the recording medium and the uncorrectable signal indicating the uncorrectability are input, the synchronization pattern in the coded signal is extracted, and the synchronization signal and the synchronization are synchronized. A sync detecting means for outputting a sync error signal indicating that the signal cannot be detected, a sync signal, an encoded signal and an uncorrectable signal are inputted, and the use of the sync signal as a reference is prohibited in a bit allocation portion in the encoded signal. When a pattern exists or when an uncorrectable error is included, a bit allocation prohibition pattern detecting means for outputting a bit allocation error signal, a synchronization signal and an uncorrectable signal are input, and encoding is performed with reference to the synchronization signal. Count the number of uncorrectable data in the sample data part of the signal, and
When there is a fixed number or more of uncorrectable data in the frame, a sample error counting means for outputting a sample error signal, a synchronization error signal, a bit allocation error signal and a sample error signal are inputted, and one of them is inputted. When the above signals indicate an error, a repeat control means for outputting a repeat control signal for instructing frame repeat or mute one or more times, a repeat control signal, an encoded signal, and an uncorrectable signal. A frame repeat memory means for inputting and outputting an interpolated coded signal and an interpolated uncorrectable signal obtained by performing frame repeat or mute on a coded signal and an uncorrectable signal according to a repeat control signal. Input the interpolated coded signal and the interpolated uncorrectable signal, and synchronize The bit allocation that indicates the bit allocation of the sample data by separating the interpolated coded signal based on the signal, the scale factor that indicates the level of the sample data in each frequency band, and that each scale factor contains an uncorrectable error If a scale factor uncorrectable signal indicating the signal and the demultiplexing means for outputting the sample data, the scale factor and the scale factor uncorrectable signal are input, and the scale factor is checked and the pattern is prohibited, or When the factor uncorrectable signal indicates an error, the scale factor inhibition pattern detecting means for outputting the scale factor error signal, the sample data and the bit allocation are input, and the inverse quantization is performed according to the bit allocation to obtain the inverse quantized signal. Inverse amount to output Enter the means, the scale factor and the scale factor error signal,
If the scale factor error signal indicates an error, the scale factor interpolation means that outputs the scale factor error-free previous frame value or the interpolated scale factor that replaces the previous frame value with the level attenuated value, and the inverse It has a denormalization means for inputting the quantized signal and the interpolation scale factor, denormalizing the sample data of each frequency band at the level indicated by the interpolation scale factor of each band, and outputting a band-divided signal. .

[0018]

With the above-described structure, the coded signal decoding device of the present invention is provided with the sample error counting means when the synchronization cannot be detected by the synchronization detecting means, there is an error in bit allocation, there is an error in the scale factor, and the sample error counting means. When it is determined that there are a certain number or more of errors in the sample data within one frame, the frame repeat memory repeats the coded signal of the immediately preceding correct frame, so that noise is generated even if the coded signal has an error. The inconspicuous band division signal can be output.

Further, the coded signal decoding apparatus of the present invention has the above-mentioned configuration, in the case where the synchronization cannot be detected by the synchronization detecting means, whether there is an error in the bit allocation, or the sample error counting means has the sample data within one frame. When it is determined that there are a certain number or more of errors, the frame repeat memory repeats the coded signal of the immediately preceding correct frame. Further, when there is an error in the scale factor, the scale factor interpolating means interpolates the error scale factor using the scale factor of the immediately preceding correct frame, so that noise does not stand out even if there is an error in the encoded signal. A band division signal can be output.

Further, the coded signal decoding device of the present invention has the above-mentioned configuration, in the case where the synchronization cannot be detected by the synchronization detecting means, whether the bit allocation has an error or an inhibition pattern, or the sample data counting means is within one frame. When it is determined that there are a certain number or more of errors in the sample data, the frame repeat memory repeats the encoded signal of the immediately preceding correct frame.
If the scale factor has an error or a prohibition pattern, the scale factor interpolating means interpolates the scale factor having an error using the scale factor of the immediately preceding correct frame, so that the encoded signal has an error or a prohibition pattern. However, it is possible to output a band-divided signal in which noise is inconspicuous.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a coded signal decoding apparatus according to the first embodiment of the present invention. Figure 1
, 1 is a synchronization detection unit, 2 is a bit allocation error detection unit, 3 is a scale factor error detection unit, 4
Is a sample error count unit, 5 is a repeat control unit, 6
Is a frame repeat memory, 7 is a demultiplexer, 8
Is an inverse quantizer, and 9 is an inverse normalizer.

The operation of the coded signal decoding apparatus of the first embodiment configured as above will be described below.

The synchronization detecting section 1 reproduces coded signals S101 and uncorrectable signals S1 obtained by demodulation and error correction.
The synchronization pattern is extracted from No. 02 and the synchronization signal S103 is output. When the synchronization pattern cannot be extracted due to uncorrectability or the like, the synchronization error signal S104 is output. The bit allocation error detection unit 2 detects whether the uncorrectable signal S102 is output to the bit allocation area with reference to the synchronization signal S103, and outputs the bit allocation error signal S105 when there is an error. The scale factor error detector 3 detects whether the uncorrectable signal S102 is output in the scale factor region with reference to the synchronization signal S103, and outputs the scale factor error signal S106 when there is an error. The sample error counting unit 4 counts the errors in the sample data area with reference to the synchronization signal S103, and when the number is a certain number or more, for example, four or more, the sample error signal S107.
Is output. The repeat controller 5 uses the synchronization error signal S10
4 or bit allocation error signal S105, scale factor error signal S106, or sample error signal S107 indicates an error,
A repeat control signal S108 for instructing repeat is output. The frame repeat memory 6 uses the reproduction coded signal S10.
1 frame data is stored and the repeat control signal S10 is stored.
Only when 8 designates repeat, the interpolated coded signal S109 in which the stored frame data is repeated is output. In order to avoid continuous repeats, for example, when two frame repeats are continuous, mute may be performed thereafter. The demultiplexer 7 separates the interpolated coded signal S109 based on the synchronization signal S103, and bit allocation S11 indicating the bit allocation of the sample data.
1 is extracted and output. This bit allocation S11
According to 1, the scale factor S112 and the sample data S113 indicating the level of the sample data of each frequency band are extracted and output. The dequantization unit 8 dequantizes the sample data S113 by the bit allocation S111 and outputs the dequantized signal S114. The denormalization unit 9 denormalizes the dequantized signal S114 of each frequency band with the scale factor S112 of each band, and outputs it as a reproduction band division signal S115.

When the band-divided signal is repeated by frame repeat, even if the band-divided signal is discontinuous, the band combining unit following the decoding unit combines the respective bands to smoothly connect as a wide-band signal. As in the case of repeating a wideband signal as it is, pulsed noise is not generated at the discontinuous point.

FIG. 2 is a timing chart for explaining the operation of the coded signal decoding device of the first embodiment.

A, B, C of the reproduction coded signal S101,
When the D and E frames are input, the uncorrectable signal S1
02 has an error a in the bit allocation U in the frame B, an error b in the scale factor V in the frame C, and errors c, d, e, in the sample data W in the frame D.
It is assumed that there are f and g. The structure of each frame of the reproduction coded signal S101 is the same as that described in FIG. 9 of the conventional example. Since the frame A has no error, the frame repeat memory 6 outputs the frame data CA stored therein as it is as the interpolated coded signal S109. This signal is separated by the demultiplexer 7, dequantized and denormalized, and output as a reproduction band division signal S115. In the frame B, since the error a exists in the bit allocation U, the bit allocation error detection unit 2 outputs the allocation error signal S105 and the repeat control unit 5 outputs the repeat control signal S108. Therefore, the frame repeat memory 6 discards the newly input frame data CB containing an error, repeats the immediately previous error-free frame data CA, and interpolates the encoded signal S109.
Output as. Therefore, the same data as the immediately preceding frame is output as the reproduction band division signal S115. In the frame C, since the error b exists in the scale factor V, the scale factor error detection unit 3 outputs the scale factor error signal S106, and the repeat control unit 5 outputs the repeat control signal S108. Therefore, the frame repeat memory 6 discards the newly input frame data CC including an error, further repeats the immediately previous error-free frame data CA, and outputs it as an interpolated coded signal S109. Therefore, the same data as the immediately preceding frame is repeatedly output as the reproduction band division signal S115. In frame D, sample data W has many errors c, d, e, f, and g. The sample error counting unit 4 outputs a sample error signal S107 and outputs a repeat control signal S108 from the repeat control unit 5 when counting a predetermined number or more of errors in one frame. Therefore, the frame repeat memory 6 discards the newly input frame data CD including an error, repeats the immediately previous error-free frame data CA, and outputs it as an interpolated coded signal S109. Therefore, the same data as the immediately preceding frame is repeatedly output as the reproduction band division signal S115.

As described above, according to the first embodiment, when the synchronization cannot be extracted by the synchronization detecting section, when there is an error in the bit allocation or scale factor, and when the sample data counting section detects the sample data in the frame. If it is determined that there are a certain number or more of errors, the correct coded signal immediately before being stored by the frame repeat memory is repeated for each frame, so that even if there are many errors in the sampled data in the coded signal. It is possible to output a band-divided signal in which noise is inconspicuous. Further, as compared with the case of storing and repeating a band-divided signal as in the conventional example, a coded signal that is a compressed signal is stored and repeated, so that a coded signal decoding device with a small amount of memory is provided. Can be realized.

FIG. 3 is a block diagram showing the configuration of a coded signal decoding apparatus according to the second embodiment of the present invention. Figure 3
1, 1 is a synchronization detection unit, 2 is a bit allocation error detection unit, 4 is a sample error count unit, 5 is a repeat control unit, 6 is a frame repeat memory, 7 is a demultiplexer, 8 is an inverse quantization unit, and 9 is an inverse unit. Normalization section, 10
Is a scale factor interpolator.

The operation of the coded signal decoding apparatus of the second embodiment having the above configuration will be described below.

The synchronization detecting section 1 reproduces coded signal S101 obtained by demodulation and error correction and uncorrectable signal S1.
The synchronization pattern is extracted from No. 02 and the synchronization signal S103 is output. When the synchronization pattern cannot be extracted due to uncorrectability or the like, the synchronization error signal S104 is output. The bit allocation error detection unit 2 detects whether the uncorrectable signal S102 is output to the bit allocation area with reference to the synchronization signal S103, and outputs the bit allocation error signal S105 when there is an error. The sample error counting unit 4 counts the errors in the sample data area with reference to the synchronization signal S103. When the number of errors is a certain number or more, for example, four or more, the sample error signal S
107 is output. The repeat controller 5 uses the synchronization error signal S104 or the bit allocation error signal S1.
05 or the sample error signal S107 indicates an error, the repeat control signal S for instructing repeat
108 is output. The frame repeat memory 6 stores the frame data of the reproduction coded signal S101 and the uncorrectable signal S1.
02, and outputs an interpolation coded signal S109 and an interpolation uncorrectable signal S110 in which the stored frame data is repeated only when the repeat control signal S108 indicates a repeat. In order to avoid continuous repeats, for example, when two frame repeats are continuous, mute may be performed thereafter. The demultiplexer 7 separates the interpolated coded signal S109 based on the synchronization signal S103, extracts the bit allocation S111 indicating the bit allocation of the sample data, and outputs it. With this bit allocation S111, a scale factor S112 indicating the level of sample data in each frequency band and sample data S113 are extracted and output. Also, when the scale factor S112 is separated and extracted, if the interpolated uncorrectable signal S110 indicates that the interpolated coded signal S109 has an uncorrectable error, the scale factor uncorrectable signal S116 is output corresponding to the corresponding portion. Output. The inverse quantization unit 8 inversely quantizes the sample data S113 by the bit allocation S111, and outputs the inverse quantized signal S11.
4 is output. When the scale factor uncorrectable signal S116 indicates an error, the scale factor interpolating unit 10 interpolates the errored scale factor S112 with a previous error-free value or with a value obtained by attenuating the value. The factor S117 is output.
The denormalization unit 9 denormalizes the dequantized signal S114 of each frequency band by the interpolation scale factor S117 of each band, and outputs it as a reproduction band division signal S115.

FIG. 4 is a timing chart for explaining the operation of the coded signal decoding apparatus of the second embodiment.

A, B, C of the reproduction coded signal S101,
When the D and E frames are input, the uncorrectable signal S1
02 has an error a in the bit allocation U in the frame B, an error b in the scale factor V in the frame C, and errors c, d, e, in the sample data W in the frame D.
It is assumed that there are f and g. The structure of each frame of the reproduction coded signal S101 is the same as that described in FIG. 9 of the conventional example. Since the frame A has no error, the frame repeat memory 6 outputs the frame data CA stored therein as it is as the interpolated coded signal S109. This signal is separated by the demultiplexer 7, dequantized and denormalized, and output as a reproduction band division signal S115. Since the frame B has an error a in the bit allocation U, the bit allocation error detector 2 outputs the allocation error signal S105, and the repeat controller 5 outputs the repeat control signal S108. Therefore, the frame repeat memory 6 discards the newly input frame data CB including an error, repeats the immediately previous error-free frame data CA, and inserts the interpolated coded signal S1.
It outputs as 09. Therefore, the reproduction band division signal S11
As 5, the same data as the immediately preceding frame is output. Although the frame C has the error b in the scale factor V, the frame repeat memory 6 outputs the frame data CC and the interpolation uncorrectable signal S110 at the same time. The demultiplexer 7 outputs the scale factor S112 and the scale factor uncorrectable signal S116. The scale factor interpolator 10 uses the scale factor uncorrectable signal S11.
6 outputs an interpolated scale factor S117 obtained by interpolating the scale factor S112 of the erroneous band. The scale factor interpolation replaces the scale factor of the erroneous frequency band with the scale factor value of the frame B, which is the value of the previous correct frame having no error in the scale factor, with the scale factor value attenuated by, for example, 2 dB.
Dequantization and denormalization are performed based on this. In the case of this example, there is no error in the sample data W of the frame C, and the frame length is generally several ms to 10 ms, and there is no significant change in the scale factor value in 1 to 2 frames. As the signal S115, a signal substantially close to the original signal is obtained. In frame D, sample data W has many errors c, d, e, f, and g. The sample error counting unit 4 outputs a sample error signal S107 when counting a predetermined number or more of errors in one frame, and the repeat control unit 5 outputs a repeat control signal S108. Therefore, the frame repeat memory 6 discards the newly input frame data CD including an error, repeats the immediately preceding frame data CC, and outputs it as the interpolated coded signal S109. Therefore, the same data as the immediately preceding frame is repeatedly output as the reproduction band division signal S115.

As described above, according to the second embodiment, when the synchronization cannot be extracted by the synchronization detecting section, when there is an error in bit allocation, and when the sample data counting section detects an error in the sample data in the frame. However, if it is determined that there is a certain number or more, the correct coded signal immediately before being stored by the frame repeat memory is repeated for each frame, so that noise is conspicuous even if there are many errors in the sampled data in the coded signal. It is possible to output a non-band split signal. If there is an error in the scale factor, only the scale factor of the erroneous band, not the frame repeat, is interpolated with the value of the immediately preceding frame, and the error-free data is used as it is, so that the band division signal close to the original signal is obtained. Can be output. Compared to the case of storing and repeating a band-divided signal as in the conventional example, by adopting a configuration of storing and repeating a coded signal that is a compressed signal, a coded signal decoding in which errors are less noticeable with a small memory amount Device can be realized.

FIG. 5 is a block diagram showing the configuration of a coded signal decoding apparatus according to the third embodiment of the present invention. Figure 5
In FIG. 1, 1 is a synchronization detection unit, 11 is a bit allocation prohibition pattern detection unit, 4 is a sample error count unit, 5 is a repeat control unit, 6 is a frame repeat memory, 7 is a demultiplexer, 8 is an inverse quantization unit, and 9 is An inverse normalization unit, 12 a scale factor prohibited pattern detection unit,
Reference numeral 10 is a scale factor interpolation unit.

The operation of the coded signal decoding apparatus of the third embodiment having the above configuration will be described below.

The synchronization detector 1 reproduces the coded signal S101 obtained by demodulation and error correction and the uncorrectable signal S1.
The synchronization pattern is extracted from No. 02 and the synchronization signal S103 is output. When the synchronization pattern cannot be extracted due to uncorrectability or the like, the synchronization error signal S104 is output. The bit allocation prohibition pattern detection unit 2 sets the uncorrectable signal S1 in the bit allocation area based on the synchronization signal S103.
02 is output or the existence of a pattern prohibited as allocation is detected, and if there is an error, the bit allocation error signal S105 is output. The sample error counting unit 4 counts errors in the sample data area with reference to the synchronization signal S103,
When the number is a certain number or more, for example, four or more, the sample error signal S107 is output. The repeat controller 5 uses the synchronization error signal S104, the bit allocation error signal S105, or the sample error signal S107.
Indicates an error, the repeat control signal S108 instructing repeat is output. The frame repeat memory 6 stores the frame data of the reproduction coded signal S101 and the uncorrectable signal S102, and the repeat control signal S10.
The interpolation coded signal S109 and the interpolation uncorrectable signal S110 in which the stored frame data are repeated are output only when 8 indicates the repeat. In order to avoid continuous repeats, for example, when two frame repeats are continuous, mute may be performed thereafter. The demultiplexer 7 separates the interpolated coded signal S109 based on the synchronization signal S103, extracts the bit allocation S111 indicating the bit allocation of the sample data, and outputs it. By this bit allocation S111, a scale factor S11 indicating the level of sample data in each frequency band
2 and the sample data S113 are extracted and output. Also, when the scale factor S112 is separated and extracted, if the interpolation uncorrectable signal S110 indicates that the interpolated coded signal S109 has an uncorrectable error, the scale factor uncorrectable signal S116 is output corresponding to the corresponding portion. Output. The inverse quantizer 8 uses the bit allocation S111.
Then, the sample data S113 is dequantized and the dequantized signal S114 is output. The scale factor prohibition pattern detection unit 12 uses the scale factor uncorrectable signal S116.
Indicates an error or scale factor S1
When it is detected that 12 is a pattern prohibited as a scale factor, the scale factor error signal S
118 is output. When the scale factor error signal S118 indicates an error, the scale factor interpolating unit 10 interpolates the erroneous scale factor S112 with a previous error-free value or a value obtained by attenuating that value. Outputs S117. The inverse normalization unit 9 uses the inverse quantized signal S11 of each frequency band.
4 is denormalized by the interpolation scale factor S117 of each band and output as a reproduction band division signal S115.

FIG. 6 is a timing chart for explaining the operation of the coded signal decoding apparatus of the third embodiment.

A, B, C of the reproduction coded signal S101,
When the D and E frames are input, the uncorrectable signal S1
It is assumed that 02 is a frame B, a prohibition pattern a is in the bit allocation U, a scale factor V is a prohibition pattern b in the frame C, and errors c, d, e, f, g are in the sample data W in the frame D. . The structure of each frame of the reproduction coded signal S101 is the same as that described in FIG. 9 of the conventional example. Since the frame A has no error, the frame repeat memory 6 outputs the frame data CA stored therein as it is as the interpolated coded signal S109. This signal is separated by the demultiplexer 7 and subjected to dequantization and denormalization to obtain the reproduction band division signal S115.
Output as. Frame B is bit allocation U
Since the prohibited pattern a exists in the bit allocation prohibited pattern detection section 11,
105 is output, and the repeat control unit 5 outputs the repeat control signal S108. Therefore, the frame repeat memory 6 discards the newly input frame data CB containing an error, repeats the immediately previous error-free frame data CA, and outputs it as an interpolated coded signal S109. Therefore, the same data as the immediately preceding frame is output as the reproduction band division signal S115. In the frame C, the scale factor V has the prohibited pattern b, but the frame repeat memory 6 outputs the frame data CC and the interpolation uncorrectable signal S110 at the same time. The demultiplexer 7 outputs the scale factor S112 and the scale factor uncorrectable signal S116. The scale factor prohibition pattern detection unit 12 detects that the scale factor S112 is a prohibited pattern, and outputs a scale factor error signal S118. Scale factor interpolator 1
0 outputs an interpolation scale factor S117 obtained by interpolating the scale factor S112 of the error band from the scale factor error signal S118. By performing inverse quantization and inverse normalization based on this, the reproduction band division signal S1
As the signal 15, an inconspicuous signal is output. The frame D has a number of errors c, d, e, in the sample data W.
There are f and g. The sample error counting unit 4 outputs a sample error signal S107 when counting a predetermined number or more of errors in one frame, and the repeat control unit 5 outputs a repeat control signal S108. Therefore, the frame repeat memory 6 discards the newly input frame data CD including an error, repeats the immediately preceding frame data CC, and outputs it as the interpolated coded signal S109. Therefore, the same data as the immediately preceding frame is repeatedly output as the reproduction band division signal S115.

As described above, according to the third embodiment, when the synchronization cannot be extracted by the synchronization detector, when the inhibition pattern exists in the bit allocation, and when the sample data count unit detects that the sample data in the frame is The mistake is
If it is determined that a certain number or more exist, by repeating the immediately previous correct encoded signal stored by the frame repeat memory in frame units, even if the sample data in the encoded signal has many errors or prohibited patterns, noise An inconspicuous band division signal can be output. If there is an error or a prohibited pattern in the scale factor, only the scale factor of the error band, not the frame repeat, is interpolated, and the error-free data is used as it is to output a band-divided signal with no error. be able to. Compared to the case of storing and repeating a band-divided signal as in the conventional example, by adopting a configuration of storing and repeating a coded signal that is a compressed signal, a coded signal decoding in which errors are less noticeable with a small memory amount Device can be realized.

[0041]

As described above, in the coded signal decoding apparatus of the present invention, when the synchronization cannot be extracted by the synchronization detecting section, when there is an error in the bit allocation or scale factor, or when the sample error counting section detects that the frame If it is determined that there are more than a certain number of errors in the sample data, many correct errors will occur in the sample data in the coded signal by repeating the immediately preceding correct coded signal stored by the frame repeat memory in frame units. Even if there is, it is possible to output a band-divided signal in which noise is less noticeable with a small amount of memory used.

Further, the coded signal decoding device of the present invention is
If there is an error in the scale factor, the scale factor interpolating unit replaces the scale factor in error with the value obtained by interpolating the scale factor value of the immediately preceding correct frame, so that there is an error in the scale factor in the encoded signal. Is replaced by a scale factor value close to the original signal, and a band-divided signal in which noise is inconspicuous can be output.

The coded signal decoding device of the present invention is
By checking the prohibition pattern, which is a prohibition pattern of bit allocation and scale factor, and if it is a prohibition pattern, the same interpolation as the error caused by the uncorrectable error is performed, and the pseudo lock of the synchronization detection unit and the demodulation unit Even if erroneous correction or the like occurs, appropriate interpolation processing can be performed, and a band-divided signal with no noticeable noise can be output.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a coded signal decoding device according to a first embodiment of the present invention.

FIG. 2 is a timing chart for explaining the operation of the coded signal decoding apparatus according to the first embodiment.

FIG. 3 is a block diagram showing the configuration of a coded signal decoding device according to a second embodiment of the present invention.

FIG. 4 is a timing chart for explaining the operation of the coded signal decoding device according to the second embodiment.

FIG. 5 is a block diagram showing a configuration of an encoded signal decoding device according to a third embodiment of the present invention.

FIG. 6 is a timing chart for explaining the operation of the coded signal decoding device according to the third embodiment.

FIG. 7 is a block diagram showing the configuration of a conventional recording / reproducing apparatus using high efficiency encoding.

FIG. 8 is a block diagram showing a configuration of a conventional coded signal decoding device.

FIG. 9 is an explanatory diagram showing an example of a frame structure of a conventional encoded signal.

FIG. 10 is a timing chart for explaining problems in the operation of the conventional coded signal decoding device.

[Explanation of symbols]

 1 synchronization detection unit 2 bit allocation error detection unit 3 scale factor error detection unit 4 sample error count unit 5 repeat control unit 6 frame repeat memory 7 demultiplexer 8 dequantization unit 9 denormalization unit 10 scale factor interpolation unit 11 bit allocation Prohibited pattern detector 12 Scale factor prohibited pattern detector

Claims (3)

[Claims] 1. A coded signal decoding device used for decoding a coded signal obtained by dividing a signal such as voice into a plurality of frequency bands and compression-coding in frame units. The coded signal obtained by performing error correction on the signal of No. 1 and the uncorrectable signal indicating the uncorrectability are input, the synchronization pattern in the coded signal is extracted, and the synchronization signal and the synchronization cannot be detected. A synchronization detecting means for outputting a synchronization error signal; and inputting the synchronization signal and the uncorrectable signal, wherein the bit allocation portion in the encoded signal contains an uncorrectable error on the basis of the synchronization signal. A bit allocation error detecting means for outputting a bit allocation error signal indicating that the synchronization signal and the uncorrectable signal are input, and the encoded signal is based on the synchronization signal. Scale factor error detecting means for outputting a scale factor error signal indicating that the scale factor part in the signal contains an uncorrectable error, and inputting the synchronizing signal and the uncorrectable signal, with the synchronizing signal as a reference Sample error count means for counting the number of uncorrectable data in the sample data portion of the encoded signal and outputting a sample error signal when there is a fixed number or more of uncorrectable data in one frame; And the bit allocation error signal, the scale factor error signal, and the sample error signal are input, and when any one or more of these signals indicate an error, one or more frame repeats or Repeat control that outputs a repeat control signal to instruct mute A frame repeat memory means for inputting the repeat control signal and the encoded signal, and outputting an interpolated encoded signal obtained by performing frame repeat or mute on the encoded signal in accordance with the repeat control signal. And, inputting the synchronization signal and the interpolation coded signal, separating the interpolation coded signal based on the synchronization signal, and bit allocation indicating bit allocation of sample data, and sample data of each frequency band. Demultiplexing means for outputting a scale factor indicating a level and sample data, inputting the sample data and the bit allocation, performing inverse quantization according to the bit allocation, and outputting an inverse quantized signal Quantization means, the dequantized signal and the scale factor Enter the data,
An encoded signal decoding device, comprising: denormalization means for denormalizing sample data of each frequency band at a level indicated by a scale factor of each band and outputting a band-divided signal. 2. A coded signal decoding device used for decoding a coded signal obtained by dividing a signal such as a voice into a plurality of frequency bands and compression-coding the data in frame units. The coded signal obtained by performing error correction on the signal of No. 1 and the uncorrectable signal indicating the uncorrectability are input, the synchronization pattern in the coded signal is extracted, and the synchronization signal and the synchronization cannot be detected. A synchronization detecting means for outputting a synchronization error signal; and inputting the synchronization signal and the uncorrectable signal, wherein the bit allocation portion in the encoded signal contains an uncorrectable error on the basis of the synchronization signal. A bit allocation error detecting means for outputting a bit allocation error signal indicating that the synchronization signal and the uncorrectable signal are input, and the encoded signal is based on the synchronization signal. Sample error count means for counting the number of uncorrectable data in the sample data portion of the signal and outputting a sample error signal when there is a fixed number or more of uncorrectable data in one frame; the synchronization error signal and the bit allocation; When an error signal and the sample error signal are input, and one or more of the signals indicate an error, a repeat control signal for instructing frame repeat or mute one or more times is input. Repeat control means for outputting, input the repeat control signal, the coded signal and the uncorrectable signal, through the coded signal and the uncorrectable signal according to the repeat control signal through or frame repeat in frame units or Muted interpolation coded signal and interpolation uncorrectable signal Frame repeat memory means for inputting, the synchronization signal, the interpolation coded signal, and the interpolation uncorrectable signal are input, and the interpolation coded signal is separated on the basis of the sync signal to perform bit allocation of sample data. Demultiplexing means for outputting the bit allocation indicating, the scale factor indicating the level of the sample data in each frequency band, the scale factor uncorrectable signal indicating that each scale factor includes an uncorrectable error, and the sample data An inverse quantization means for inputting the sample data and the bit allocation, performing inverse quantization according to the bit allocation, and outputting an inverse quantized signal; and inputting the scale factor and the scale factor uncorrectable signal However, if there is an error in the scale factor, an error A scale factor interpolating means for outputting an interpolated scale factor in which the value of the immediately preceding frame or the level of that value is attenuated, and the dequantized signal and the interpolated scale factor are input, and An encoded signal decoding device, comprising: denormalization of sample data at a level indicated by an interpolation scale factor of each band, and denormalization means for outputting a band-divided signal. 3. A coded signal decoding device used for decoding a coded signal obtained by dividing a signal such as voice into a plurality of frequency bands and compression-coding it in units of frames, which is provided from a transmission line or a recording medium. The coded signal obtained by performing error correction on the signal of No. 1 and the uncorrectable signal indicating the uncorrectability are input, the synchronization pattern in the coded signal is extracted, and the synchronization signal and the synchronization cannot be detected. A synchronization detection unit that outputs a synchronization error signal, and the synchronization signal, the encoded signal, and the uncorrectable signal are input, and the use of the synchronization signal as a reference is prohibited in a bit allocation portion in the encoded signal. A bit allocation prohibition pattern detecting means for outputting a bit allocation error signal when the pattern exists or an uncorrectable error is included; If the correct or uncorrectable signal is input, the number of uncorrectable data of the sample data portion in the encoded signal is counted with reference to the synchronizing signal, and if there is a fixed number or more of uncorrectable data in one frame Sample error A sample error counting means for outputting a signal, the synchronization error signal, the bit allocation error signal and the sample error signal are input, and it is indicated that any one or more of these signals indicates an error. Repeat control means for outputting a repeat control signal for instructing frame repeat or mute one or more times, the repeat control signal, the encoded signal, and the uncorrectable signal are input, and the repeat control signal is input in accordance with the repeat control signal. The encoded signal and the uncorrectable signal are passed through or frame repeats in frame units. Or frame repeat memory means for outputting a muted and interpolated coded signal and an interpolated and uncorrectable signal, and the sync signal, the interpolated and coded signal and the interpolated and uncorrectable signal are input, and the sync signal is used as a reference. Then, the interpolation coded signal is separated and bit allocation indicating the bit allocation of the sample data, a scale factor indicating the level of the sample data in each frequency band, and each scale factor including an uncorrectable error are shown. A scale factor uncorrectable signal, demultiplexing means for outputting sample data, the scale factor and the scale factor uncorrectable signal are input, and the scale factor is checked and the pattern is prohibited, or If the scale factor uncorrectable signal indicates an error Scale factor prohibition pattern detection means for outputting a digital factor error signal, the sample data and the bit allocation are input, inverse quantization is performed according to the bit allocation, and an inverse quantization means for outputting an inverse quantized signal, When the scale factor and the scale factor error signal are input and the scale factor error signal indicates an error, the value of the previous frame without error of the scale factor or the value obtained by attenuating the level from the value of the previous frame Scale factor interpolating means for outputting the interpolated scale factor replaced by, and inputting the dequantized signal and the interpolated scale factor, the sample data of each frequency band is inverse-normalized at the level indicated by the interpolated scale factor of each band. Output a band-split signal. Coded signal decoding apparatus characterized by having an inverse normalization means for.