JPH07221602A - Synthesizer receiver - Google Patents

Abstract

PURPOSE:To improve operability at the time of scanning reception. CONSTITUTION:This synthesizer receiver is provided with first up key and down key KUP and KDWN and second up key and down key K+ and K-. When the first up key KUP or down key KDWN is pushed, a frequency dividing rate N is changed by every prescribed value and a reception frequency f12 is raised or lowered by a frequency step equal to the frequency interval of broadcasting signals. When the second up key K+ or down key K-is pushed, the frequency dividing rate N is changed by every prescribed value and the reception frequency f12 is raised or lowered by the frequency step smaller than the frequency interval of the broadcasting signals.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synthesizer receiver.

[0002]

2. Description of the Related Art In a synthesizer type receiver,
By changing the frequency division ratio of the variable frequency divider circuit of the PLL,
Since the reception frequency is changed, the reception frequency changes stepwise. And, generally, the frequency interval of the broadcast wave signal of the medium wave broadcast is 9 kHz, and the frequency interval of the broadcast wave signal of the short wave broadcast is 5 kHz. Therefore, when the scan key is pressed in the synthesizer receiver, the reception frequency changes in steps of 9 kHz in the medium wave band and 5 in the short wave band.
It is designed to change in kHz steps.

Further, some high-end machines are provided with a rotary encoder having a dial knob so that the same dial operation as when a so-called variable condenser is used can be performed.

[0004]

As described above, in a synthesizer receiver, the reception frequency generally changes in steps of 9 kHz in the medium wave band and in steps of 5 kHz in the short wave band. For steps,
This is not possible even if one tries to fine-tune the reception frequency in order to reduce adjacent interference, especially in the short wave band.

Even if a rotary encoder is provided so that the reception frequency can be changed by a dial operation, the reception frequency changes stepwise. In this case, therefore, a changeover switch is additionally provided to respond to the dial operation. It is necessary to be able to change the frequency step.

That is, when the dial is turned, it usually changes in steps of 9 kHz in the medium wave band and 5 in the short wave band.
It changes in kHz steps, but when you switch the switch,
It is necessary to change in 1 kHz steps in both the medium wave band and the medium wave band. However, if the switch is operated in this way to change the frequency step, the usability becomes poor.

The present invention is intended to solve the above problems.

[0008]

Therefore, in the present invention, when the reference numerals of the respective parts correspond to the embodiments described later, the PLL 20 has a PLL 20, and the output signal S21 of the PLL 20 is provided.
Frequency conversion of the received signal S12 by
In a synthesizer type receiver in which the reception frequency f12 is changed by changing the frequency division ratio N of the variable frequency dividing circuit 22 in L20, the first up key and down key KUP, KDWN and the second up key are used. Keys and down keys K + and K- are provided, and when the first up key KUP or down key KDWN is pressed, the frequency division ratio N is changed by a predetermined value to change the reception frequency f12 to the frequency of the broadcast wave signal. Increase or decrease in frequency steps equal to the interval,
When the second up key K + or the down key K- is pressed, the frequency division ratio N is changed by a predetermined value and the reception frequency f is changed.
12 is raised or lowered in frequency steps smaller than the frequency interval of broadcast wave signals.

[0009]

The coarse tuning is performed by the first up key KUP and the down key KDWN, and the fine tuning is performed by the second up key K + and the down key K-.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT In the synthesizer receiver shown in FIG.
This is a case where the medium-wave broadcasting and the short-wave broadcasting can be received, the reception band of the medium-wave broadcasting is 531 kHz to 1620 kHz, and the reception band of the short-wave broadcasting is 1621 kHz to 30 MHz. Further, the frequency step is 9 kHz or 1 kHz during reception of medium-wave broadcasting, and 5 kHz or 1 kHz during reception of short-wave broadcasting.

In FIG. 1, reference numeral 10 denotes a receiving circuit, and a received signal from an antenna 11 is supplied to an electronic tuning type antenna tuning circuit 12 and a target frequency f is obtained.
Twelve AM broadcast wave signals S12 are taken out.

This signal S12 is the high frequency amplifier 1
3 to the mixer circuit 14 and VC
The frequency f21 from O21 is, for example, f21 = f12 + f14 [kHz] (1) f14 is an intermediate frequency, for example, an oscillation signal S21 of f14 = 450 kHz is taken out, and this signal S21 is fed to the mixer circuit 14 as a local oscillation signal. And the frequency of the signal S12 is converted into an intermediate frequency signal S14 (intermediate frequency f14).

Further, the intermediate frequency signal S14 is supplied to an AM detection circuit 17 through, for example, a ceramic filter 15 and an amplifier 16 which constitute an intermediate frequency filter to demodulate an audio signal, and this signal is supplied to a speaker 19 through an amplifier 18. To be done. Further, the detection circuit 51 is connected to the amplifier 16, and the reception detection signal S51 indicating whether or not the reception level of the reception signal S12 is equal to or higher than a specified value is taken out.

At this time, the VCO 21 has the circuit 2
The PLL 20 is configured with 2 to 25. That is, the signal S21 from the VCO 21 is supplied to the variable frequency dividing circuit 22 and divided into a frequency of 1 / N, and this frequency divided signal is supplied to the phase comparison circuit 23 and the oscillation circuit 24.
An oscillating signal having a reference frequency, for example, a frequency of 1 kHz is taken out from the signal source, the oscillating signal is supplied to the comparison circuit 23, and the comparison output is supplied to the VCO 21 as its control voltage through the low pass filter 25. Further, the output voltage of the filter 25 is supplied to the tuning circuit 12 as a tuning voltage.

Therefore, in the steady state, the frequency-divided signal from the frequency-dividing circuit 22 and the oscillation signal of the oscillation circuit 24 have the same frequency. Therefore, the frequency f21 of the oscillation signal S21 at this time is f21 = N × 1. [KHz] ... (2) and f12 = f21-f14 = N-450 [kHz] from the equations (1) and (2).

Therefore, if the frequency division ratio N is changed by "9" between 981 and 2070, the local oscillation frequency f21
However, since the frequency varies from 981 kHz to 2070 kHz at an interval of 9 kHz, the reception frequency f12 changes the frequency band of 531 kHz to 1620 kHz in steps of 9 kHz in accordance with the frequency division ratio N.

If the frequency division ratio N is changed by "5" between 2071 and 30450, the local oscillation frequency f21 becomes
Since the frequency changes from 2071 kHz to 30450 kHz at intervals of 5 kHz, the reception frequency f12 changes stepwise in 5 kHz steps in the frequency band of 1621 kHz to 30 MHz corresponding to the frequency division ratio N.

Further, if the frequency division ratio N is changed by "1" between 981 and 30450, similarly, the reception frequency f12 corresponds to the frequency band of 531 kHz to 30 MHz to the frequency division ratio N. It will change in steps of 1 kHz.

Further, 30 is a microcomputer for system control, 31 is its CPU, 32
Is a ROM in which various processing routines are written, 33
Is a work area RAM, 34 is a memory for storing various data, and these memories 32 to 34 are connected to the CPU 31 through a system bus 39.

In this case, the ROM 32 is provided with a scan routine 100 and a tuning routine 200 shown in FIGS. 2 to 4, for example, as part of the processing routine. Also,
The memory 34 is a ROM capable of electrically erasing and writing data, or, although not shown, a RAM backed up by a battery, that is, the memory 34 is a non-volatile memory and has a power source. Even when it is turned off, the written data can be retained. It should be noted that the frequency division ratio N supplied to the variable frequency dividing circuit 22 is held in the memory 34 together with various data as data indicating the current reception frequency f12.

Further, 41 is an output port, 42 is an input port, 43 is a key interface circuit, and these circuits 41 to 43 are connected to the CPU 31 through the system bus 39. Then, the port 41 is connected to the frequency dividing circuit 22, and the frequency dividing ratio N from the CPU 31 is set in the frequency dividing circuit 22 through the port 41. Further, the detection signal S51 from the detection circuit 51 is taken into the CPU 31 through the port 42.

Further, various operation keys KTS to K9 are connected to the interface circuit 43. In this case, each of the keys KTS to K9 is composed of a non-lock type push switch. Of the keys KTS to K9, the up keys KUP, K + and the down keys KDWN, K-
Are arranged close to each other, as shown in FIG. 5, for example.

Further, reference numeral 44 denotes a clock circuit for clocking, which is also connected to the CPU 31 through the system bus 39. Reference numeral 52 denotes a display for digitally displaying the reception frequency, time, etc., which is an LCD in this example. And this LCD 52 is
System bus 3 through display controller 45
9, and a memory 46 for buffering display data is connected to the controller 45.

In such a configuration, each processing or operation is performed as follows, for example.

<Display of time and reception frequency> Clock circuit 4
4, the CPU 31 is interrupted, for example, every one minute. When this interrupt is applied, the CPU 31 causes the clock circuit 44 to change the time data measured by the clock circuit 44.
Is read out, and the read-out time data is converted into display data and then supplied to the controller 45 and written in the memory 46. Further, even when the reception frequency f12 is changed, the data indicating the reception frequency f12 is converted into display data and then supplied to the controller 45 and written in the memory 46.

The display data written in the memory 46 is repeatedly read by the controller 45 at a predetermined cycle and supplied to the LCD 52, and the LCD 52 displays the time corresponding to the display data written in the memory 46. And received frequency are displayed digitally.

<Rough tuning of medium-wave broadcasting and high-speed scan reception> This is an up key KUP or a down key KDWN
By pressing, the reception frequency f12 is a mode in which the broadcast wave band of medium-wave broadcasting is changed in 9 kHz steps. In this example, when the broadcast can be received, the scanning is stopped there.

That is, when the key KUP or KDWN is pressed, the processing of the CPU 31 is performed in step 10 of the routine 100.
Starting from 1, next, in step 102, by checking the frequency division ratio N held in the memory 34, it is checked whether the current reception frequency f12 is the medium wave band or the short wave band. In the present case, the processing is from step 102 to step 103 because it is in the medium wave band.
In step 103, it is checked whether the frequency division ratio N held in the memory 34 is an integral multiple of 9, and if it is an integral multiple, the process proceeds to step 103.
To step 111.

However, when it is not an integral multiple, the process proceeds from step 103 to step 104, and in this step 104, the frequency division ratio N of the memory 34 is set to an integral multiple of 9 which is the closest to the original value. However, in this case, when the up key KUP is pressed and the routine 100 is executed, it is an integer multiple of 9 that is smaller than the original frequency division ratio N and is closest to the original frequency division ratio N. When the down key KDWN is pressed and the routine 100 is being executed, it is set to an integral multiple of 9 which is larger than the original frequency division ratio N and which is the closest to the original frequency division ratio N. Then, the process proceeds to step 111.

Then, in step 111, as in step 102, it is checked whether the current reception frequency f12 is the medium wave band or the short wave band, and in this case, it is the medium wave band, so the process is step 111. From step 112, the frequency division ratio N of the memory 34 is incremented or decremented by "9" in correspondence with the key KUP or KDWN in step 112.

Subsequently, the process proceeds from step 112 to step 114, in which the frequency division ratio N of the memory 34 (in this case, updated by step 112) is calculated by the PLL 20 through the port 41. The circuit 22 is set. Therefore, the reception frequency f
12 is 9kHz corresponding to the pressed key KUP or KDWN
Go up or down by z.

Next, the process proceeds to step 115, where it is checked whether the key KUP or KDWN is still pressed. If not, the process proceeds from step 115 to step 131.
Proceed to.

Therefore, if the key KUP or KDWN is pressed and released immediately, the step 112,
Since 114 is executed, the reception frequency f12 increases or decreases by 9 kHz in response to the pressed key KUP or KDWN. That is, each time the key KUP or KDWN is pressed, the reception frequency f12 rises or falls in frequency steps equal to the frequency interval of medium-wave broadcasting.

However, if the key KUP or KDWN is kept pressed, this is detected in step 115,
The process proceeds from step 115 to step 116, where it is checked whether a predetermined time, for example, 2 seconds has elapsed since the process of the routine 100 was started. That is, key KUP or KDW
It is checked whether 2 seconds have elapsed since N was pressed. Then, when 2 seconds have not elapsed, the process returns from step 116 to step 111.

Therefore, if the key KUP or KDWN is kept pressed, steps 111 to 116 are repeated, so that the reception frequency f12 continuously rises in 9 kHz steps or corresponds to the pressed key KUP or KDWN. Going down.

Then, when the key KUP or KDWN is continuously pressed for 2 seconds, this is detected in step 116, and the process proceeds from step 116 to step 121. In step 121, the current reception frequency is the same as step 102. It is checked whether f12 is the medium wave band or the short wave band, and in this case, it is the medium wave band.
The process proceeds from step 121 to step 122, where the frequency division ratio N of the memory 34 is incremented or decremented by "9" corresponding to the key KUP or KDWN.

Subsequently, the process proceeds from step 122 to step 124, in which the frequency division ratio N of the memory 34 (in this case, updated by step 122) is applied to the frequency division circuit through the port 41. It is set to 22. Therefore, the reception frequency f12 rises or falls by 9 kHz corresponding to the pressed key KUP or KDWN.

Next, the process proceeds to step 125. In step 125, the detection signal S51 is checked to see if the broadcast is received. If the broadcast is not received, the process proceeds to step 1
It returns from 25 to step 121. Also, step 125
When the broadcast is received, the process proceeds from step 125 to step 131, and this routine 1
Ends 00.

Therefore, the key KUP or KDWN is set to 2
If you keep pressing for more than a second,
Steps 121, 122, 12 until the broadcast is received
4 and 125 are repeated, and the reception frequency f12 rises or falls in steps of 9 kHz corresponding to the pressed key KUP or KDWN. When the broadcast is received, the reception state of the broadcast will be continued thereafter.

In this way, when the key KUP or KDWN is continuously pressed, the reception frequency f12 in the medium wave band is increased or decreased by 9 kHz corresponding to the pressed key KUP or KDWN. That is, the reception frequency f12 changes in frequency steps equal to the frequency interval of medium-wave broadcasting.

<Coarse tuning and high-speed scan reception of short-wave broadcasting> In this mode, the key KUP or KDWN is pressed to change the reception frequency f12 in the broadcasting wave band of short-wave broadcasting in 5 kHz steps. In this example, when the broadcast can be received, the scanning is stopped there.

That is, the up key KUP or the down K
When DWN is pressed, as described above, the processing of the CPU 31 starts from step 101 of the routine 100, and in step 102, it is checked whether the current reception frequency f12 is the medium wave band or the short wave band. In this case, the processing is from step 102 to step 1 because it is in the shortwave band.
05, the memory 34
It is checked whether or not the division ratio N held in is an integer multiple of 5, and when it is an integer multiple, the process proceeds to step 1.
The routine proceeds from 05 to step 111.

However, when it is not an integral multiple, the process proceeds from step 105 to step 106, and in this step 106, the frequency division ratio N of the memory 34 is set to an integer multiple of 5, which is the closest to the original value. However, in this case, when the up key KUP is pressed and the routine 100 is executed, it is an integer multiple of 5 that is smaller than the original frequency division ratio N and is closest to the original frequency division ratio N. When the down key KDWN is pressed and the routine 100 is executed, it is set to an integer multiple of 5 which is larger than the original frequency division ratio N and which is the closest to the original frequency division ratio N. Then, the process proceeds to step 111.

Then, in step 111, as in step 102, it is checked whether the current reception frequency f12 is the medium wave band or the short wave band. In this case, the process is performed from step 111 since it is the short wave band. In step 113, the frequency division ratio N of the memory 34 is incremented or decremented by "5" corresponding to the key KUP or KDWN in step 113, and thereafter,
The process proceeds from step 113 to step 114.

Therefore, as in the case of receiving the medium-wave broadcasting, when the key KUP or KDWN is pressed and immediately released, steps 113 and 114 are executed each time the key is pressed, so that the reception frequency f12 is the same as the pressed key. KUP or KDWN
Corresponding to, increase or decrease by 5 kHz. That is,
Each time the key KUP or KDWN is pressed, the reception frequency f12
Rises or falls in frequency steps equal to the frequency interval of shortwave broadcasting.

Further, if the key KUP or KDWN is kept pressed for 2 seconds or more, the process proceeds from step 116 to step 121. At this step 121, the current reception frequency f12 is the medium wave band or the short wave band. Is checked, and in this case, it is in the shortwave band, so the process proceeds from step 121 to step 123, and this step 12
In 3, the frequency division ratio N of the memory 34 is incremented or decremented by "5" corresponding to the key KUP or KDWN.

Then, the process proceeds to step 124, and steps 121, 123 to 125 are executed until the broadcast is received even if the key KUP or KDWN is released.
The reception frequency f12 rises or falls in steps of 5 kHz corresponding to the pressed key KUP or KDWN. And when the broadcast is received,
The reception status of the broadcast will be continued.

In this way, when the key KUP or KDWN is continuously pressed, the reception frequency f12 in the short wave band is increased or decreased by 5 kHz in correspondence with the pressed key KUP or KDWN. That is, the reception frequency f12 changes in frequency steps equal to the frequency interval of shortwave broadcasting.

<Fine tuning of medium-wave broadcasting and short-wave broadcasting> In this mode, each time the key K + or K- is pressed, the reception frequency f12 is changed in 1 kHz steps.

That is, when the up key K + or the down key K- is pressed, the processing of the CPU 31 is executed by the routine 200.
Start from step 201, then step 202
At, the frequency division ratio N held in the memory 34 is incremented or decremented by "1" corresponding to the key K + or K-.

Subsequently, the process proceeds from step 202 to step 203, in which the frequency division ratio N of the memory 34 (in this case, updated by step 202) is divided by the PLL 20 through the port 41. The circuit 22 is set. Therefore, the reception frequency f
12 goes up or down by 1 kHz in response to a pressed key K + or K-. Then, the process proceeds to step 204, and the routine 200 ends.

Thus, when the key K + or K- is pressed,
Since the routine 200 is executed each time the key is pressed, the reception frequency f12 is increased or decreased by 1 kHz corresponding to the pressed key K + or K-. That is, each time the key K + or K- is pressed, the reception frequency f12 rises or falls in frequency steps smaller than the frequency interval of medium-wave broadcasting or short-wave broadcasting.

<Direct tuning> This is the reception frequency f
This is a channel selection performed by directly designating a numeral indicating 12 with the numeral keys K0 to K9 of the operation keys KTS to K9.

That is, in this case, the operation keys KTS ...
Of K9, the direct key KDRCT is pressed, then the number keys K0 to K9 are pressed in accordance with the numbers indicating the reception frequency f12, and finally the execution key KEXE is pressed. Then, the frequency division ratio N corresponding to the received frequency f12 of the numeral input by the number keys K0 to K9 is calculated, and the frequency division ratio N is held in the memory 34 and set in the frequency dividing circuit 22. Therefore, the frequency f12 of the number input by the number keys K0 to K9 is selected.

<Preset of reception frequency f12>
This is a case where an arbitrary reception frequency f12 is preset in the numeric keys K0 to K9.

That is, in this case, the channel selection is performed by one of the above-described methods, and thereafter, while pressing the registration key KREG among the operation keys KTS to K9, the numeric keys K0 to K9 are selected.
Press any one of the numeric keys Ki (i = 0-9). Then, among the registered areas A0 to A9 prepared in the memory 34, the frequency division ratio N of the frequency f12 being received at the area Ai corresponding to the pressed numeric key Ki is data indicating the reception frequency f12. Written as

Therefore, it is possible to preset an arbitrary reception frequency f12 to the numeric keys K0 to K9.

<Preset tuning> This is the numeric key K0
This is a case where the frequency f12 preset to K9 is selected.

That is, in this case, the numeric keys K0 ...
Press any key Ki out of K9. Then, the memory 34
Of the registered areas A0 to A9, the pressed numeric key K
The frequency division ratio N of the area Ai corresponding to i is read, and the read frequency division ratio N is set in the frequency dividing circuit 22. Therefore, when the number key Ki is pressed, the frequency f12 preset in the pressed number key Ki is selected.

<Correction of “hour” of time> This correction is performed by pressing the up key KUP or the down key KDWN while pressing the time set key KTS of the operation keys KTS to K9.

That is, when the key KUP or KDWN is pressed while pressing the time set key KTS, the time measured by the clock circuit 44 is incremented or decremented by one hour corresponding to the key KUP or KDWN. Then, after that, the time data measured by the clock circuit 44 is converted into display data and then supplied to the memory 46.

Therefore, by pressing the key KUP or KDWN while pressing the time setting key KTS, it is possible to correct the "hour" order of the time measured by the clock circuit 44 in units of one hour.

<Correction of "minute" of time> This correction is performed by pressing the up key K + or the down key K- while pressing the time set key KTS among the operation keys KTS to K9.

That is, when the key K + or K- is pressed while pressing the time set key KTS, the time measured by the clock circuit 44 is incremented or decremented by 1 minute corresponding to the key K + or K-. And then
The time data measured by the clock circuit 44 is converted into display data and then supplied to the memory 46.

Therefore, by pressing the key K + or K- while pressing the time setting key KTS, it is possible to correct the order of "minute" of the time measured by the clock circuit 44 in units of 1 minute.

<Timer Function (Standby Reception Function)> This is a case where the receiving circuit 10 is operated and the radio is rang when the preset time comes.
The setting of the time to play the radio is also similar to the above-mentioned <correction of “hour” of time> and “correction of“ minute ”of time”.
"Hour" and "Minute" by keys KUP, KDWN and K +, K-
Can be set individually.

<Others> In the above, the keys K +, K-
It is assumed that the reception frequency f12 changes in 1 kHz steps each time is pressed, but like keys KUP and KDWN, keys K + and K-
For example, if you keep pressing for 2 seconds or more, even if you stop pressing after that, the reception frequency f12 will be 1k until the broadcast is received.
It can also be changed in Hz steps.

[0068]

According to the present invention, the key KUP or K
When DWN is pressed, the reception frequency f12 can be raised or lowered in frequency steps equal to the frequency interval of the broadcast wave signal, and the target broadcast station can be selected easily and quickly.

When the key K + or K- is pressed, the reception frequency f12 can be raised or lowered in a frequency step smaller than the frequency interval of the broadcast wave signal. Therefore, in order to reduce adjacent interference. This can be easily done when fine tuning the reception frequency. Moreover, in that case, the switch operation for switching the frequency step is not necessary, and the operation is simple.

Further, the time of the clock circuit 44 can be corrected easily and quickly.

[Brief description of drawings]

FIG. 1 is a system diagram showing an example of the present invention.

FIG. 2 is a flowchart showing a part of an example of a first channel selection routine.

FIG. 3 is a flowchart showing an example of a continuation of a first channel selection routine.

FIG. 4 is a flowchart showing an example of a second tuning routine.

FIG. 5 is a diagram showing an arrangement example of operation keys.

[Explanation of symbols]

 10 reception circuit 12 antenna tuning circuit 14 mixer circuit 17 AM detection circuit 20 PLL 21 VCO 22 variable frequency dividing circuit 30 microcomputer 31 CPU 32 ROM 34 memory 43 key interface circuit 44 clock circuit 45 display controller 52 LCD 100 first tuning Routine 200 Second tuning routine KTS to K9 Operation keys

Claims (2)

[Claims] 1. A synthesizer having a PLL, wherein a frequency of a received signal is converted by an output signal of the PLL, and a received frequency is changed by changing a frequency division ratio of a variable frequency dividing circuit in the PLL. In the receiver of the system, a first up key and a down key and a second up key and a down key are provided, and when the first up key or the down key is pressed, the frequency division ratio is set to a predetermined value. The frequency division ratio is changed by a predetermined value to increase or decrease the reception frequency at a frequency step equal to the frequency interval of the broadcast wave signal. When the second up key or the down key is pressed, the division ratio is changed by a predetermined value. Synthesizer reception in which the above reception frequency is increased or decreased in frequency steps smaller than the frequency interval of broadcast wave signals. Machine. 2. The synthesizer receiver according to claim 1, further comprising a clock circuit, wherein when the time of the clock circuit is set, when the first up key or the down key is pressed, the clock circuit is set. When the second up key or the down key is pressed, the time measured by the clock circuit is incremented or decremented by 1 minute. Made synthesizer receiver.