JPS5912831Y2 - Digital tuner with clock - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a digital tuner with a clock that can be used as an operation switch for adjusting hours and minutes and switching the tuner between Local and DX.

Recently, digital tuners have appeared that use a microcomputer in the control section and select channels digitally.

Such digital tuners often also have a clock function.

However, especially in car radios, the area of the front panel is small, and the number of operation switches that can be mounted is limited.

Taking these points into consideration, the present invention relates to a digital tuner with a clock that can serve as both a tuner operation switch and a watch operation switch.

In the figure, reference numeral 1 denotes a control unit consisting of a microcomputer, and a first state in which the reception frequency of the tuner 3 at that time is displayed on the display 2 and a second state in which the time is displayed on the display 2 are controlled by the first switch 4. It can be switched with .

When the second switch 5 is turned on when the control section 1 is in the first state, the counter of the control section 1 counts, controls the PLL section 6, and tunes the tuner section 3.

7 is a third switch for switching between DX and Local of the tuner section 3 which also serves as minute adjustment; 8 is a fourth switch that also serves as hour adjustment and selects channel selection sensitivity; and 9 is a fifth switch for setting the hour and minute adjustment state or the memorizable state. The switch 10 is a first flip-flop that is inverted by the third switch 7, and its output controls the transistor 11 to set the tuner 3 to Local or D
Put it in X state.

A second flip-flop 12 is inverted by a fourth switch 8, and by turning on and off a transistor 13, the amplification degree of the sensor amplifier 14 is increased or decreased, thereby changing the tuning sensitivity.

15 is a control circuit consisting of transistors 16, 17, 18, 19, 20, transistors 16, 17, 18 are the fifth
When the switch 9 is turned on, the transistor 19 is turned on, and the transistor 20 is turned on by the third switch 7.
is turned on by the fourth switch 8.

21 is an intermediate frequency amplifier, 22 is an audio amplifier, and 23 is a speaker, and these and the tuner constitute a radio section.

Next, the operation of the present invention will be explained.

(1) Reception frequency display Turn on the first switch 4 to select the reception signal.

Then, the control unit 1 enters a state in which it can select a channel, and the received frequency signal at that time is displayed on the display 2.

When the second switch 5 is turned on in this state, the frequency division ratio of the programmable counter of the control section 1 changes, and the control voltage applied to the tuner 3 is changed.

As a result, the control voltage applied to the tuner 3 is changed, and the antenna tuning frequency and local oscillation frequency of the tuner 3 are also changed to tune into a different signal from that which has been received up to now.

When you want to preset this received signal, the 5th
Turn on switch 9.

Then, the transistor 17 is turned on and a signal is applied to the ME terminal to put the control section 1 into a memorizable state.

Therefore, when the preset button is turned on, the signal is preset.

Also, when the third switch 7 is turned on while the control unit 1 is in the state where it is possible to select a channel, the first flip-flop 10 is inverted, and if the transistor 11 had been on until now, it is turned off, and the tuner is now in the local state. If so, it is set to the DX state, and conversely, if it is the DX state, it is set to the Local state.

When the fourth switch 8 is turned on, the second flip-flop 12 is inverted, the transistor 13 is put into a different state, and the amplification degree of the sensor amplifier 14 is made larger or smaller than before.

If the amplification degree of the sensor amplifier 14 is high, even when a signal with a low level and poor S/N ratio is received, the signal from the intermediate frequency amplifier 21 will be amplified by the sensor amplifier 14 and a search stop signal will be generated, so press the search button. When turned on and auto search is performed, the search will stop at all received signals.

On the other hand, if the amplification degree of the sensor amplifier 14 is small, the search will not be stopped even if a signal with a low level is received, and the search will not be stopped until a signal of a certain level or higher is received.

(2) Time display If you want to know the time, turn off the first switch 4.

Then, the time and minute marked on the control section 1 will appear on the display 2.
will be displayed.

If the user wishes to adjust the hours and minutes at this time, the fifth switch 9 is turned on.

Then, the transistor 18 is enabled to turn on, so
If the third switch 7 is turned on, the transistor 19 is turned on and a signal is applied to the MIN terminal, so that the control section 1 is adjusted.

When the fourth switch 8 is turned on, the transistor 20 is turned on and a signal is applied to the HR terminal to adjust the time.

At this time, when the fifth switch 9 is turned on, the transistor 16 is turned on, and the JK terminals of the first and second flip-flops 10 and 12 are grounded.
, the second flip-flop 10.12 becomes inoperable, so even if the third switch 7 or the fourth switch 8 is turned on, the first and second flip-flops 10.12 are not inverted.

Furthermore, even if the transistor 17 is turned on at this time and a signal is applied to the ME terminal, the control section 1 is not affected at all.

As described above, the digital tuner with a clock according to the present invention puts the control section into a memory enabled state when the control section is in the first state where the received frequency is displayed, and operates the control circuit when the control section is in the second state where the control section displays the time. Since a control switch is provided to enable the memory circuit and to disable the memory circuit, when the first switch is in the first state, the tuner is in the Local state or the D state.
It is possible to switch at least one of the operating states of the radio section, such as switching to the It can be used to switch between both tasks.

[Brief explanation of the drawing]

The figure is a circuit diagram of a digital tuner with a clock according to the present invention. DESCRIPTION OF SYMBOLS 1... Control part, 2... Display device, 7... Third switch, 8... Fourth switch, 9... Fifth switch, 10... First flip-flop, 12... Second flip-flop, 15...control circuit.

Claims (1)

[Scope of utility model registration request] A changeover switch 4 for switching the control unit 1 between a first state in which the reception frequency is displayed and a second state in which the time is displayed.
and, at least one of the following: maintain the tuner 3 of the radio section in the Local state or DX state, or maintain the amplification degree of the sensor amplifier 14 that amplifies the signal from the intermediate frequency amplifier in a large or small state. memory circuits 10 and 12 for maintaining the operating state; a control circuit 15 for selectively supplying signals to the control section 1; A control switch 9 that enables the control circuit 15 and disables the memory circuit 10. a control circuit that switches at least one of the operating states of the radio unit, either switching to a local state or a DX state, or switching the amplification degree of the sensor amplifier 14 from large to small, and being in the operable state when in the second state; 15. A digital tuner with a clock, characterized in that it has an operation switching/hour/minute adjustment switch 7.8 for controlling the time and minute adjustment.