JPH07221201A - Manufacture of semiconductor device and equipment of manufacturing semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the deterioration of leak current characteristics of a capacitance element which is to be caused by a heat treatment process after the capacitance element, applying a tantalum oxide film to a dielectric film is formed. CONSTITUTION:After a contact hole 28 is formed in interlayer insulating films 17, 18, a capacitor lower electrode 1 is formed [Figure (a)]. A silicon nitride film 2a is formed on the surface of a lower electrode by heat treatment in a nitriding atmosphere. [Figure (b)]. A substrate is set in a CVD equipment, and a tantalum oxide film 2 is formed by supplying organic tantalum material like pentaethoxy tantalum, oxidizing gas, and water content to a reaction chamber [Figure (c)]. The tantalum oxide film 2 is made dense by a plasma treatment and/or a heat treatment in an oxidizing atmosphere. A capacitor upper electrode 3 is formed by using a TiN film or the like [Figure (d)].

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device and a device for manufacturing a semiconductor device, and more particularly to a UL such as a dynamic random access memory (DRAM).
The present invention relates to a manufacturing method for forming a capacitive element section used in an SI device and a manufacturing apparatus for manufacturing the same.

[0002]

2. Description of the Related Art ULSI after 256 Mbit DRAM
In the capacitive element portion of the memory device, adoption of a high dielectric constant capacitive insulating film that can increase the capacitance value per unit area is being studied. Among the high dielectric constant capacity insulating films under study, the tantalum oxide film by chemical vapor deposition (CVD) has a large relative dielectric constant ε _r of 25 to 30 and has excellent step coverage characteristics. However, much research has been done because the film forming method is easier than other high dielectric constant capacity insulating films.

FIG. 6 shows a process sectional view of a conventional process for forming a capacitive element portion using a tantalum oxide film. First and second interlayer insulating films 17 and 18 are formed on a silicon substrate (not shown), contact holes 28 reaching the diffusion layer on the surface of the semiconductor substrate are opened in these films, and then polysilicon is chemically vapor-deposited. Then, phosphorus (P) is thermally diffused, and then patterned by an ordinary lithography technique to form the capacitor lower electrode 1 [FIG. 6 (a)].

On this capacitor lower electrode 1, a tantalum oxide film 2'is formed by a low pressure vapor phase epitaxy method using ethoxy tantalum [Ta (OC ₂ H ₅ ) ₅ ] gas as a main material, and the leak current of the tantalum oxide film is increased. In order to improve the characteristics, 600 ~ in oxygen atmosphere
A high temperature heat treatment at 1000 ° C. is performed [FIG. 6 (b)]. Subsequently, the capacitor upper electrode 3 is formed so as to cover the capacitor lower electrode 1 [FIG. 6 (c)]. A titanium nitride (TiN) film is widely used as the material of the capacitor upper electrode 3. Through the above forming steps, the capacitive element portion using the tantalum oxide film as the dielectric film is completed.

[0005]

The capacitive element portion formed by the above-described conventional manufacturing method has the following problems. In the manufacturing process of a ULSI memory device, high temperature heat treatment such as activation annealing after ion implantation and reflow of an interlayer insulating film is introduced after the formation of the capacitive element portion. In the capacitive element portion according to the conventional technique, this heat treatment deteriorates the leakage current characteristic. FIG. 7 shows the leakage current characteristics of the capacitor element portion according to the prior art after heat treatment for 1 hour in a nitrogen atmosphere. As shown in FIG. 7, the deterioration of the leak current due to the high-temperature heat treatment at 600 ° C. or higher is remarkable, for example, 80
In the case where the heat treatment was performed at 0 ° C., the leakage current density was 10 ^{−8 under the} voltage application condition that the positive electrode on the capacitor upper electrode 3 side was positive.
The applied voltage at A / cm ² is 0.8 V, which means that it does not have the characteristics that can be sufficiently applied to an actual device. It is considered that this deterioration is due to the mutual reaction between the tantalum oxide film and the titanium nitride film which is the upper electrode due to the high temperature heat treatment.

[0006]

In order to solve the above problems, according to the present invention, a step of forming a lower electrode made of polysilicon on a semiconductor substrate, and a chemical vapor deposition in a mixed gas containing water. There is provided a method for manufacturing a semiconductor device, comprising: a step of growing a tantalum oxide film by a method to form a dielectric film on the lower electrode; and a step of forming an upper electrode on the dielectric film. And preferably,
After forming the dielectric film (tantalum oxide film), plasma treatment in an oxidizing atmosphere and / or heat treatment in an oxidizing atmosphere is performed.

[0007]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a sectional view showing a part of a DRAM to which the first and second embodiments of the present invention are applied. An n well 12 is formed in the surface region of the p-type silicon substrate 11,
A first p-well 13 is formed in the n-well 12, and a second p-well 14 is formed in the other surface region of the p-type silicon substrate 11, so that the first p-well 13 and the second p-well 13 are formed. The well 14 is separated from each other by an n ⁺ type isolation region 15 formed in the n well 12, and these regions form a silicon substrate.

Each element is formed in the activation region, which is insulated and isolated by the field oxide film 16 on the main surface of the silicon substrate. Although transistors of a large number of memory cells are formed in the first p-well 13, only a pair of memory cells are shown in FIG. That is, n-type regions 21a and 21b to be the source and drain regions of the respective transistors 20 forming a pair of memory cells are formed, and a gate composed of polysilicon 23 and silicide 24 is formed on a silicon substrate with a gate insulating film 22 interposed therebetween. The electrode 25 is formed.

The whole of these transistors are covered with a first interlayer insulating film 17, and the first interlayer insulating film 17 is used.
A bit line 26 connected to the n-type region 21a, which is a source / drain region common to the transistors of the pair of memory cells, is formed above the contact hole 27 formed in the first interlayer insulating film 17. Has been done. A second interlayer insulating film 18 is formed so as to cover this bit line, and a capacitor element portion 10 according to the present invention, which is surrounded by a dotted line, is formed thereon.

That is, this stack type capacitive element is
The capacitor lower electrode 1, a silicon nitride film (not shown) as a capacitor dielectric film, a tantalum oxide film 2 and a capacitor upper electrode 3 are formed. The pair of capacitor lower electrodes 1 includes a first and a second interlayer insulating film 17, A contact hole 28 formed in the transistor 18 connects to the other source / drain region n-type region 21b of each transistor. Further, the capacitive upper electrode 3 is continuously formed in common to the capacitive elements of the pair of memory cells, and the extended portion thereof extends on the second interlayer insulating film 18. Capacitance element part 1
0 is covered with a third interlayer insulating film 19, and the lead-out portion 3a of the capacitor upper electrode is made of Al which is held at a fixed potential such as a ground potential through a through hole 29a provided in the third interlayer insulating film 19. It is electrically connected to the wiring 31.

The lower portion of the Al wiring 31, the inner wall of the through hole 29a and the lead-out portion 3 for the capacitor upper electrode 3 are formed.
A titanium nitride film 32 is formed on the bottom surface in contact with a, and a tungsten plug 33 is formed in the through hole 29a. On the other hand, an n-type region 21 serving as a source / drain region of a transistor 30 forming a peripheral circuit of the memory device is formed in the surface region of the second p-well 14, and the polysilicon 2 is formed on the gate insulating film 22.
3, a gate electrode 25 made of silicide 24 is formed. Then, the first, second, and third interlayer insulating films 1 are formed in the n-type region 21 that constitutes one of the source and drain regions.
An Al wiring 31 is connected via a titanium nitride film 32, a tungsten plug 33, and a titanium nitride film 32 through a contact hole 29 provided through 7, 18, and 19. Similarly, the gate electrodes 25 of the other transistors in the peripheral circuit are connected to the Al wiring 31 via the through holes.

FIG. 2 is a process cross-sectional view showing the manufacturing method of the first embodiment of the present invention, which corresponds to the portion of the capacitive element portion 10 on one side surrounded by the dotted line in FIG. Out.
First, polysilicon to be the capacitor lower electrode 1 is deposited by a chemical vapor deposition method, phosphorus doping is performed, and then patterning is performed by a normal photolithography / etching technique to form the capacitor lower electrode 1 [FIG. ]. The polysilicon in the contact hole 28 may be formed at the same time as the chemical vapor deposition or may be filled in the previous step.

Then, after removing the natural oxide film on the surface of the polysilicon which is the lower capacitor electrode 1 with diluted hydrofluoric acid, rapid thermal nitriding treatment using lamp annealing is performed to nitride the polysilicon surface. A silicon nitride film (SiN _x ) 2a is formed on the surface thereof (FIG. 2 (b)). As the rapid thermal nitriding treatment, it is suitable to perform heat treatment at 800 to 1100 ° C. in an ammonia (NH ₃ ) gas atmosphere. Further, anhydrous hydrofluoric acid can be used instead of diluted hydrofluoric acid.

Next, a tantalum oxide film 2 is deposited on this capacitor lower electrode 2 by chemical vapor deposition [FIG.
(C)]. A vapor phase growth apparatus as shown in FIG. 3 is used in the step of forming the tantalum oxide film 2. Pentaethoxy tantalum [Ta (OC ₂ H ₅ ) ₅ ] is used as a raw material gas, and this raw material is a carrier gas vaporized in the vaporization chamber 45 by the heater 44 and sent through the valve 41a by the gas introduction pipe 40a. Valve 41b with argon gas
It is introduced into the reaction furnace 49 on which the substrate holder 47 having the semiconductor wafer 48 mounted thereon is mounted. At the same time, the oxidizing gas is introduced into the reaction furnace 49 through the valve 41c by the gas introduction pipe 40b.

Further, nitrogen gas containing moisture is introduced into the reaction furnace 49 through the valve 41d from the gas introduction pipe 40c. Instead of the means for supplying nitrogen gas containing water through the gas introducing pipe 40c, the water vaporized in the vaporizing chamber 43 by the heater 42 is reacted with argon gas which is a carrier gas sent through the valve 41e through the gas introducing pipe 40d. The method of introducing into the furnace 49 may be used.

The inside of the reaction furnace 49 is heated by the heater 46, and the introduced organic tantalum gas, the oxidizing gas and the nitrogen gas containing the water cause a chemical vapor phase reaction to form a tantalum oxide film on the semiconductor wafer 48. To be done. The used gas is exhausted from the exhaust port 51 via the vacuum pump 50. As the growth conditions, the heating temperature of the vaporization chamber 45 for the organic tantalum raw material is 170 ° C., the growth temperature in the reaction furnace 49 by the heater 46 is 470 ° C., the flow rate of the argon gas as the carrier gas of the organic tantalum raw material is 200 sccm, and the oxygen gas The flow rate is 0.5 SLM, and the flow rate of nitrogen gas containing water is 5
00sccm, the amount of water concentration in nitrogen gas containing water is 2
Vapor growth was carried out for about 10 minutes at 00 ppm and a pressure of 1.0 Torr to obtain a tantalum oxide film with a film thickness of about 100 Å.

The preferable growth conditions are as follows: the heating temperature of the vaporizing chamber 45 for the organic tantalum raw material is 100 to 200 ° C.
The growth temperature in the reaction furnace 49 by the heater 46 is 300
˜600 ° C., the flow rate of argon gas which is a carrier gas of organic tantalum raw material is 50 to 500 sccm, the flow rate of oxygen gas is 0.2 to 10 SLM, the flow rate of nitrogen gas containing water is 100 to 1000 sccm, and the pressure is 0.1 to 0.1 sccm. When the water is supplied from the vaporization chamber 43 at 10 Torr, the heating temperature of the vaporization chamber 43 by the heater 42 is 40 to 100 ° C., and the flow rate of the argon gas as the carrier gas is 50 to 500 sccm. Also in the case of collecting, the amount of water in the gas may be 50 ppm to 500 ppm.

Next, the tantalum oxide film is subjected to a high temperature heat treatment for densification. This densification treatment is performed at a temperature of 600 to 1000 ° C. in an oxidizing gas atmosphere such as oxygen (O ₂ ) or nitrous oxide (N ₂ O) by using a rapid heating method using an electric furnace or lamp heating. Are suitable.

Subsequently, a titanium nitride film is formed as the capacitor upper electrode 3 [FIG. 2 (d)]. In this embodiment,
A titanium nitride single layer was used as the upper electrode, but instead of this, a refractory metal film of tungsten, molybdenum, titanium or the like, a nitride film of these refractory metals, a silicide film of these refractory metals, or a refractory film of these A multilayer film made of a metal film, a nitride film, a silicide film, a polysilicon film, or the like can be used.

FIG. 4 shows the relationship between the high temperature heat treatment temperature and the applied voltage when the leak current density is 10 ⁻⁸ A / cm ² in the capacitive element of the device manufactured in this example.
Shown in. Here, □ and black □ are characteristics according to the prior art, and Δ and black Δ are characteristics according to the first embodiment (□ and Δ are positive on the upper electrode side, black □ and black Δ are on the upper electrode side. Shows the characteristics when a negative voltage is applied). As is clear from FIG. 4, the deterioration of the tantalum oxide film formed in the first embodiment due to the high temperature heat treatment is smaller than that of the prior art. This characteristic is a characteristic that can be sufficiently applied to an actual device.

Next, a second embodiment of the present invention will be described. In the second embodiment of the present invention, as shown in FIG. 2C, after the tantalum oxide film is densified, plasma treatment using an oxidizing gas is performed as the densification treatment. High temperature heat treatment using an oxidizing gas is performed.
As the plasma processing conditions, the temperature is room temperature to 700 ° C., the pressure is 0.1 to 10 Torr, and the atmosphere gas is oxygen (O).
₂ ), nitrous oxide (N ₂ O), oxygen containing water, or a mixed gas atmosphere of several kinds of these gases is suitable. As the high temperature heat treatment, oxygen (O ₂ ) is used by using a rapid heating method using an electric furnace or lamp heating.
Alternatively, it is suitable to carry out at a temperature of 600 to 1000 ° C. in an oxidizing gas atmosphere such as nitrous oxide (N ₂ O).

The relationship between the high temperature heat treatment temperature of the tantalum oxide film in the device manufactured according to the second embodiment and the applied voltage when the leakage current density becomes 10 ⁻⁸ A / cm ² is added to FIG. Also in the second embodiment, the amount of water added in the nitrogen gas used to form the tantalum oxide film is 200 p.
pm. Here, ◯ and ● marks are characteristics according to the second embodiment. As shown in FIG. 4, the leakage current characteristics of the tantalum oxide film formed in the second embodiment by the high temperature heat treatment deteriorate as compared with those formed by the conventional technique or the first embodiment. It can be seen that the degree of deterioration is small, and that the deterioration is suppressed especially at a high temperature of 600 ° C. or higher. It is considered that this is because the tantalum oxide film formed by adding water is more strongly oxidized by the oxidizing plasma treatment.

Further, FIG. 5 shows the leakage current characteristics of the tantalum oxide film formed according to the second embodiment due to the high temperature post heat treatment. As is apparent from FIG. 5, the tantalum oxide film formed according to the second embodiment has good leakage current characteristics after high-temperature heat treatment, and has characteristics that can be sufficiently applied to an actual device as compared with the first embodiment. ing.

The preferred embodiment has been described above.
The present invention is not limited to these examples, and various modifications can be made without departing from the scope of the present invention. For example, in the second embodiment, as the densification treatment, the plasma treatment in the oxidizing atmosphere is followed by the heat treatment in the oxidizing atmosphere, but the latter half heat treatment can be omitted. In that case, it is desirable to set the ambient temperature during the plasma treatment to a high temperature to some extent. Further, the capacitor according to the present invention can be applied not only to DRAM but also to other semiconductor devices.

[0025]

As described above, according to the present invention, the DRA
In the step of forming a tantalum oxide film of a capacitive insulating film used in ULSI such as M, the organic tantalum raw material, an oxidizing gas and a gas containing water are used for film formation. As compared with the formed element, the deterioration of the leakage current characteristics due to the high temperature heat treatment is suppressed, and it becomes possible to provide a capacitive element having excellent characteristics. Further, according to the present invention, a dielectric film having a high relative dielectric constant can be formed with a low leak current. Therefore, when the same leak current is allowed, the dielectric film should be formed thinner. Therefore, it becomes possible to form a capacitive element having a larger capacitance value. Therefore, when the capacitive element according to the present invention is applied to a memory device, it is possible to provide a device that can be miniaturized and has excellent memory retention characteristics and radiation resistance.

[Brief description of drawings]

FIG. 1 is a partial sectional view of a DRAM to which an embodiment of the present invention is applied.

FIG. 2 is a process cross-sectional view for explaining the first embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view of a vapor phase growth apparatus used in a tantalum oxide film forming step in an example of the present invention.

FIG. 4 is a leak current characteristic curve diagram for explaining the effect of the present invention.

FIG. 5 is a leak current characteristic curve diagram for explaining the effect of the present invention.

FIG. 6 is a process sectional view for explaining a conventional example.

FIG. 7 is a leak current characteristic curve diagram for explaining the problems of the conventional example.

[Explanation of symbols]

1 Capacitance Lower Electrode 2, 2'Tantalum Oxide Film 2a Silicon Nitride Film 3 Capacitance Upper Electrode 3a Capacitor Upper Electrode Extraction Part 10 Capacitance Element Part 11 p-type Silicon Substrate 12 n-well 13 First p-well 14 Second p-well 15 n ⁺ type isolation region 16 field oxide film 17 first interlayer insulating film 18 second interlayer insulating film 19 third interlayer insulating film 20 memory cell transistor 21, 21a, 21b n serving as source / drain regions
Type region 22 Gate insulating film 23 Polysilicon 24 Silicide 25 Gate electrode 26 Bit line 27, 28, 29 Contact hole 29a Through hole 30 Transistor 31 Al wiring 32 Titanium nitride film 33 Tungsten plug 40a, 40b, 40c, which constitutes a peripheral circuit 40d gas introduction pipe 41a, 41b, 41c, 41d, 40e valve 42, 44, 46 heater 43, 45 vaporization chamber 47 substrate holder 48 semiconductor wafer 49 reaction furnace 50 vacuum pump 51 exhaust port

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification number Office reference number FI technical display location H01L 21/822 7210-4M H01L 27/10 325 J

Claims (12)

[Claims] 1. A step of forming a lower electrode made of polysilicon on a semiconductor substrate, and a tantalum oxide film is grown by a chemical vapor deposition method in a mixed gas containing water to form a dielectric film on the lower electrode. A method of manufacturing a semiconductor device, comprising: a forming step; and an upper electrode forming step on the dielectric film. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the mixed gas contains an organic tantalum raw material and an oxidizing gas. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the mixed gas contains pentaethoxytantalum and an oxidizing gas. 4. The mixed gas is an organic tantalum raw material,
2. The method of manufacturing a semiconductor device according to claim 1, further comprising an oxidizing gas made of oxygen or nitrous oxide. 5. The method of manufacturing a semiconductor device according to claim 1, wherein the moisture is introduced into a reaction chamber where chemical vapor deposition is performed using an inert gas or nitrogen as a carrier gas. 6. The method of manufacturing a semiconductor device according to claim 1, wherein water is introduced into a reaction chamber where chemical vapor deposition is carried out using oxygen or nitrous oxide as a carrier gas. 7. The method of manufacturing a semiconductor device according to claim 1, wherein water is introduced into a reaction chamber where chemical vapor deposition is performed by a carrier gas passing through a vaporizing chamber that vaporizes water. 8. The moisture concentration in the carrier gas is 50 to 50.
8. The method for manufacturing a semiconductor device according to claim 5, wherein the amount is 500 ppm. 9. After the step of forming the tantalum oxide film,
The method of manufacturing a semiconductor device according to claim 1, wherein plasma treatment in an oxidizing atmosphere and / or heat treatment in an oxidizing atmosphere is performed. 10. A step of performing a heat treatment in a nitriding atmosphere to form a silicon nitride film on the surface of the lower electrode is inserted between the lower electrode forming step and the dielectric film forming step. The method for manufacturing a semiconductor device according to claim 1. 11. A semiconductor device manufacturing apparatus comprising a reaction chamber in which chemical vapor deposition is performed, a pipe for introducing an organic tantalum raw material into the reaction chamber, and a pipe for introducing water. 12. A pipe for introducing the moisture is connected to a vaporizer for vaporizing water, and a carrier gas introducing pipe for supplying a carrier gas is connected to the vaporizer. 11. The semiconductor device manufacturing apparatus according to item 11.