JPH07221173A - Method of manufacturing semiconductor device - Google Patents

Abstract

PURPOSE:To enable the bonding of an aluminum compound to the sidewalls of contact holes to be suppressed to the utmost by a method wherein after the formation of the second interlayer insulating film in sparse film quality and high film thickness for flattening the surface thereof, the underneath wiring layer in the thin film thickness region of the interlayer insulating film is to be etched away e.g. by ething step meeting specific requirements. CONSTITUTION:The first wiring layer 15 is formed on an underneath insulating film 14 and then the first interlayer insulating film 16 comprising SiO2 is formed on the first wiring layer 15. Next, the second interlayer insulating film 17 comprising SiO2 in more sparse film quality and higher film thickness than those of the first interlayer insulating film 16 is formed for flattening the surface of the second interlayer insulating film 17. Next, the second insulating film 17 is selectively etched away using an etching gas containing CO while being impressed with a magnetic field. Finally, the first interlayer insulating film 16 is selectively etched away using another gas substituting an inert gas for CO so that the first wiring layer 15 may be exposed thereby enabling contact holes 19 to be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to improvement of a method of forming a contact hole for making contact between multilayer wiring layers in a highly integrated semiconductor device.

[0002]

2. Description of the Related Art A conventional method of manufacturing a semiconductor device, which is a method of forming a contact hole for making a contact between multilayer interconnections, will be described below with reference to the drawings. First, as shown in FIG. 6, a selective oxide film (2) is formed on a semiconductor substrate (1) made of p-type silicon or the like, and a gate electrode (3) made of polysilicon is formed on the selective oxide film (2). BPSG [Boro-phospho silicate
glass] film (4) and first wiring layer (5) made of aluminum are sequentially formed.

Next, plasma TEOS which becomes an interlayer insulating film
[Tetraethyl Orthosilicate] film (6) is formed, and after etching back is performed to flatten the surface, a photoresist is applied on the film and exposed / developed to form a resist film (7). . Next, the plasma TEOS film (6) is etched and removed by using the resist film (7) as a mask, and the contact holes (8A, 8A) are formed as shown in FIG.
B) is formed.

After that, if a second wiring layer (not shown) made of aluminum or the like is formed thereon, the first wiring layer (5) and the second wiring layer are connected via the contact hole (8). You can make contact between them.

[0005]

However, according to the above-mentioned conventional method, as shown in FIG. 7, since the plasma TEOS film (6) which becomes the interlayer insulating film is etched back to be flattened, The film thickness of the plasma TEOS film (6) varies considerably depending on the location due to the difference in level.

Therefore, when it is necessary to form contact holes in both the thick region (6A) and the thin region (6B) of the plasma TEOS film (6), the thin region (6) is formed.
The plasma TEOS film (6) of B) is completely etched and removed first, and the thick region (6A) is completely etched and removed to form a contact hole. By over-etching, even the underlying first wiring layer (5) is etched, aluminum is sputtered, and a thin tubular aluminum compound (5A) called an aluminum crown is attached to the side wall of the contact hole. .

Since this aluminum compound (5A) has an adverse effect on the aluminum sputter when the second wiring layer is formed later, it needs to be removed, and in order to remove it, the film thickness First wiring layer (5) exposed at the bottom of the contact hole (8B) in the thin region (6B)
Must be done lightly to avoid etching. As an example of this removing process, a plasma etching process using CF4 gas + O2 gas → an etching process using plasma + organic solvent → a plasma etching process using CF4 gas + O2 gas → an etching process using plasma + organic solvent → alkali solution Since a complicated process such as an etching process using is necessary, many problems and time have to be spent for removing the aluminum compound (5A) as described above.

[0008]

The present invention has been made in view of the above-mentioned conventional drawbacks, and a step of forming a first wiring layer (15) on a base insulating film (14) as shown in FIG. When,
A first interlayer insulating film (1) is formed on the first wiring layer (15).
6), and the first interlayer insulating film (16)
The second interlayer insulating film (1
7), and the second interlayer insulating film (17)
And the step of flattening the surface of the second interlayer insulating film (17) by applying an etching gas containing CO while applying a magnetic field to the second interlayer insulating film (17) as shown in FIG. A step of selectively etching and removing, and a step of selectively etching and removing the first interlayer insulating film (16) with an etching gas using an inert gas instead of CO as shown in FIG.
By forming a contact hole (18) by exposing the first wiring layer (15), there is a step in the base when forming a contact hole for making contact between multilayer wirings. Even if there is a difference in the film thickness of the interlayer insulating film, the area where the film thickness of the interlayer insulating film is thin is over-etched and the underlying wiring layer is etched, so that the aluminum compound adheres to the side wall of the contact hole. The present invention provides a method for manufacturing a semiconductor device, which makes it possible to form a contact hole between multilayer wirings while suppressing it as much as possible.

[0009]

[Operation] According to the method of manufacturing a semiconductor device of the present invention, the second interlayer insulating film (17) is formed and the surface thereof is flattened, and the second interlayer insulating film (17) is formed as shown in FIG. ), A second interlayer insulating film (17) is selectively etched and removed using an etching gas containing CO, and an inert gas is used instead of CO as shown in FIG. The first interlayer insulating film (16) is selectively etched and removed using an etching gas to form a contact hole (18).
Is formed.

By the way, a gas containing CO is used as an etching gas, a magnetic field is applied by using a RIE etcher having a magnetic field, and the SiO2 film is etched while adjusting the magnetic field strength. It has been confirmed that different SiO2 films have different etching rates ("40th reaction product" 31a-ze-4). Therefore, as shown in FIG. 2, by applying a magnetic field to the second interlayer insulating film (17) and etching / removing the second interlayer insulating film (17) using an etching gas containing CO, A sufficient selection ratio with the first interlayer insulating film (16) can be secured.

As a result, when the thin film region of the second interlayer insulating film (17) is etched and removed, the thick film region of the second interlayer insulating film (17) is completely etched and removed. By the time, the dense first interlayer insulating film (16) acts as an etching stopper, and it is over-etched so that even the underlying first wiring layer (15) is etched as much as possible. It becomes possible to deter.

Therefore, like the aluminum crown formed by the conventional method, the compound of the constituent elements of the wiring layer adheres to the side wall of the contact hole by being sputtered after the underlying wiring layer is etched. Since it can be suppressed as much as possible, a complicated process for removing it can be eliminated, and the yield of the semiconductor device having the multilayer wiring can be improved.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of forming a contact hole for making a contact of a multilayer wiring, which is a method of manufacturing a semiconductor device according to an embodiment of the present invention, will be described below with reference to the drawings. First, as shown in FIG. 1, a selective oxide film (12) is formed on a semiconductor substrate (11) made of, for example, p-type silicon, and impurities are diffused in an element formation region between the selective oxide films (12). Then, a polysilicon gate (13) is selectively formed on the selective oxide film (12). Next, a base insulating film (14) having a film thickness of 6000Å to 8000Å made of a BPSG film is formed on the entire surface by the CVD method, and an aluminum layer having a film thickness of 7000Å to 8000Å is formed on the underlying insulating film (14) by a sputtering method, and then patterned. The wiring layer (15) is formed. After that, substrate temperature is 400 ℃, O2-6SLM, TEOS
Using a gas of -1.8 ml / min, pressure 2.2 Torr, HF
CV under conditions of power 0.5 kW and LF power 0.5 kW
By the D method, a dense first interlayer insulating film (16) having a film thickness of about 1000Å is formed. Then, the substrate temperature 400
C., O2-6 SLM, TEOS-1.8 ml / min gas is used, and the film thickness is about 50 by the CVD method under the conditions of pressure 2.2 Torr, HF power 0.77 KW, and LF power 0.25 kW.
A second interlayer insulating film (17) made of TEOS having a coarse film quality of 00Å is formed. Then, the entire surface is etched back to flatten the surface. As a result, the second interlayer insulating film (17) has a different film thickness depending on the region, and the thick film region (17A) has a film thickness of about 6000 to 700.
0Å, 2000-300 in the thin area (17B)
It will be about 0Å. Then, in order to compensate for the film loss due to the etch back, sparse film quality TEOS is added again to form about 3000 Å. Next, a photoresist is applied to a thickness of about 1 μm, and after exposure and development, openings (19A, 19B) are formed in regions where contact holes are to be formed. Then, using a magnetic field etcher, as shown in FIG.
A resist film (1 having the openings (19A, 19B) formed therein
Using 8) as a mask, CHF3 with a flow rate of 60 sccm, flow rate of 60 s
RF power 600 W, pressure 60 mTor using CF4 of ccm and CO of flow rate 100 sccm as etching gas.
Under the conditions of r and applied magnetic field of 40 gauss, the second interlayer insulating film (17) having a sparse film quality is etched and removed. by the way,
As in this step, a gas containing CO is used as an etching gas, a magnetic field is applied using a RIE etcher with a magnetic field, and the SiO2 film is etched while adjusting the magnetic field strength, thereby forming a sparse SiO2 film. It has been confirmed that the etching rates differ between dense SiO2 films ("40th reaction product" 31a-ze-4). Therefore, as shown in FIG. 2, while applying a magnetic field of about 40 Gauss to the second interlayer insulating film (17), the etching gas containing CO is used to etch the second interlayer insulating film (17) under the above conditions. Etching
By removing it, the selection ratio between the second interlayer insulating film (17) and the underlying first interlayer insulating film (16) becomes about 100 or more, which is a sufficiently high selection ratio. The first interlayer insulating film (16) is hardly etched. Therefore, the region (1) having a large thickness of the second interlayer insulating film (17) is
Even if the thin film region (17B) is completely etched and removed before 7A) is completely etched and removed, the underlying first interlayer insulating film (16) acts as an etching stopper. Therefore, the first interlayer insulating film (1
6) and the underlying first wiring layer (15) can be prevented from being etched. As a result, it is possible to prevent the formation of the aluminum crown, which is a problem in the past, that is, the etching of the aluminum base wiring layer and the adhesion of the aluminum compound to the side wall of the contact hole as much as possible. Therefore, it is removed. Therefore, the subsequent complicated steps necessary for that are unnecessary. Next, using a magnetic field etcher, as shown in FIG. 3, the resist film (18) having the openings (19A, 19B) formed therein is used as a mask and the flow rate is 60 sccm.
CHF3, flow rate 60sccm CF4 and flow rate 100sccm
RF power of 60 by using Ar as an etching gas.
Under the conditions of 0 W, pressure of 60 mTorr and applied magnetic field of 40 Gauss,
The first interlayer insulating film (16) having a dense film quality is etched and removed to expose the first wiring layer (16). At this time, since the film thickness of the first interlayer insulating film (16) is as thin as about 1000 Å, the film thickness hardly changes depending on the location, so that the etching can be completed almost at the same time regardless of the location. Next, as shown in FIG. 4, after removing the resist film (18) to form the contact holes (20A, 20B), the film thickness is 8000Å to 10000Å by the sputtering method.
Then, an aluminum layer is formed and patterned to form a second wiring layer (21). By the above, the first wiring layer (15) is provided through the contact holes (20A, 20B).
And the second wiring layer (21) can be contacted with each other. As described above, according to the method for manufacturing a semiconductor device in the example of the present invention, as shown in FIG. 2, while applying a magnetic field to the second interlayer insulating film (17), an etching gas containing CO is used. By selectively etching and removing the second interlayer insulating film (17) by using the second interlayer insulating film (17), the second interlayer insulating film (17) can be etched and removed when the thin film region is etched. Until the thick region of the film (17) is completely etched / removed, the dense first interlayer insulating film (16) acts as an etching stopper and is overetched to be the underlying first wiring layer. It is possible to prevent as much as (15) from being etched.

As a result, it is possible to suppress the formation of the aluminum crown, which has conventionally occurred, as much as possible, so that a complicated process for removing the aluminum crown is not necessary, and, by extension, a semiconductor device having the multilayer wiring can be formed. Yield can be improved. In addition, in the present embodiment, the interlayer insulating film is used as an example of the first and second interlayer insulating films (16, 17), but the present invention is not limited to this, and SiO2 having a poor film quality is used.
The same effect can be obtained by using a film and a dense SiO2 film.

[0015]

As described above, according to the method of manufacturing a semiconductor device of the present invention, the second interlayer insulating film (17)
To planarize the surface of the second interlayer insulating film (1
The second interlayer insulating film (17) is selectively etched and removed using an etching gas containing CO while applying a magnetic field to 7), and then an inert gas is used instead of CO as shown in FIG. The first interlayer insulating film (16) is selectively etched and removed by using an etching gas using, to form a contact hole (18).

As a result, it is possible to suppress the adhesion of the compound of the constituent element of the wiring layer to the side wall of the contact hole due to the etching of the underlying wiring layer, which is caused by the conventional aluminum crown. A complicated process for removing the above is not required, and eventually the yield of the semiconductor device having the multilayer wiring can be improved.

[Brief description of drawings]

FIG. 1 is a first cross-sectional view illustrating a method of manufacturing a semiconductor device according to an embodiment of the invention.

FIG. 2 is a second cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the invention.

FIG. 3 is a third cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the invention.

FIG. 4 is a fourth sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the invention.

FIG. 5 is a fifth cross-sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the invention.

FIG. 6 is a first cross-sectional view illustrating the method for manufacturing the semiconductor device according to the conventional example.

FIG. 7 is a second cross-sectional view illustrating the method of manufacturing the semiconductor device according to the conventional example.

[Explanation of symbols]

 (11) Semiconductor substrate (12) Selective oxide film (13) Gate electrode (14) Base insulating film (15) First wiring layer (16) First interlayer insulating film (17) Second interlayer insulating film (17A) ) Thick film area (17B) Thin film area (18) Resist film (19A, 19B) Opening (20A, 20B) Contact hole

Claims (2)

[Claims] 1. A step of forming a first wiring layer (15) on a base insulating film (14), and a first interlayer insulating film (16) made of SiO2 on the first wiring layer (15). ), And a step of forming a second interlayer insulating film (17) made of SiO2 having a film quality lower than that of the first interlayer insulating film (16) and having a thick film thickness. A step of flattening the surface of the second interlayer insulating film (17), and applying a magnetic field to the second interlayer insulating film (17)
A second interlayer insulating film (1
7) selectively etching / removing, and selectively etching / removing the first interlayer insulating film (16) with an etching gas using an inert gas instead of CO,
A step of exposing the first wiring layer (15) to form a contact hole (18). 2. A base insulating film (14) comprising a BPSG film
A step of forming a first wiring layer (15) made of aluminum thereon, and a step of forming a first interlayer insulating film (16) made of a plasma TEOS film on the first wiring layer (15); A step of forming a second interlayer insulating film (17) made of a plasma TEOS film having a film quality lower than that of the first interlayer insulating film (16) and having a thick film thickness; A step of flattening the surface of (17), and applying a magnetic field to the second interlayer insulating film (17),
A step of selectively etching and removing the second interlayer insulating film (17) using an etching gas containing HF3 gas, CF4 gas and CO gas, and a step of etching gas using CHF3 gas, CF4 gas and Ar gas A step of selectively etching and removing one interlayer insulating film (16) to expose the first wiring layer (15) to form a contact hole (18). Production method.