JP3291387B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a method for forming a contact hole for making a contact between multilayer wiring layers in a highly integrated semiconductor device.

[0002]

2. Description of the Related Art A method of forming a contact hole for making a contact between multilayer wirings, which is a method of manufacturing a semiconductor device according to a conventional example, will be described below with reference to the drawings. First, as shown in FIG. 6, a selective oxide film (2) is formed on a semiconductor substrate (1) made of p-type silicon or the like, and a gate electrode (3) made of polysilicon is formed thereon. BPSG [Boro-phospho silicate
glass] film (4) and a first wiring layer (5) made of aluminum are sequentially formed.

[0003] Next, plasma TEOS to be an interlayer insulating film
After forming a [Tetraethyl Orthosilicate] film (6) and performing an etch back to flatten the surface thereof, a photoresist is applied thereon and exposed and developed to form a resist film (7). . Next, the plasma TEOS film (6) is etched and removed using the resist film (7) as a mask, and the contact holes (8A, 8A) are formed as shown in FIG.
Form B).

After that, if a second wiring layer (not shown) made of aluminum or the like is formed thereon, the first wiring layer (5) and the second wiring layer are connected via the contact hole (8). Contact can be made.

[0005]

However, according to the above-mentioned conventional method, as shown in FIG. 7, the plasma TEOS film (6) serving as an interlayer insulating film is etched back and flattened. , The thickness of the plasma TEOS film (6) varies considerably depending on the location.

Accordingly, when it is necessary to form contact holes in both the thick (6A) and thin (6B) regions of the plasma TEOS film (6), the thin region (6)
When the plasma TEOS film (6) of B) is completely etched and removed first, and the thick region (6A) is completely etched and removed to form a contact hole, the thin region (6B) is removed. The over-etching also etches the underlying first wiring layer (5), and the aluminum is sputtered and a thin aluminum compound (5A) called an aluminum crown adheres to the side wall of the contact hole. .

This aluminum compound (5A) has an adverse effect on aluminum spattering when forming the second wiring layer later, so it is necessary to remove the aluminum compound (5A). The first wiring layer (5) exposed at the bottom of the contact hole (8B) in the thin region (6B)
Need to be performed lightly so as not to etch. As an example of the removing process, a plasma etching process using CF4 gas + O2 gas → an etching process using plasma + organic solvent → a plasma etching process using CF4 gas + O2 gas → an etching process using plasma + organic solvent → alkali solution Since a complicated process such as an etching process using GaN is required, there has been a problem that many processes and time have to be spent for removing the aluminum compound (5A) as described above.

[0008]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and comprises a step of forming a first wiring layer (15) on a base insulating film (14) as shown in FIG. When,
A first interlayer insulating film (1) is formed on the first wiring layer (15).
6) forming the first interlayer insulating film (16);
The second interlayer insulating film (1
7) forming a second interlayer insulating film (17);
And a step of flattening the surface of the second interlayer insulating film (17) using an etching gas containing CO while applying a magnetic field to the second interlayer insulating film (17) as shown in FIG. Selectively etching and removing, and selectively etching and removing the first interlayer insulating film (16) with an etching gas using an inert gas instead of CO as shown in FIG.
And forming a contact hole (18) by exposing the first wiring layer (15). Even if there is a difference in the thickness of the interlayer insulating film, the region where the thickness of the interlayer insulating film is thin is over-etched, and the underlying wiring layer is etched, so that the aluminum compound adheres to the side wall of the contact hole. It is an object of the present invention to provide a method of manufacturing a semiconductor device in which a contact hole between multilayer wirings can be formed while suppressing as much as possible.

[0009]

According to the method of manufacturing a semiconductor device of the present invention, a second interlayer insulating film (17) is formed and its surface is planarized, and as shown in FIG. 2), the second interlayer insulating film (17) was selectively etched and removed using an etching gas containing CO, and an inert gas was used in place of CO as shown in FIG. The first interlayer insulating film (16) is selectively etched and removed by using an etching gas to form a contact hole (18).
Is formed.

By the way, by using a gas containing CO as an etching gas, a magnetic field is applied using a magnetic field RIE etcher, and the SiO2 film is etched while adjusting the magnetic field intensity, thereby forming a dense SiO2 film. A phenomenon that the etching rate is different between the various SiO2 films has been confirmed ("40th response" 31a-ze-4). For this reason, as shown in FIG. 2, while applying a magnetic field to the second interlayer insulating film (17), the second interlayer insulating film (17) is etched and removed using an etching gas containing CO. A sufficient selection ratio with the first interlayer insulating film (16) can be obtained.

Thus, when the thin region of the second interlayer insulating film (17) is etched and removed, the thick region of the second interlayer insulating film (17) is completely etched and removed. By this time, the dense first interlayer insulating film (16) acts as an etching stopper to prevent over-etching and etching of the underlying first wiring layer (15) as much as possible. Deterrence becomes possible.

Therefore, as in the case of the aluminum crown formed by the conventional method, the compound of the constituent element of the wiring layer adheres to the side wall of the contact hole by being sputtered after the underlying wiring layer is etched. Can be suppressed as much as possible, so that a complicated process for removing it can be eliminated, and the yield of the semiconductor device having the multilayer wiring can be improved.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for forming a contact hole for making a contact of a multilayer wiring, which is a method for manufacturing a semiconductor device according to an embodiment of the present invention, will be described below with reference to the drawings. First, as shown in FIG. 1, a selective oxide film (12) is formed on a semiconductor substrate (11) made of, for example, p-type silicon, and impurities are diffused into an element formation region between the selective oxide films (12). Then, a polysilicon gate (13) is selectively formed on the selective oxide film (12). Next, a 6000 to 8000 mm thick base insulating film (14) made of a BPSG film is formed on the entire surface by CVD, and an 7000 to 8000 thick aluminum layer is formed thereon by sputtering, and is patterned to form a first insulating film. The wiring layer (15) is formed. Then, substrate temperature 400 ° C, O2-6 SLM, TEOS
-1.8 ml / min gas, pressure 2.2 Torr, HF
CV under condition of power 0.5KW, LF power 0.5KW
By the method D, a first interlayer insulating film (16) having a dense film quality and a thickness of about 1000 ° is formed. Next, the substrate temperature 400
Using a gas of O2-6 SLM, TEOS-1.8 ml / min, a pressure of 2.2 Torr, an HF power of 0.77 kW, and an LF power of 0.25 kW, a film thickness of about 50 is used.
A second interlayer insulating film (17) of TEOS having a sparse film quality of 00% is formed. Thereafter, the entire surface is etched back to flatten the surface. As a result, the thickness of the second interlayer insulating film (17) varies depending on the region, and the film thickness of the thick region (17A) is about 6000 to 700.
0 °, 2000 to 300 in the thin region (17B)
It is about 0 °. Thereafter, TEOS having a sparse film quality is formed again by about 3000 ° in order to compensate for the film reduction due to the etch back. Next, a photoresist is applied to a thickness of about 1 μm, and after exposure and development, openings (19A, 19B) are formed in regions where contact holes are to be formed. Then, using a magnetic field etcher, as shown in FIG.
The resist film (1) having openings (19A, 19B) formed therein
Using 8) as a mask, CHF3 at a flow rate of 60 sccm and a flow rate of 60 s
RF power of 600 W, pressure of 60 mTorr using CF4 of ccm and CO of flow rate of 100 sccm as an etching gas.
r, the sparse second interlayer insulating film (17) is etched and removed under the conditions of an applied magnetic field of 40 Gauss. by the way,
As in this step, by using a gas containing CO as an etching gas, a magnetic field is applied using a magnetic field RIE etcher, and the SiO2 film is etched while adjusting the magnetic field strength, thereby forming a sparse SiO2 film. A phenomenon that the etching rate is different between dense SiO2 films has been confirmed ("40th response" 31a-ze-4). For this reason, as shown in FIG. 2, while applying a magnetic field of about 40 gauss to the second interlayer insulating film (17), the second interlayer insulating film (17) is formed under the above conditions using an etching gas containing CO. Etching
By the removal, the selectivity between the second interlayer insulating film (17) and the underlying first interlayer insulating film (16) becomes about 100 or more, and the selectivity becomes sufficiently high. One interlayer insulating film (16) is hardly etched. Therefore, the region (1) where the thickness of the second interlayer insulating film (17) is large.
Even if the thin film region (17B) is completely etched and removed before 7A) is completely etched and removed, the underlying first interlayer insulating film (16) acts as an etching stopper. Therefore, the first interlayer insulating film (1
6) and etching of the underlying first wiring layer (15) can be suppressed. As a result, the formation of the aluminum crown, which has conventionally been a problem, that is, the aluminum base wiring layer is etched and the aluminum compound is prevented from adhering to the side wall of the contact hole can be suppressed as much as possible. This eliminates the need for complicated subsequent steps. Next, as shown in FIG. 3, the resist film (18) in which the openings (19A, 19B) are formed is used as a mask by using a magnetic field etcher, and the flow rate is 60 sccm.
CHF3, CF4 at a flow rate of 60 sccm and a flow rate of 100 sccm
Using Ar as an etching gas and an RF power of 60
0 W, pressure 60 mTorr, applied magnetic field 40 gauss,
The first interlayer insulating film (16) having a dense film quality is etched and removed to expose the first wiring layer (16). At this time, since the film thickness of the first interlayer insulating film (16) is as thin as about 1000 °, the film thickness hardly changes depending on the place, so that the etching can be completed almost simultaneously regardless of the place. Next, as shown in FIG. 4, after the resist film (18) is peeled to form contact holes (20A, 20B), a film thickness of 8000 to 10,000 is formed by a sputtering method.
Is formed and patterned to form a second wiring layer (21). As described above, the first wiring layer (15) is formed via the contact holes (20A, 20B).
And the second wiring layer (21). As described above, according to the method of manufacturing a semiconductor device according to the embodiment of the present invention, as shown in FIG. 2, while applying a magnetic field to the second interlayer insulating film (17), the etching gas containing CO is removed. The second interlayer insulating film (17) is selectively etched and removed by using the second interlayer insulating film (17) when the thin region of the second interlayer insulating film (17) is etched and removed. By the time the thick region of the film (17) is completely etched and removed, the dense first interlayer insulating film (16) acts as an etching stopper and is over-etched to form the underlying first wiring layer. (15) It is possible to suppress as much as possible from being etched.

As a result, the formation of the aluminum crown, which has conventionally occurred, can be suppressed as much as possible. Therefore, a complicated process for removing the aluminum crown is not required, and the semiconductor device having the multilayer wiring is not required. The yield can be improved. In this embodiment, an interlayer insulating film is used as an example of the first and second interlayer insulating films (16, 17). However, the present invention is not limited to this, and SiO2 having a low film quality is used.
The same effect can be obtained by using a film and a dense SiO2 film.

[0015]

As described above, according to the method of manufacturing a semiconductor device according to the present invention, the second interlayer insulating film (17) is formed.
Is formed, the surface thereof is planarized, and the second interlayer insulating film (1) is formed.
While applying a magnetic field to 7), the second interlayer insulating film (17) is selectively etched and removed using an etching gas containing CO, and then, as shown in FIG. The first interlayer insulating film (16) is selectively etched / removed using an etching gas using, thereby forming a contact hole (18).

Thus, it is possible to minimize the etching of the underlying wiring layer and the attachment of the compound of the constituent element of the wiring layer to the side wall of the contact hole as in the case of the aluminum crown which has conventionally occurred. This eliminates the need for a complicated process for removing the semiconductor device, thereby improving the yield of the semiconductor device having the multilayer wiring.

[Brief description of the drawings]

FIG. 1 is a first sectional view illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a second sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 3 is a third sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention;

FIG. 4 is a fourth sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention;

FIG. 5 is a fifth sectional view illustrating the method for manufacturing the semiconductor device according to the embodiment of the present invention;

FIG. 6 is a first sectional view illustrating a method for manufacturing a semiconductor device according to a conventional example.

FIG. 7 is a second cross-sectional view illustrating a method for manufacturing a semiconductor device according to a conventional example.

[Explanation of symbols]

 (11) Semiconductor substrate (12) Selective oxide film (13) Gate electrode (14) Base insulating film (15) First wiring layer (16) First interlayer insulating film (17) Second interlayer insulating film (17A) ) Thick film area (17B) Thin film area (18) Resist film (19A, 19B) Opening (20A, 20B) Contact hole

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/768 H01L 21/3065

Claims (2)

(57) [Claims] A step of forming a first wiring layer on a base insulating film, and a step of forming a first interlayer insulating film made of SiO2 on the first wiring layer. Forming a second interlayer insulating film (17) made of SiO2, which has a lower film quality and a larger thickness than the first interlayer insulating film (16); Flattening the surface of the second interlayer insulating film (17); and applying a magnetic field to the second interlayer insulating film (17).
Using an etching gas containing O, the second interlayer insulating film (1
7) selectively etching and removing the first interlayer insulating film (16) with an etching gas using an inert gas instead of CO;
Exposing said first wiring layer (15) to form a contact hole (18). 2. A base insulating film comprising a BPSG film.
Forming a first wiring layer (15) made of aluminum thereon; and forming a first interlayer insulating film (16) made of a plasma TEOS film on the first wiring layer (15); Forming a second interlayer insulating film (17) made of a plasma TEOS film having a lower film quality and a larger film thickness than the first interlayer insulating film (16); (17) a step of flattening the surface, and applying a magnetic field to the second interlayer insulating film (17).
A step of selectively etching and removing the second interlayer insulating film (17) using an etching gas containing HF3 gas, CF4 gas and CO gas, and an etching gas using CHF3 gas, CF4 gas and Ar gas. Selectively etching and removing one interlayer insulating film (16) to form a contact hole (18) by exposing the first wiring layer (15). Production method.