JPH07212180A - Surface mounted piezoelectric parts - Google Patents
Surface mounted piezoelectric partsInfo
- Publication number
- JPH07212180A JPH07212180A JP6013229A JP1322994A JPH07212180A JP H07212180 A JPH07212180 A JP H07212180A JP 6013229 A JP6013229 A JP 6013229A JP 1322994 A JP1322994 A JP 1322994A JP H07212180 A JPH07212180 A JP H07212180A
- Authority
- JP
- Japan
- Prior art keywords
- resonator
- package
- adhesive
- outer peripheral
- saw resonator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
Description
【０００１】[0001]
【産業上利用分野】本発明は大量生産による表面実装型
圧電部品、殊に圧電共振子をパッケージに固定する構造
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mass-produced surface mount type piezoelectric component, and more particularly to a structure for fixing a piezoelectric resonator to a package.
【０００２】[0002]
【従来の技術】弾性表面波（ＳＡＷ）共振子及びその封
止構造は図３（ａ），（ｂ）の平面図及びＡ―Ａ′断面
図に示す如く、圧電基板１上にアルミニウム等の導電性
材料を用いて入出力インタディジタルトラスジューサ
（ＩＤＴ）電極２及びその両側に反射器３，４を配置し
たＳＡＷ共振子５の裏面とパッケージ６を接着剤７にて
機械的に保持した後、前記ＩＤＴ電極２から延設した電
極リード部８，９の先端に設けた電極パッド１０，１１
から前記パッケージ６に設けた導電部１２，１３まで金
又はアルミニウムのワイヤ１４，１５で電気的に接続を
行ない、最後に蓋１６を被せて封止するのが一般的であ
った。尚、前記導電部１２，１３は、電子回路基板上の
配線パターンと電気的接続を可能とするために前記パッ
ケージ６側壁を貫通する導電パターンを介して該パッケ
ージ６の外部壁面に設けた外部電極と接続されている。
また、図３（ａ）は構成を明確にすべく蓋１６を省略し
ている。2. Description of the Related Art A surface acoustic wave (SAW) resonator and its sealing structure are made of aluminum or the like on a piezoelectric substrate 1 as shown in the plan views of FIGS. After mechanically holding the input / output interdigital transducer (IDT) electrode 2 and the back surface of the SAW resonator 5 in which the reflectors 3 and 4 are arranged on both sides thereof and the package 6 with an adhesive 7 using a conductive material. , Electrode pads 10 and 11 provided at the tips of the electrode lead portions 8 and 9 extending from the IDT electrode 2.
It was general that the conductive parts 12, 13 provided in the package 6 were electrically connected with gold or aluminum wires 14, 15 and finally covered with a lid 16 for sealing. The conductive parts 12 and 13 are external electrodes provided on the outer wall surface of the package 6 through a conductive pattern penetrating the side wall of the package 6 so as to be electrically connected to a wiring pattern on the electronic circuit board. Connected with.
Further, in FIG. 3A, the lid 16 is omitted to clarify the configuration.
【０００３】ところが、前記電極パッド１０，１１と導
電部１２，１３を電気的に接続しているワイヤ１４，１
５が細いため断線し易いという欠陥があった。更に、前
記ワイヤ１４，１５が、電極パッド１０，１１及び導電
部１２，１３と夫々短絡しないようにするための空間が
必要となるため、電子機器の小型化に伴う圧電部品の小
型化要求に対応できないという欠陥があった。However, the wires 14 and 1 for electrically connecting the electrode pads 10 and 11 and the conductive portions 12 and 13 to each other.
Since 5 was thin, there was a defect that it was easy to break. Further, a space is required to prevent the wires 14 and 15 from short-circuiting with the electrode pads 10 and 11 and the conductive portions 12 and 13, respectively. Therefore, there is a demand for miniaturization of piezoelectric components accompanying miniaturization of electronic devices. There was a flaw that could not be dealt with.
【０００４】そこで、上記欠陥を解決するため、これま
でＩＣの分野で行なわれていたフリップチップ方法によ
りＳＡＷ共振子をパッケージに固定して小型化する方法
が提案されている。該フリップチップ方法とは図４
（ａ）乃至（ｃ）に示す如く、例えばＳＡＷ共振子の電
極パッド１７に金属で直径が約４０〜５０μｍの半球状
のバンプ１８を形成し、該バンプ１８をパッケージ内部
底面の導電部１９に電気的接続するものである。具体的
な接続方法としては、図４（ａ）に示す如く導電部１９
に予め銀ペースト等の導電性接着剤２０を塗布してＳＡ
Ｗ共振子の裏面に荷重をかけて接合する方法、図４
（ｂ）に示す如くバンプ１８の先端に半田２１の塊を予
め付着した上で導電部１９と密着せしめ、リフロー工程
を施して該半田２１を溶解した後に冷却して接合する方
法、図４（ｃ）に示す如くバンプ１８と導電部１９とを
同じ材質の金で形成し、導電部１９を加熱すると共にＳ
ＡＷ共振子とパッケージを狭持するように荷重をかけて
熱圧着する方法などがある。尚、バンプ１８はＳＡＷ共
振子の電極パッド１７側ではなくパッケージの導電部１
９側に設けてもよいことは周知の通りである。Therefore, in order to solve the above-mentioned defects, there has been proposed a method of fixing the SAW resonator to the package and miniaturizing the SAW resonator by a flip chip method which has been carried out in the field of IC. The flip chip method is shown in FIG.
As shown in (a) to (c), for example, a hemispherical bump 18 having a diameter of about 40 to 50 μm is formed of metal on the electrode pad 17 of the SAW resonator, and the bump 18 is formed on the conductive portion 19 on the inner bottom surface of the package. It is to be electrically connected. As a concrete connection method, as shown in FIG.
The conductive adhesive 20 such as a silver paste is applied beforehand to the SA
A method of bonding by applying a load to the back surface of the W resonator, FIG.
As shown in FIG. 4B, a method in which a lump of solder 21 is pre-attached to the tip of the bump 18 and brought into close contact with the conductive portion 19 and a reflow process is performed to melt the solder 21 and then the solder 21 is cooled and joined, FIG. As shown in c), the bump 18 and the conductive portion 19 are formed of gold of the same material, and the conductive portion 19 is heated and S
There is a method in which a load is applied so as to hold the AW resonator and the package and thermocompression bonding is performed. The bumps 18 are not on the SAW resonator electrode pad 17 side but on the conductive portion 1 of the package.
It is well known that it may be provided on the 9 side.
【０００５】上述したフリップチップ方法によりＳＡＷ
共振子をパッケージに固定した表面実装型圧電部品は図
５に示す如き構造となる。予め前記ＳＡＷ共振子５の電
極パッドにバンプ２２，２３を設け、該バンプ２２，２
３を設けた面とパッケージ６の内部底面が向かい合うよ
うにマウントする。もちろん、該パッケージ６の内部底
面には予め前記バンプ２２，２３と対面する位置に導電
部２４，２５を設けておくものとする。該導電部２４，
２５と前記バンプ２２，２３との接続は上記何れのフリ
ップチップ方法であってもよい。SAW by the flip chip method described above
The surface-mounted piezoelectric component in which the resonator is fixed to the package has a structure as shown in FIG. The bumps 22 and 23 are provided in advance on the electrode pads of the SAW resonator 5, and the bumps 22 and 2 are
Mount so that the surface provided with 3 and the inner bottom surface of the package 6 face each other. Of course, conductive parts 24 and 25 are provided on the inner bottom surface of the package 6 at positions facing the bumps 22 and 23 in advance. The conductive portion 24,
The connection between 25 and the bumps 22 and 23 may be performed by any of the above flip chip methods.
【０００６】しかし、ＳＡＷ共振子５をフリップチップ
方法のみでパッケージ６に固定しても機械的強度が不足
する場合があり、衝撃によりバンプ２２，２３と導電部
２４，２５の接合面に剥離又は割れが発生して断線する
ことがある。そこで、シリコン系、或はエポキシ系の接
着剤２６を前記ＳＡＷ共振子５の外周部に塗布して該Ｓ
ＡＷ共振子５と前記パッケージ６の接着強度を高めてい
る。尚、前記接着剤２６は前記ＳＡＷ共振子５の外周部
全体に塗布しないで部分接着でもよい。但し、ＳＡＷ共
振子５の表面波の伝搬路領域を確保するため該ＳＡＷ共
振子５とパッケージ６の中間に隙間２７を設け、該隙間
２７には接着剤を塗布しないものとする。However, even if the SAW resonator 5 is fixed to the package 6 only by the flip chip method, the mechanical strength may be insufficient, and the bumps 22 and 23 and the conductive portions 24 and 25 may be peeled off from the joint surface due to impact. It may crack and break. Therefore, a silicon-based or epoxy-based adhesive 26 is applied to the outer peripheral portion of the SAW resonator 5 to apply the S
The adhesive strength between the AW resonator 5 and the package 6 is increased. The adhesive 26 may be partially adhered instead of being applied to the entire outer peripheral portion of the SAW resonator 5. However, in order to secure a surface wave propagation path region of the SAW resonator 5, a gap 27 is provided between the SAW resonator 5 and the package 6, and no adhesive is applied to the gap 27.
【０００７】しかしながら、前記接着剤２６を硬化する
ために加熱処理を施す必要があるが、その加熱途中で前
記接着剤２６がゲル化してＳＡＷ共振子５とパッケージ
６の隙間２７に侵入し、前記ＳＡＷ共振子５のＩＤＴ電
極２を汚すと共に、該ＳＡＷ共振子５の表面波の伝搬路
領域を固定することになるため最悪の場合発振が停止す
るという欠陥があった。However, it is necessary to apply a heat treatment to cure the adhesive 26. During the heating, the adhesive 26 gels and enters the gap 27 between the SAW resonator 5 and the package 6, Since the IDT electrode 2 of the SAW resonator 5 is contaminated and the surface wave propagation region of the SAW resonator 5 is fixed, the worst case is that oscillation stops.
【０００８】[0008]
【発明の目的】本発明は上述した如き従来の表面実装型
圧電部品の欠陥を除去すべくなされたものであって、製
造容易にして表面実装に適し、接着剤が圧電共振子の励
振電極を汚す、或は該圧電共振子の励振部分を固定して
発振停止となる恐れのない構造を有する表面実装型圧電
部品を提供することを目的とする。SUMMARY OF THE INVENTION The present invention has been made to eliminate the defects of the conventional surface mount type piezoelectric component as described above, and is suitable for surface mount by facilitating the manufacture, and the adhesive is used for the excitation electrode of the piezoelectric resonator. An object of the present invention is to provide a surface mount type piezoelectric component having a structure which is not likely to be contaminated or fix an exciting portion of the piezoelectric resonator to stop oscillation.
【０００９】[0009]
【発明の概要】上述の目的を達成するため本発明に係わ
る表面実装型圧電部品は、圧電素子の励振電極より延設
した電極パッド上にバンプを形成し、該バンプをパッケ
ージ内部底面に設けた導電部にフリップチップ方法によ
り接続すると共に、前記圧電素子とパッケージ内壁とを
接着剤にて固定した表面実装型圧電部品に於いて、前記
パッケージの内部底面に前記バンプの高さより高い段
を、その端部が前記圧電素子の外周部と微小な隙間を形
成するよう配設し、前記接着剤が圧電共振子の励振電極
を汚したり、該圧電共振子の励振部分を固定して発振停
止となる恐れのい表面実装型圧電部品とする。SUMMARY OF THE INVENTION In order to achieve the above object, a surface mount type piezoelectric component according to the present invention has a bump formed on an electrode pad extending from an excitation electrode of a piezoelectric element, and the bump is provided on a bottom surface inside a package. In a surface mount type piezoelectric component in which the piezoelectric element and the package inner wall are fixed with an adhesive while being connected to a conductive portion by a flip chip method, a step higher than the height of the bump is formed on the inner bottom surface of the package. The end portion is arranged so as to form a minute gap with the outer peripheral portion of the piezoelectric element, and the adhesive stains the excitation electrode of the piezoelectric resonator or fixes the excitation portion of the piezoelectric resonator to stop oscillation. Use surface-mounted piezoelectric components that are not afraid.
【００１０】[0010]
【発明の実施例】以下、本発明を実施例を示す図面に基
づいて詳細に説明する。図１は、一実施例の構成を示す
断面図である。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will now be described in detail with reference to the drawings showing the embodiments. FIG. 1 is a cross-sectional view showing the structure of one embodiment.
【００１１】即ち、パッケージ６の内部底面に導電部２
４，２５を設けた後にバンプ２２，２３の高さ（例えば
４０〜５０μｍ）より高くてＳＡＷ共振子より僅かに大
きいキャビティを設けた絶縁ガラスの段２８を、その端
部がＳＡＷ共振子５の外周部と微小な隙間を形成するよ
うに配設する。更に、ＳＡＷ共振子５とパッケージ６を
フリップチップ方法により接続した後、前記ＳＡＷ共振
子５の外周部に塗布したシリコン系、或はエポキシ系接
着剤２９で前記ＳＡＷ共振子５と段２８を固定したもの
である。That is, the conductive portion 2 is provided on the inner bottom surface of the package 6.
4 and 25, the insulating glass step 28 is provided with a cavity higher than the height of the bumps 22 and 23 (for example, 40 to 50 μm) and slightly larger than the SAW resonator. It is arranged so as to form a minute gap with the outer peripheral portion. Further, after connecting the SAW resonator 5 and the package 6 by a flip chip method, the SAW resonator 5 and the step 28 are fixed with a silicon-based or epoxy-based adhesive 29 applied to the outer peripheral portion of the SAW resonator 5. It was done.
【００１２】上述した如く構成することにより、ＳＡＷ
共振子５と段２８との隙間が狭いため、製造工程に於い
て前記接着剤２９がゲル化してもＳＡＷ共振子５とパッ
ケージ６の隙間２７に侵入することがなくなり、該ＳＡ
Ｗ共振子５のＩＤＴ電極を汚す、或は表面波の伝搬路領
域を固定することのない表面実装型圧電部品となる。By configuring as described above, the SAW
Since the gap between the resonator 5 and the step 28 is narrow, even if the adhesive 29 gels in the manufacturing process, it does not enter the gap 27 between the SAW resonator 5 and the package 6, and the SA
The surface mount piezoelectric component does not stain the IDT electrode of the W resonator 5 or fix the propagation path region of the surface wave.
【００１３】また、図１に於いて段２８は前記ＳＡＷ共
振子５の外周全部を包囲する如く構成していたが、図２
に示す如く前記段を２箇所に分割した段３０，３１とし
て、ＳＡＷ共振子の２辺の端縁部のみにするようにし、
接着剤３２，３３を塗布してもよい。尚、段の分割数は
３箇所以上に分割してもよく、ＳＡＷ共振子の形状とマ
ウント方法によって適宜選択すればよい。Further, in FIG. 1, the step 28 is constructed so as to surround the entire outer circumference of the SAW resonator 5, but FIG.
As shown in FIG. 3, the steps are divided into two steps 30, 31 so that only two edge portions of the SAW resonator are formed.
Adhesives 32 and 33 may be applied. The number of steps may be divided into three or more, and may be appropriately selected depending on the shape of the SAW resonator and the mounting method.
【００１４】また、パッケージと段を一体として形成し
てもよく、段を別途設ける工程をなくすことができるた
めパッケージの製造価格を低減することとなる。Further, the package and the step may be integrally formed, and the step of separately providing the step can be eliminated, so that the manufacturing cost of the package is reduced.
【００１５】更に、本発明ではＳＡＷ共振子と段をシリ
コン系、或はエポキシ系接着剤にて固定するとしたが、
低応力の接着剤なら如何なる接着剤を用いてもよい。
尚、低応力の接着剤とは接着するＳＡＷ共振子と段及び
パッケージの熱膨張差等により発生するひずみと、接着
剤自体が硬化するときに発生する内部ひずみを緩和する
接着剤のことである。Further, in the present invention, the SAW resonator and the step are fixed with a silicon-based or epoxy-based adhesive.
Any low-stress adhesive may be used.
The low-stress adhesive is an adhesive that relaxes the strain generated by the difference in thermal expansion between the SAW resonator to be bonded, the step and the package, and the internal strain generated when the adhesive itself is cured. .
【００１６】本発明は前記段を絶縁ガラスとしたが、例
えばセラミック等の他の絶縁性材料であってもよいもの
とする。尚、該段を分割したときは、該段を図１に示す
導電部２４，２５を短絡しないよう配置可能なら導電性
材料で形成してもよい。更に、導電性材料で形成した段
をパッケージの導電部の一部として利用してもよい。但
し、段を導電性材料で構成する際には導電部の短絡が発
生しないように注意すべきであることは言うまでもな
い。In the present invention, the step is made of insulating glass, but other insulating material such as ceramic may be used. When the step is divided, the step may be made of a conductive material as long as it can be arranged so as not to short-circuit the conductive portions 24 and 25 shown in FIG. Further, a step formed of a conductive material may be used as a part of the conductive portion of the package. However, it is needless to say that when the step is made of a conductive material, care should be taken not to cause a short circuit of the conductive portion.
【００１７】以上本発明をＳＡＷ共振子を例に説明した
が、本発明はこれのみに限定されるものではなく、ＳＡ
Ｗフィルタ、或は水晶のバルク波を用いた水晶振動子
や、多重モードフィルタの如き共振子、更には水晶以外
の圧電基板を使用した如何なる圧電素子に適用可能であ
る。Although the present invention has been described by taking the SAW resonator as an example, the present invention is not limited to this.
The present invention can be applied to a W filter, a crystal oscillator using a bulk wave of crystal, a resonator such as a multimode filter, or any piezoelectric element using a piezoelectric substrate other than crystal.
【００１８】[0018]
【発明の効果】本発明は、以上説明した如く構成するも
のであるから、接着剤が圧電共振子の励振電極を汚した
り、該圧電共振子の励振部を固定して発振停止となるこ
とがなく、更に耐衝撃性も備えた表面実装型圧電部品と
なる。また、圧電共振子の電極とパッケージの導電部を
ワイヤにより電気的に接続する方法に比較して小型化且
つ薄型化でき、表面実装型圧電部品を搭載する電子回路
の低価格化と小型化に効果を発揮する。Since the present invention is configured as described above, the adhesive may stain the excitation electrode of the piezoelectric resonator, or the excitation part of the piezoelectric resonator may be fixed to stop oscillation. In addition, it is a surface-mounted piezoelectric component having shock resistance. In addition, the size and thickness of the piezoelectric resonator can be made smaller and thinner than the method of electrically connecting the electrodes of the piezoelectric resonator and the conductive part of the package with a wire, thereby reducing the cost and size of the electronic circuit mounting the surface mount piezoelectric component. Be effective.
【図１】本発明に係わる表面実装型圧電部品の一実施例
を示す断面図FIG. 1 is a cross-sectional view showing an embodiment of a surface mount piezoelectric component according to the present invention.
【図２】本発明に係わる表面実装型圧電部品の製造方法
の実施例を示す平面図FIG. 2 is a plan view showing an embodiment of a method of manufacturing a surface mount piezoelectric component according to the present invention.
【図３】（ａ）及び（ｂ）は従来の表面実装型圧電部品
を示す平面図及び断面図3A and 3B are a plan view and a cross-sectional view showing a conventional surface mount type piezoelectric component.
【図４】（ａ），（ｂ）及び（ｃ）はフリップチップ方
法を示す断面図4A, 4B and 4C are sectional views showing a flip chip method.
【図５】フリップチップ方法による表面実装型圧電部品
の断面図FIG. 5 is a sectional view of a surface-mounted piezoelectric component manufactured by a flip chip method.
５………ＳＡＷ共振子 ６………パッケージ １６………蓋 ２２，２３………バンプ ２４，２５………導電部 ２７………隙間 ２８，３０，３１………段 ２９，３２，３３………接着剤 5 ... SAW resonator 6 ... Package 16 ... Lid 22, 23 ...... Bump 24, 25 ... Conductive part 27 ... Gap 28, 30, 31 ... Steps 29, 32, 33 ......... Adhesive
Claims (3)
ド上にバンプを形成し、該バンプをパッケージ内部底面
に設けた導電部にフリップチップ方法により接続すると
共に、前記圧電素子とパッケージ内壁とを接着剤にて固
定した表面実装型圧電部品に於いて、前記パッケージの
内部底面に前記バンプの高さより高い段を、その端部が
前記圧電素子の外周部と微小な隙間を形成するよう配設
したことを特徴とする表面実装型圧電部品。1. A bump is formed on an electrode pad extending from an excitation electrode of a piezoelectric element, the bump is connected to a conductive portion provided on a bottom surface inside a package by a flip chip method, and the piezoelectric element and a package inner wall are connected to each other. In a surface-mounted piezoelectric component in which is fixed with an adhesive, a step higher than the height of the bump is arranged on the inner bottom surface of the package, and its end portion forms a minute gap with the outer peripheral portion of the piezoelectric element. A surface-mounted piezoelectric component characterized by being installed.
を特徴とする請求項１記載の表面実装型圧電部品。2. The surface-mounted piezoelectric component according to claim 1, wherein the bump is formed on the conductive portion side.
であることを特徴とする請求項１又は請求項２記載の表
面実装型圧電部品。3. The surface-mounted piezoelectric component according to claim 1, wherein the piezoelectric element is a surface acoustic wave (SAW) element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6013229A JPH07212180A (en) | 1994-01-10 | 1994-01-10 | Surface mounted piezoelectric parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6013229A JPH07212180A (en) | 1994-01-10 | 1994-01-10 | Surface mounted piezoelectric parts |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07212180A true JPH07212180A (en) | 1995-08-11 |
Family
ID=11827361
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6013229A Pending JPH07212180A (en) | 1994-01-10 | 1994-01-10 | Surface mounted piezoelectric parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07212180A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0793340A2 (en) * | 1996-02-28 | 1997-09-03 | Oki Electric Industry Co., Ltd. | Saw filter encapsulated in a ceramic package with capacitance incorporated therein |
| WO2004019490A1 (en) * | 2002-08-22 | 2004-03-04 | Epcos Ag | Encapsulated electronic component and production method |
| DE19730914B4 (en) * | 1996-07-29 | 2006-08-10 | National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara | A microelectronic assembly |
| JP2007533475A (en) * | 2004-04-22 | 2007-11-22 | エプコス アクチエンゲゼルシャフト | Encapsulated electrical component and method of manufacturing the same |
-
1994
- 1994-01-10 JP JP6013229A patent/JPH07212180A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0793340A2 (en) * | 1996-02-28 | 1997-09-03 | Oki Electric Industry Co., Ltd. | Saw filter encapsulated in a ceramic package with capacitance incorporated therein |
| EP0793340A3 (en) * | 1996-02-28 | 1998-05-13 | Oki Electric Industry Co., Ltd. | Saw filter encapsulated in a ceramic package with capacitance incorporated therein |
| US5949305A (en) * | 1996-02-28 | 1999-09-07 | Oki Electric Industry Co., Ltd. | Saw filter encapsulated in a ceramic package with capacitance incorporated therein |
| EP1653613A1 (en) * | 1996-02-28 | 2006-05-03 | Oki Electric Industry Co., Ltd. | Saw filter encapsulated in a ceramic package with capacitance incorporated therein |
| DE19730914B4 (en) * | 1996-07-29 | 2006-08-10 | National Semiconductor Corp.(N.D.Ges.D.Staates Delaware), Santa Clara | A microelectronic assembly |
| WO2004019490A1 (en) * | 2002-08-22 | 2004-03-04 | Epcos Ag | Encapsulated electronic component and production method |
| US7388281B2 (en) | 2002-08-22 | 2008-06-17 | Epcos Ag | Encapsulated electronic component and production method |
| JP2007533475A (en) * | 2004-04-22 | 2007-11-22 | エプコス アクチエンゲゼルシャフト | Encapsulated electrical component and method of manufacturing the same |
| US7544540B2 (en) | 2004-04-22 | 2009-06-09 | Epcos Ag | Encapsulated electrical component and production method |
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