JPH07210782A - Data processor - Google Patents

Abstract

PURPOSE:To change output conditions of respective control signals according to the state change of an abnormality detection signal by outputting a 1st output signal when the current state of an input signal generated by detecting the state change is a 1st state or a 2nd output signal when the current state of all input signals is a 2nd state. CONSTITUTION:A temperature abnormality detection sensor 2, a facility fault detection sensor 4, and a fire detection sensor 6 output abnormality detection signals m1-m3 of HIGH as the 1st state when in abnormal states respectively. Further, the sensors outputs abnormality detection signals m1-m3 of LOW as the 2nd state when in normal states. Then a data processor 12 generates an actuation control signal Sa as the 1st output signal for actuating an alarm 14 and a stop control signal Sb as the 2nd output signal for turning OFF an alarm lamp on the basis of last inputted abnormality detection signals previously stored in a storage part and the abnormality detection signals stored in the storage part, and outputs them to the alarm 14 momentarily.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data processing device which forms and outputs a predetermined output signal based on a change in the states of a plurality of input signals.

[0002]

2. Description of the Related Art Conventionally, an alarm device is activated to turn on an alarm lamp based on an abnormality detection signal such as "HIGH" or "LOW" from a plurality of monitoring sensors, such as an alarm device. Or, in a data processing device that generates an alarm, a start control signal and a stop control signal for controlling the operation of an alarm device are formed by obtaining a logical product or a logical sum of a plurality of abnormality detection signals. For example, when each control signal is formed based on the abnormality detection signals from the three types of monitoring sensors, for example, the logical sum of the three abnormality detection signals is calculated and one of the abnormality detection signals is detected. Is "HIGH", the start control signal is output as "HIGH" and the abnormality detection signal is "LO".
When it becomes "W", the stop control signal is output as "HIGH".

Further, in the case where each control signal is formed by obtaining a logical product, when all three abnormality detection signals are "HIGH", the start control signal is "HIGH".
When the abnormality detection signals are all "LOW", the stop control signal is output as "HIGH".

[0004]

However, in the above conventional data processing apparatus, the "HI" of the abnormality detection signal is detected.
When the abnormality detection signal changes to "HIGH" because each control signal is formed by a single condition such as logical product or logical sum based on the state of "GH" or "LOW". And when the status changes to "LOW",
The condition for outputting each control signal cannot be changed. For example, when each control signal is formed based on the logical sum of the abnormality detection signals, all the abnormality detection signals are "HIGH".
When any of the abnormality detection signals becomes "LOW" when it is "H", the stop control signal becomes "HIGH", and the other abnormality detection signals are "HIGH". However, there is an unsolved problem that the alarm device stops operating.

Therefore, the present invention has been made in view of the above-mentioned unsolved problems of the prior art, and provides a data processing device capable of changing the output condition of each control signal in accordance with the change in the state of the abnormality detection signal. It is intended to be provided.

[0006]

In order to achieve the above object, in the data processing apparatus according to the present invention, as shown in the basic configuration diagram of FIG. 1, the data can be displayed in the first state and the second state. A data processing device for forming a first output signal and a second output signal based on state changes of a plurality of input signals, the storing means storing the previous states of the plurality of input signals; A state change detecting means for detecting the presence or absence of a state change by obtaining an exclusive OR of the previous state stored in the storing means and the current state of the plurality of input signals, and the state change detecting means detects the state change. When the current state of the input signal when the state change is detected is the first state, first output means for outputting the first output signal, and when the state change detection means detects the state change, all inputs The current state of the signal is the second state It is characterized in that it comprises a second output means for outputting a second output signal when it is.

[0007]

For example, in a data processing device that forms a first output signal and a second output signal based on state changes of a plurality of input signals represented by a first state and a second state, The state change detection means detects the presence or absence of a state change by obtaining the exclusive OR of the previous state of the input signal stored in the storage means and the current state of the input signal, and the state change detection means detects the state change. Then, the first output signal is output when the current state of the input signal whose state change has been detected by the first output means is the first state, and the current state of all the input signals is changed by the second output means. When in the second state, the second output signal is output.

[0008]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 2 is a schematic configuration diagram of an alarm device to which the data processing device according to the present invention is applied. The alarm device 1 monitors, for example, an abnormality in an air conditioning facility such as a factory,
As input signals from a temperature abnormality detection sensor 2 for detecting a temperature abnormality, an equipment failure detection sensor 4 for detecting some failure of the air conditioning equipment, and a fire detection sensor 6 for detecting a fire, which are provided in the air conditioning equipment. An alarm device is activated based on the abnormality detection signal, and, for example, an alarm lamp is turned on.

The data processing device 12 is composed of, for example, a programmable controller or the like, and as shown in FIG. 2, a temperature abnormality detecting sensor 2 arranged in air conditioning equipment,
Connected to the equipment failure detection sensor 4 and the fire detection sensor 6,
Further, it is connected to the alarm device 14. Here, the temperature abnormality detection sensor 2, the equipment failure detection sensor 4, and the fire detection sensor 6
Respectively send an abnormality detection signal to the first when an abnormal state is detected.
Is output as "HIGH" as the state of "," and the abnormality detection signal is output as "LOW" as the second state in the normal state.
Shall be output as.

Then, the data processing device 12 reads the abnormality detection signal from each monitoring sensor as 8-bit word data at a preset reading cycle, and the read abnormality detection signal is composed of a storage unit Mw comprising a register or the like. To store. Then, the alarm device 14 is activated based on the previously input abnormality detection signal previously stored in the storage unit Ma as a storage unit configured by a register or the like and the abnormality detection signal stored in the storage unit Mw. The start control signal Sa as the output signal of 1 and the stop control signal Sb as the second output signal for turning off the alarm lamp are formed and momentarily output to the alarm device 14.

The alarm device 14 operates based on the start control signal Sa and the stop control signal Sb from the data processing device 12, and when the start control signal Sa becomes "HIGH", for example, an alarm lamp is turned on. When the stop control signal Sb becomes "LOW", the alarm lamp is turned off. Here, the storage unit Mw and the storage unit Ma are as shown in FIGS.
As shown in FIG. 8, 8 of w _{7 to} w ₀ and a _{7 to} a ₀ , respectively.
The abnormality detection signal m1 from the temperature abnormality detection sensor 2 is stored in the least significant bits w ₀ and a ₀ , and the abnormality detection signal m2 from the equipment failure detection sensor 4 is the second bit w ₁ and a _1. , The abnormality detection signal m from the fire detection sensor 6
It is assumed that 3 is sequentially stored in high-order bits such as w ₂ and a ₂ of the third bit.

Next, the operation of the above embodiment is shown in FIG.
An explanation will be given based on a flowchart showing a processing procedure of the data processing device 12. The data processing unit 12, first, at step S1, the respective bit data w ₇ to w ₀ of the storage unit Mw for storing an abnormality detection signal inputted this time, each of the memory unit Ma to store the abnormality detection signal at the time of the previous input each bit data a ₇ ~a _0, the initial set to "0", the process proceeds to step S2.

Next, in step S2, the counter variable
N is the number of input abnormality detection signals plus "1"
Set to, in this case, anomaly detection from three monitoring sensors
Since a signal is input, set N = 4. Then,
Go to step S3, the abnormality detection signal m from each monitoring sensor
1 to m3 are read, and each of the predetermined files in the storage unit Mw is read.
Stored in the network, and the process proceeds to step S4. In this case,
Each bit data of the memory Mw is w₇= …… = w₃= 0,
w ₂= M3, w₁= M2, w₀= M1.

In step S4, the counter variable N is set to N =
After setting to N-1, the process proceeds to step S5, and step S5
Then, it is determined whether or not the counter variable N is N = 0. In step S5, when the counter variable N = 0, the process proceeds to step S6, the abnormality detection signals stored in the storage unit Mw are stored in the storage unit Ma, and the process returns to step S2.

Then, in step S5, the counter variable N =
If it is not 0, the process proceeds to step S7, and the exclusive OR of the previously input abnormality detection signal stored in the storage unit Ma and the presently input abnormality detection signal stored in the storage unit Mw is obtained for each corresponding bit. Further, the logical sum of the obtained exclusive OR and the one's complement of 2 ^N-1 represented in binary number is obtained for each corresponding bit, and the operation result is expressed by the state variable X (x
_{7 to} x ₀ ).

[0016] Then, the processing proceeds to step S8, the bit data of the state variable X, it is determined whether or not _{x 7 = ...... = x 0 =} 1, x 7 = ...... = x 0 = 1 If not, the process returns to step S4, in the case of _{x 7 = ...... = x 0 =} 1 , the process proceeds to step S9. In step S9, the logical sum of the abnormality detection signal input this time stored in the storage unit Mw and the one's complement of 2 ^N-1 displayed in binary is obtained for each corresponding bit, and this is calculated as the change state Y (y ₇ ~
y ₀ ) and the process proceeds to step S10.

Then, in step S9, it is determined whether or not each bit data of the change state Y is y ₇ = ... = Y ₀ = 1. When y ₇ = ... = Y ₀ = 1 Shifts to step S11, momentarily outputs the activation control signal Sa for activating the alarm device 14 as "HIGH", and returns to step S4. On the other hand, if it is determined in step S10 that the change state y ₇ = ... = y ₀ = 1 is not satisfied, step S12
Then, it is determined whether or not w ₇ = ... = w ₀ = 0 in the storage unit Mw. If w ₇ = ... = w ₀ = 0 is not satisfied,
Returning to step S4, when w ₇ = ... = w ₀ = 0, the process proceeds to step S13, and the stop control signal Sb for stopping the operation of the alarm device 14 is momentarily output as “HIGH”, Return to S4.

Here, steps S1 to S8 correspond to state change detecting means, steps S9 to S11 correspond to first output means, and steps S12 to S13 correspond to second output means. Next, the temperature abnormality detection sensor 2 installed in the air conditioning equipment, the equipment failure detection sensor 4, and the fire detection sensor 6
Based on the respective abnormality detection signals m1 to m3 from
The operation of the data processing device 12 in the case of forming the start control signal Sa and the stop control signal Sb of No. 4 will be described based on the timing chart shown in FIG.

In FIG. 5, (a) is the abnormality detection signal m1 from the temperature abnormality detection sensor 2, (b) is the abnormality detection signal m2 from the equipment failure detection sensor 4, and (c) is the abnormality detection signal m2.
The abnormality detection signals m3, (d) from the fire detection sensor 6 are
The start control signal Sa, (e) for activating the alarm device 14 from the data processing device 12 is the stop control signal Sb, (f) for stopping the operation of the alarm device 14 from the data processing device 12,
The logical sum of the abnormality detection signals m1 to m3 is shown.

First, when the data processor 12 is activated,
Each bit data of the storage unit Mw and Ma is "0" is initially set to, a _{w 7 = ...... = w 0 =} a 7 ...... = a 0 = 0. Further, in this case, since the abnormality detection signals from the three types of monitoring sensors are input, the counter variable N is set to N = 4. Then, assuming that the air conditioning equipment is operating normally, the abnormality detection signals m1 to m3 from the respective monitoring sensors at the time point t0 are “LOW” (FIG.
(C)) In the data processing device 12, the inputted abnormality detection signals m1 to m3 are stored in predetermined bits of the storage unit Mw, but each bit data of the storage unit Mw is w ₇ = ... = W ₀ =
It remains 0.

At this time, since the air conditioning equipment is operating normally, each bit data in the storage unit Ma is also a ₇ ... = a ₀ =
Therefore, the corresponding bitwise exclusive OR of the storage units Mw and Ma is “0,0,0,0,0,0,0,0.
When the counter variable N = 3, the binary complement 2 ^N-1 one's complement C (N = 3) is “1, 1,
¹ , 1, ¹ , 0, ¹ , 1 ", and the exclusive OR of the storage units Mw and Ma and the binary complement of 2 ^N-1 one's complement C
When the logical sum of (N = 3) is obtained for each corresponding bit,
It becomes “1,1,1,1,1,0,1,1”, so
State variable X is not a _{x 7 = ...... = x 0 =} 1, it is determined that there is no state change in the abnormality detection signal m3 from the fire detection sensor 6 is bit data w ₂ of the storage unit Mw , Each control signal remains "LOW".

Next, when the counter variable N = 2, the binary complement 2 ^N-1 one's complement C (N = 2) is "1, 1,
¹ , 1, ¹ , 1, 0, 1 ", and the exclusive OR of the storage units Mw and Ma and the binary complement 2 ^N-1 one's complement C
When the logical sum with (N = 2) is obtained for each corresponding bit,
It becomes "1,1,1,1,1,1,1,0,1", so
Since the state variable X is not x ₇ = ... = x ₀ = 1, it is determined that the abnormality detection signal m2 from the equipment failure detection sensor 4, which is the bit data w ₁ of the storage unit Mw, has no state change. However, each control signal remains "LOW".

Similarly, when the counter variable N = 1, the binary complement 2 ^N-1 one's complement C (N = 1) is “1, 1,
¹ , 1, ¹ , 1, ¹ , 0 ", and the logic of the exclusive OR of the storage unit Mw and the storage unit Ma and the 1's complement C (N = 1) of 2 ^{N-1 in} binary notation When the sum is calculated for each corresponding bit, it becomes “1,1,1,1,1,1,1,1,0”, and therefore the state variable X is not x ₇ = ... = x ₀ = 1 It is determined that the abnormality detection signal m1 from the temperature abnormality detection sensor 2, which is the bit data w ₀ of the storage unit Mw, has not changed state, and each control signal remains “LOW”.

Then, each bit data of the storage unit Mw is stored in the corresponding bit of the storage unit Ma, and the abnormality detection signals m1 to m3 are read at the time t1 which is the next reading cycle. Here, for example, assume that a temperature abnormality occurs in the air conditioning equipment at a time point t1 and the abnormality detection signal m1 from the temperature abnormality detection sensor 2 becomes “HIGH” (FIG. 5).
(A)).

[0025] In the data processing apparatus 12, respectively an abnormality detection signal m1~m3 entered, stored in the storage unit Mw, which bit data w ₇ to w ₀ of the memory unit Mw some "0,0,0,0, 0,0,0,1 ". This time,
At time t0, since air conditioning was normal state, bit data a ₇ ~a ₀ of the memory unit Ma is "0,0,0,
0,0,0,0,0 ", and therefore the storage units Ma and M
An exclusive OR for each bit corresponding to w is “0, 0,
0,0,0,0,0,1 ".

When the counter variable N = 3, the binary complement 2 ^N-1 1's complement C (N = 3) is "1, 1,
¹ , 1, ¹ , 0, ¹ , 1 ", and the exclusive OR of the storage units Mw and Ma and the binary complement of 2 ^N-1 one's complement C
When the logical sum of (N = 3) is obtained for each corresponding bit,
It becomes “1,1,1,1,1,0,1,1”, so
Since the state variable X is not x ₇ = ... = x ₀ = 1, it is determined that there is no state change in the abnormality detection signal m3 from the fire detection sensor 6 which is the bit data w ₂ of the storage unit Mw. To do.

Next, when the counter variable N = 2, the binary complement 2 ^N-1 one's complement C (N = 2) is "1, 1,
¹ , 1, ¹ , 1, 0, 1 ", and the exclusive OR of the storage units Mw and Ma and the binary complement 2 ^N-1 one's complement C
When the logical sum with (N = 2) is obtained for each corresponding bit,
It becomes "1,1,1,1,1,1,1,0,1", so
Since the state variable X does not become x ₇ = ... = x ₀ = 1, it is assumed that there is no state change in the abnormality detection signal m2 from the equipment failure detection sensor 4 which is the bit data w ₁ of the storage unit Mw. judge.

Similarly, when the counter variable N = 1, binary
Number display 2^N-1The one's complement C (N = 1) of “1,1,
1,1,1,1,1,0 ", and the storage units Mw and Ma
Exclusive OR of two and binary display of 2^N-1One's complement of C
When the logical sum with (N = 1) is obtained for each corresponding bit,
It becomes "1,1,1,1,1,1,1,1,1". Therefore,
The state variable X is x₇= …… = x₀= 1, so remember
Bit data w of part Mw ₀Abnormal temperature detection sensor 2
It was determined that the abnormality detection signal m1 from
To do.

Then, the storage unit Mw and the binary number display 2 ^N-1
When the logical sum with the one's complement C (N = 1) of is obtained for each corresponding bit, it becomes “1,1,1,1,1,1,1,1,1”. Therefore, the change state Y is y _{Since 7} = ... = y ₀ = 1 is set, the activation control signal Sa of the alarm device 14 is set to “HIGH”.
Momentarily output as (FIG. 5 (d)). Thereby, in the alarm device 14, for example, an alarm lamp is turned on,
Then, in the data processing device 12, each bit data of the storage unit Mw is stored in the corresponding bit of the storage unit Ma, and at the time t2 which is the next reading cycle, each abnormality detection signal m1.
Read ~ m3.

At the time point t2, if a new failure occurs in the air conditioning equipment, the abnormality detection signal m2 from the equipment failure detection sensor 4 becomes "HIGH". In the data processing apparatus 12 performs processing similar to the above, read the abnormality detection signal m1~m3 is stored in the storage unit Mw, bit data w ₇ to w ₀ of the storage unit Mw is "0, 0, 0, 0 ，
_{0, 0,} 1, ₁ ”. At this time, the bit data a _{7 to} a ₀ of the storage unit Ma are“ _{0, 0, 0, 0, 0, 0, 0, 0} ,
1 ”, and the exclusive OR for each corresponding bit of the storage unit Mw and the storage unit Ma is“ 0, 0, 0, 0, 0, 0, 1,
It becomes 0 ".

Therefore, since there is no state change in the abnormality detection signals m1 and m3 from the temperature abnormality detection sensor 2 and the fire detection sensor 6, when the counter variables N = 3 and N = 1,
The state variable X does not become x ₇ = ... = x ₀ = 1. When the counter variable N = 2, the binary display of 2
The one's complement C (N = 2) of ^N-1 is "1, ¹ , 1, ¹ , 1,
1, 0, 1 ", and the logical sum of the exclusive OR of the storage units Mw and Ma and the one's complement C (N = 2) of 2 ^{N-1 in} binary notation is obtained for each corresponding bit. And "1, 1, 1,
1,1,1,1,1 ", so the state variable X is
x ₇ = ... = x ₀ = 1 and the storage unit Mw at this time
And the logical sum of 2 ^N-1 one's complement C (N = 2) in binary notation is calculated for each corresponding bit, “ ¹ , 1, ¹ , 1,
1,1,1,1 ", and thus the change state Y is y ₇
= ... = y ₀ = 1 and therefore the activation control signal Sa is changed to “H
Momentarily output as "IGH" (FIG. 5 (d)).

Then, each bit data of the storage unit Mw is stored in the corresponding bit of the storage unit Ma, and the abnormality detection signals m1 to m3 are read at time t3, which is the next read cycle. At time t3, the abnormality detection signal m from each monitoring sensor
Since there is no state change in 1 to m3, the counter variable N = 1 to 1
In any case of 3, the state variable X is x ₇ = ... = x ₀ = 1
Therefore, each control signal becomes "LOW".

Then, for example, when the air conditioning equipment returns to the normal state at time t4 and the abnormality detection signal m2 from the equipment failure detection sensor 4 changes to "LOW", at this time, the bit data a _{7 of the} storage unit Ma ~ A ₀ is “0, 0, 0, 0,
0,0,1,1 ", and the bit data w of the storage unit Mw
_{7 to} w ₀ are “ _{0, 0, 0, 0, 0, 0, 0,} 1”, and the exclusive OR of corresponding bits of the storage units Mw and Ma is “ _{0, 0, 0, 0, 0} ”. , 1, 0 ”.

At time t4, counter variables N = 1 and 3
, The state variable X is x₇= …… = x ₁Does not become 1
, When the counter variable N = 2, the storage unit Mw and the storage unit M
Exclusive OR with a and binary display 2^N-1One's complement of
C (N = 2) "1,1,1,1,1,1,0,1"
When the logical sum is calculated for each corresponding bit, “1, 1, 1,
1,1,1,1,1 ", so the state variable X is x
₇= …… = x₀= 1.

At this time, the state variable Y is the value in the memory Mw.
Data w₇~ W₀Is “0,0,0,0,0,0,
0,1 ", 2 in binary notation^N-1One's complement of C (N = 2)
Is "1,1,1,1,1,1,1,0,1"
"1,1,1,1,1,1,1,0,1" becomes the state variable
Y is y₇= …… = y₀= 1 is not satisfied, and the storage unit Mw is w
₇= …… = w₀= 0, so equipment failure detection sensor
The abnormality detection signal m2 from 4 changed to "LOW"
However, the abnormality detection signals m1 to m3 are "LO".
Since it is not in the "W" state, each bit data of the storage unit Mw is
It is stored in the corresponding bit of the memory unit Ma, and the next read cycle is stored.
At the time t5, which is a period, each abnormality detection signal m1 to m3 is read.
See in.

[0036] Then, at time t5, when the fire occurs in the air conditioning, the abnormality detection signal m3 is "HIGH" next to the fire detection sensor 6, this time, the bit data w ₇ to w ₀ of the memory unit Mw Is "0,0,0,0,0,1,
0,1 ", bit data a ₇ ~a ₀ of the memory unit Ma is" 0,0,0,0,0,0,0,1 ", and thus,
The exclusive OR for each corresponding bit of the storage unit Mw and the storage unit Ma is “0,0,0,0,0,1,0,0”.

Therefore, when the counter variables N = 1 and 2, the temperature abnormality detection sensor 2 and the equipment failure detection sensor 4 are detected.
Since there is no state change in the abnormality detection signals m1 and m2 from the state variable X, the state variable X does not become x ₇ = ... = x ₀ = 1.
Corresponds the exclusive OR with a and the OR with the 2 ^N-1 one's complement C (N = 3) “1,1,1,1,1,1,0,1,1” in binary notation For each bit to be calculated, "1, 1, 1,
1,1,1,1,1 ", so the state variable X is x
₇ = ... = x ₀ = 1 and at this time, the state variable Y becomes "1,1,1,1,1,1,1,1,1", and y ₇ = ...
Since == y ₀ = 1 is set, the start control signal Sa is changed to "HIG
Momentarily output as "H" (FIG. 5 (d)).

Then, each bit data of the storage unit Mw is stored in the corresponding bit of the storage unit Ma. Next, for example, when the temperature of the air conditioning equipment returns to normal at time t6, the abnormality detection signal m1 from the temperature abnormality detection sensor 2 changes to "LOW", whereby the counter variable N =
When it is 1, the state variable X becomes x ₇ = ... = x ₀ = 1 but at this time, the change state Y does not become y ₇ = ... = y ₀ = 1 and the bit data of the storage unit Mw Is w ₇ = …… = w ₀
Since = 0, each control signal remains “LOW”, each bit data of the storage unit Mw is stored in the corresponding bit of the storage unit Ma, and the abnormality detection signal m is stored in the next read cycle.
Read 1 to m3.

Then, for example, at time t7, when the fire of the air conditioning equipment subsides, the abnormality detection signal m3 from the fire detection sensor 6 changes to "LOW", and at this time, the bit data w of the storage unit Mw. _{7 to} w ₀ are “0, 0, 0, 0,
0,0,0,0 ", and the bit data a of the storage unit Ma
_{Since 7 to} a ₀ are “0, 0, 0, 0, 0, 1, 0, 0”, the exclusive OR for each corresponding bit of the storage unit Mw and the storage unit Ma is “0, 0, 0,0,0,1,0,0 ".

Therefore, the state change to the abnormality detection signal m3
Therefore, when the counter variable N = 3,
Exclusive OR with storage unit Ma and binary display 2^N-1of
1's complement C (N = 3) “1, 1, 1, 1, 1, 0, 1,
When the logical sum of "1" is obtained for each corresponding bit, "1,"
1,1,1,1,1,1,1,1 ", so the state change
Number X is x₇= …… = x₀= 1, and at this time the storage unit
2 of Mw and binary number display ^N-1With one's complement C (N = 3) of
The logical sum of corresponding bits is "1, 1, 1, 1, 1,
0,1,1 ", so the change state Y is y₇= ……
= Y₀It will not be = 1. At this time, the storage unit M
Bit data of w is w₇= …… = w₀= 0, so
The stop control signal Sb of the alarm device 14 is set to "HIGH".
Output (Fig. 5 (e)).

As a result, the alarm lamp of the alarm device 14 is turned off, and the data processing device 12 subsequently performs the same processing as described above. Therefore, when the temperature abnormality detection sensor 2 detects the temperature abnormality at the time point t1, the activation control signal Sa of the alarm device 14 becomes “HIGH”, and as shown in FIG. At time t7 when all of m1 to m3 are "LOW", the stop control signal Sb becomes "HIGH", and when an abnormality is detected by any of the monitoring sensors, an alarm lamp is turned on and all the monitoring sensors detect a normal state. When the alarm lamp is turned off,
Therefore, the start control signal Sa and the stop control signal Sb are output as "HIGH" depending on whether the abnormality detection signal changes from "LOW" to "HIGH" or from "HIGH" to "LOW". You can change the conditions to do.

The operator recognizes that some abnormality is occurring in the air conditioning equipment while the alarm lamp is on, and conversely, the air conditioning equipment is operating normally while the alarm lamp is off. You can recognize that it is working. In addition, although the case where the storage units Mw and Ma are formed of 8 bits has been described in the above embodiment, the present invention is not limited to this, and it may be formed with an arbitrary number of bits. The case where the control signal for the alarm device 14 is generated based on the abnormality detection signal has been described, but any number of abnormality detection signals that can be stored in the storage units Mw and Ma can be applied.

Further, in the above embodiment, the alarm 14
Then, start control of "HIGH" from the data processing device 12
Turn on the alarm lamp when the signal Sa is input
However, the start control signal Sa and the stop control signal S
It can be applied arbitrarily such as generating an alarm based on b.
You can Further, in the above embodiment, the storage unit Mw
And bitwise exclusive OR of 2 and Ma
^N-1The logical sum of 1 and the complement of
It is designed to detect the presence or absence of changes, but steps
In S7, the exclusive OR for each bit of the storage units Mw and Ma
And the binary number 2^N-1By finding the logical product of
It is also possible to detect the presence or absence of a state change.
Yes, in this case, in step S8 of FIG.
x₇= …… = x₀= 0, it is determined whether the state variable
X is x₇= …… = x₀If not = 0, move to step S9
Then, in step S9, the storage unit Mw and the binary number 2 are displayed.^N-1
Change state Y is obtained by the logical product of each corresponding bit of
Therefore, in step S10, the change state Y is y₇= …… = y₀
= 0, the process proceeds to step S12, and step S1
In 2 the storage unit Mw is w₇= …… = w ₀= 0 or not
It is determined that the storage unit Mw is w.₇= …… = w₀= 0
The step S13, the stop control signal Sb
Output as "HIGH".

Further, in the above embodiment, the abnormality detection signals from the respective monitoring sensors are collectively processed as word data, but they are processed bit by bit, that is, for each abnormality detection signal. It is also possible. Further, in the above embodiment, the case where the start control signal is applied as the first output signal and the stop control signal is applied as the second output signal has been described, but the stop control signal and the second output signal are applied as the first output signal. It is also possible to apply the activation control signal as the output signal, and the first state is "HI".
The case where the "GH" state and the "LOW" state are applied as the second state has been described, but similarly to the above, the "LOW" state is the first state and the "HIGH" state is the second state.
It is also possible to apply states.

[0045]

As described above, according to the data processing apparatus of the present invention, the first state based on the state change of the plurality of input signals represented by the first state and the second state is obtained. In a data processing device that forms an output signal and a second output signal, a state change is obtained by obtaining the exclusive OR of the previous state and the current state of a plurality of input signals stored in the storage means by the state change detection means. When the state change detecting means detects a state change in any of the input signals, when the current state of the input signal in which the state change is detected is the first state, the first output means By outputting the second output signal by the second output means when the current output state of all input signals is the second state, the second output means outputs the second output signal. The state and the second state Output condition of the first and second output signals in a certain case may be changed.

[Brief description of drawings]

FIG. 1 is a basic configuration diagram showing an outline of the present invention.

FIG. 2 is a schematic configuration diagram showing an embodiment of the present invention.

FIG. 3 is a configuration diagram of storage units Mw and Ma.

FIG. 4 is a flowchart showing a processing procedure of the data processing device.

FIG. 5 is an explanatory diagram for explaining the operation of the present invention.

[Explanation of symbols]

 12 Data processing device Mw, Ma Storage part m1-m3 Abnormality detection signal

Claims (1)

[Claims] 1. A first output signal and a second output signal based on state changes of a plurality of input signals represented by a first state and a second state.
In the data processing device for forming the output signal of the above, the storage means for storing the previous states of the plurality of input signals, the exclusion of the previous state stored in the storage means and the present state of the plurality of input signals State change detection means for obtaining the logical OR to detect the presence or absence of the state change, and when the state change detection means detects the state change, when the current state of the input signal detected the state change is the first state First output means for outputting a first output signal, and second output signal when the current state of all input signals when the state change is detected by the state change detection means is the second state And a second output means for performing the data processing.