JPH07201784A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH07201784A
JPH07201784A JP45194A JP45194A JPH07201784A JP H07201784 A JPH07201784 A JP H07201784A JP 45194 A JP45194 A JP 45194A JP 45194 A JP45194 A JP 45194A JP H07201784 A JPH07201784 A JP H07201784A
Authority
JP
Japan
Prior art keywords
semiconductor substrate
semiconductor
cutting
cut
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP45194A
Other languages
Japanese (ja)
Inventor
Hideo Uchikoshi
英生 打越
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP45194A priority Critical patent/JPH07201784A/en
Publication of JPH07201784A publication Critical patent/JPH07201784A/en
Withdrawn legal-status Critical Current

Links

Abstract

PURPOSE:To smooth edges of semiconductor chips cut from a semiconductor wafer so that dust or flakes of silicon may not appear. CONSTITUTION:A method of manufacturing a semiconductor device comprises the steps of attaching a semiconductor wafer 1 face up to an adhesive tape 2, cutting the semiconductor wafer to form grooves 1b reaching the tape, and smoothing the side walls of the grooves in the wafer by etching.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体基板を切断して
半導体チップに分割する方法に係り、特に半導体基板の
切断溝の側壁の表面状態の改良に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for cutting a semiconductor substrate to divide it into semiconductor chips, and more particularly to improving the surface condition of the sidewall of a cutting groove of the semiconductor substrate.

【0002】半導体基板を切断して半導体チップに分割
するには、砥石により半導体基板を切断して半導体チッ
プにするダイサーを用いている。しかし、この切断方法
では半導体基板がシリコンの場合には切断溝の側壁や半
導体チップの表面上にシリコン片が付着して残留し、半
導体基板の表面に形成したカバー膜を傷つけたり、シリ
コン片が導電部分の間に残留すると短絡が発生して半導
体装置の品質を低下させている。
To cut a semiconductor substrate into semiconductor chips, a dicer is used to cut the semiconductor substrate into a semiconductor chip with a grindstone. However, in this cutting method, when the semiconductor substrate is silicon, silicon pieces adhere and remain on the sidewalls of the cutting groove and on the surface of the semiconductor chip, which may damage the cover film formed on the surface of the semiconductor substrate or cause the silicon pieces to remain. If it remains between the conductive parts, a short circuit occurs to deteriorate the quality of the semiconductor device.

【0003】以上のような状況から、半導体チップの切
断面や半導体チップの表面上にシリコン片が付着して残
留することにより発生する障害を除去することが可能な
半導体装置の製造方法が要望されている。
Under the circumstances as described above, there is a demand for a method of manufacturing a semiconductor device capable of removing a failure caused by a silicon piece adhering and remaining on a cut surface of a semiconductor chip or a surface of the semiconductor chip. ing.

【0004】[0004]

【従来の技術】従来の半導体装置の製造方法について図
3により詳細に説明する。図3は従来の半導体装置の製
造方法を工程順に示す側断面図である。
2. Description of the Related Art A conventional method of manufacturing a semiconductor device will be described in detail with reference to FIG. 3A to 3C are side sectional views showing a conventional method of manufacturing a semiconductor device in the order of steps.

【0005】従来の半導体装置の製造方法においては、
まず図3(a) に示すように素子形成面1aを上にして半導
体基板1をテープ2の粘着面2aの表面に貼付し、このテ
ープ2をダイサーの載物台4の表面に載置する。
In the conventional method of manufacturing a semiconductor device,
First, as shown in FIG. 3A, the semiconductor substrate 1 is attached to the surface of the adhesive surface 2a of the tape 2 with the element forming surface 1a facing upward, and the tape 2 is placed on the surface of the stage 4 of the dicer. .

【0006】つぎに図3(b) に示すようにダイサーの高
速回転している砥石5を用いてこの半導体基板1の全厚
を切断して切断溝1bを形成すると同時にこのテープ2の
表面に切断溝2bを形成してこの半導体基板1を半導体チ
ップ1cに分割する。
Next, as shown in FIG. 3B, the entire thickness of the semiconductor substrate 1 is cut by using a grindstone 5 of a dicer rotating at high speed to form a cut groove 1b, and at the same time, the surface of the tape 2 is cut. The semiconductor substrate 1 is divided into the semiconductor chips 1c by forming the cutting grooves 2b.

【0007】このような高速回転する砥石5で半導体基
板1を切断して半導体チップ1cに分割すると、この切断
溝1bの側壁には図3(c) に示すような微小な凹凸が形成
されるので、この切断溝1bの側壁に微小なシリコン片1d
が付着することがあり、その後の組み立て工程において
この切断溝1bの側壁からシリコン片1dが剥がれることが
ある。
When the semiconductor substrate 1 is cut by the grindstone 5 rotating at such a high speed and divided into the semiconductor chips 1c, minute irregularities as shown in FIG. 3 (c) are formed on the side walls of the cutting groove 1b. Therefore, a minute silicon piece 1d is formed on the side wall of this cutting groove 1b.
May adhere, and the silicon piece 1d may peel off from the side wall of the cut groove 1b in the subsequent assembly process.

【0008】[0008]

【発明が解決しようとする課題】以上説明した従来の半
導体装置の製造方法においては、半導体基板をテープに
貼付し、ダイサーの砥石を用いて半導体基板を切断して
半導体チップに分割しているから、半導体チップの切断
溝の側面に凹凸が形成されて荒れた状態になってこの切
断溝の側壁に微小なシリコン片が付着している。
In the conventional method for manufacturing a semiconductor device described above, a semiconductor substrate is attached to a tape, and the semiconductor substrate is cut using a grinder of a dicer and divided into semiconductor chips. Asperities are formed on the side surfaces of the cutting groove of the semiconductor chip and become rough, and minute silicon pieces adhere to the side walls of the cutting groove.

【0009】このため切断して分割した半導体チップを
用いて半導体装置を組み立てると、この組み立て工程中
に切断溝の側面から剥がれたシリコン片が半導体チップ
の表面を傷つけたり、図4に示すような微細ピッチで半
導体チップに形成したリード6の間にシリコン片1dが付
着すると短絡障害が発生するという問題点があった。
For this reason, when a semiconductor device is assembled using semiconductor chips that have been cut and divided, silicon pieces peeled off from the side surfaces of the cutting grooves may damage the surface of the semiconductor chip during the assembly process, or as shown in FIG. If the silicon pieces 1d are attached between the leads 6 formed on the semiconductor chip with a fine pitch, there is a problem that a short circuit failure occurs.

【0010】本発明は以上のような状況から、半導体チ
ップの切断面に凹凸が形成されて荒れた状態になり、シ
リコン片が発生するのを防止することが可能となる半導
体装置の製造方法の提供を目的としたものである。
In view of the above situation, the present invention provides a method for manufacturing a semiconductor device, which is capable of preventing the generation of silicon fragments by forming irregularities on the cut surface of a semiconductor chip. It is intended to be provided.

【0011】[0011]

【課題を解決するための手段】本発明の半導体装置の製
造方法は、素子形成面を上にして半導体基板をテープの
粘着面の表面に貼付する工程と、この半導体基板の全厚
を切断して切断溝を形成する工程と、エッチング処理に
よりこの半導体基板の切断溝の側壁を平滑にする工程と
を含むように構成する。
A method of manufacturing a semiconductor device according to the present invention comprises a step of attaching a semiconductor substrate to the surface of an adhesive surface of a tape with the element forming surface facing upward, and cutting the entire thickness of the semiconductor substrate. To form a cutting groove by etching and a step of smoothing the side wall of the cutting groove of the semiconductor substrate by etching.

【0012】[0012]

【作用】即ち本発明においては、素子形成面を上にして
半導体基板をテープの粘着面の表面に貼付し、この半導
体基板の素子形成面にレジスト膜を形成した後、この半
導体基板に形成しようとする切断溝に対応する位置のレ
ジスト膜を除去し、形成しようとする切断溝の幅よりも
幅の広い開口溝を形成し、形成しようとする切断溝の幅
と略同じ厚さの砥石を用いてこの半導体基板の全厚を切
断して切断溝を形成するので、半導体基板の素子形成面
を保護して半導体基板を切断することができ、その後エ
ッチング処理を行うので、この半導体基板の切断溝の側
壁を平滑にすることが可能となる。
That is, in the present invention, the semiconductor substrate is pasted on the surface of the adhesive surface of the tape with the element forming surface facing upward, a resist film is formed on the element forming surface of the semiconductor substrate, and then the semiconductor substrate is formed on this semiconductor substrate. The resist film at the position corresponding to the cutting groove to be formed is removed, an opening groove having a width wider than the width of the cutting groove to be formed is formed, and a grindstone having substantially the same thickness as the width of the cutting groove to be formed is formed. Since the entire thickness of this semiconductor substrate is cut to form a cutting groove, the semiconductor substrate can be cut by protecting the element formation surface of the semiconductor substrate, and the etching process is performed thereafter. It becomes possible to smooth the side wall of the groove.

【0013】[0013]

【実施例】以下図1〜図2により本発明の一実施例につ
いて詳細に説明する。図1〜図2は本発明による一実施
例の半導体装置の製造方法を工程順に示す図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described in detail below with reference to FIGS. 1 to 2 are views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps.

【0014】本発明による一実施例の半導体装置の製造
方法においては、まず図1(a) に示すように素子形成面
1aを上にして半導体基板1をテープ2の粘着面2aの表面
に貼付し、この半導体基板1の素子形成面1aにレジスト
膜3を形成した後、図1(b)及び(c) に示すようにこの
半導体基板1に形成しようとする切断溝に対応する位置
のレジスト膜3を除去して形成しようとする切断溝の幅
よりも幅の広い開口溝3aを形成し、このテープ2をダイ
サーの載物台4の表面に載置する。
In the method of manufacturing a semiconductor device according to one embodiment of the present invention, first, as shown in FIG.
The semiconductor substrate 1 is attached to the surface of the adhesive surface 2a of the tape 2 with the side 1a facing up, and the resist film 3 is formed on the element forming surface 1a of the semiconductor substrate 1 and then shown in FIGS. 1 (b) and 1 (c). As described above, the resist film 3 at a position corresponding to the cutting groove to be formed on the semiconductor substrate 1 is removed to form an opening groove 3a wider than the width of the cutting groove to be formed, and the tape 2 is used as a dicer. It is placed on the surface of the stage 4.

【0015】つぎに図2(a) に示すように、形成しよう
とする切断溝の幅と同じ厚さのダイサーの高速回転して
いる砥石5を用いてこの半導体基板1の全厚を切断して
切断溝1bを形成すると同時にこのテープ2の表面に切断
溝2bを形成してこの半導体基板1を半導体チップ1cに分
割する。
Next, as shown in FIG. 2 (a), the entire thickness of this semiconductor substrate 1 is cut by using a grindstone 5 of a dicer having the same thickness as the width of a cutting groove to be formed and rotating at a high speed. The semiconductor substrate 1 is divided into semiconductor chips 1c by forming the cutting grooves 1b on the surface of the tape 2 at the same time as forming the cutting grooves 1b.

【0016】このような高速回転する砥石5で半導体基
板1を切断して半導体チップ1cに分割すると、この切断
溝1bの側壁には図2(b) に示すような微小な凹凸が形成
されるので、図2(c) に示すように弗酸を用いるウェッ
トエッチング処理によりこの半導体基板1の切断溝1bの
側壁を平滑にする。
When the semiconductor substrate 1 is cut by the grindstone 5 rotating at such a high speed and divided into the semiconductor chips 1c, minute irregularities as shown in FIG. 2 (b) are formed on the side walls of the cutting groove 1b. Therefore, as shown in FIG. 2C, the side wall of the cut groove 1b of the semiconductor substrate 1 is smoothed by wet etching using hydrofluoric acid.

【0017】最後に図2(d) に示すようにレジスト膜3
を除去し、テープ2から半導体チップ1cを剥離してチッ
プトレイに収納する。このように半導体基板1の表面に
レジスト膜3を形成した後、半導体基板1の切断溝1bを
形成しようとする部分にレジスト膜3の開口溝3aを形成
して半導体基板1を切断して半導体チップ1cに分離する
ので、半導体基板1の素子形成面1aを保護した状態で半
導体基板1を切断することができ、半導体基板1を切断
した後にエッチング処理を行うので、半導体基板1の切
断溝1bの側壁を平滑にすることが可能となる。
Finally, as shown in FIG. 2 (d), the resist film 3
Is removed, the semiconductor chip 1c is peeled off from the tape 2 and stored in the chip tray. After the resist film 3 is formed on the surface of the semiconductor substrate 1 in this way, the opening groove 3a of the resist film 3 is formed in the portion of the semiconductor substrate 1 where the cutting groove 1b is to be formed, and the semiconductor substrate 1 is cut to form a semiconductor. Since it is separated into the chips 1c, the semiconductor substrate 1 can be cut in a state where the element forming surface 1a of the semiconductor substrate 1 is protected, and since the etching process is performed after cutting the semiconductor substrate 1, the cut groove 1b of the semiconductor substrate 1 is cut. It becomes possible to smooth the side wall of the.

【0018】[0018]

【発明の効果】以上の説明から明らかなように、本発明
によれば極めて簡単な工程の改良により、半導体チップ
の側壁にシリコン片が付着して残存するのを防止するこ
とが可能となる利点があり、著しい品質向上の効果が期
待できる半導体装置の製造方法の提供が可能である。
As is apparent from the above description, according to the present invention, it is possible to prevent the silicon pieces from adhering and remaining on the side wall of the semiconductor chip by improving the extremely simple process. Therefore, it is possible to provide a method for manufacturing a semiconductor device, which can be expected to have a significant quality improvement effect.

【図面の簡単な説明】[Brief description of drawings]

【図1】 本発明による一実施例の半導体装置の製造方
法を工程順に示す図(1)
FIG. 1 is a diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in process order (1)

【図2】 本発明による一実施例の半導体装置の製造方
法を工程順に示す図(2)
FIG. 2 is a diagram showing a method of manufacturing a semiconductor device according to an embodiment of the present invention in the order of steps (2)

【図3】 従来の半導体装置の製造方法を工程順に示す
側断面図
FIG. 3 is a side sectional view showing a conventional method of manufacturing a semiconductor device in the order of steps.

【図4】 従来の半導体装置の製造方法の問題点を示す
FIG. 4 is a diagram showing a problem of a conventional method of manufacturing a semiconductor device.

【符号の説明】[Explanation of symbols]

1 半導体基板 1a 素子形成面 1b 切断溝 1c 半導体チップ 1d シリコン片 2 テープ 2a 粘着面 2b 切断溝 3 レジスト膜 3a 開口溝 4 載物台 5 砥石 6 リード 1 semiconductor substrate 1a element forming surface 1b cutting groove 1c semiconductor chip 1d silicon piece 2 tape 2a adhesive surface 2b cutting groove 3 resist film 3a opening groove 4 mounting stage 5 grindstone 6 leads

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 S ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Internal reference number FI technical display area S

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 素子形成面(1a)を上にして半導体基板
(1) をテープ(2) の粘着面(2a)の表面に貼付する工程
と、 前記半導体基板(1) の全厚を切断して切断溝(1b)を形成
する工程と、 エッチング処理により前記半導体基板(1) の切断溝(1b)
の側壁を平滑にする工程と、 を含むことを特徴とする半導体装置の製造方法。
1. A semiconductor substrate with the element formation surface (1a) facing up.
(1) is attached to the surface of the adhesive surface (2a) of the tape (2), a step of cutting the entire thickness of the semiconductor substrate (1) to form a cutting groove (1b), Cut groove (1b) in semiconductor substrate (1)
And a step of smoothing a side wall of the semiconductor device.
【請求項2】 前記半導体基板(1)を切断するに先立っ
て、該半導体基板(1)の切断予定領域を表出するレジス
ト膜(3) を形成し、該半導体基板(1) の切断後に該レジ
スト膜(3) をマスクとして前記エッチング処理を行うこ
とを特徴とする請求項1記載の半導体装置の製造方法。
2. Prior to cutting the semiconductor substrate (1), a resist film (3) exposing a region to be cut of the semiconductor substrate (1) is formed, and after cutting the semiconductor substrate (1). 2. The method for manufacturing a semiconductor device according to claim 1, wherein the etching process is performed using the resist film (3) as a mask.
【請求項3】 前記半導体基板(1) の切断は、前記切断
溝(1b)の幅と略同じ厚さの砥石(5) を用いて行われるも
のであり、前記レジスト膜(3) は、該切断溝(1b)の幅よ
り広い幅を有する開口溝(3a)により前記半導体基板(1)
切断予定領域を表出するものであることを特徴とする請
求項1記載の半導体装置の製造方法。
3. The cutting of the semiconductor substrate (1) is performed using a grindstone (5) having substantially the same thickness as the width of the cutting groove (1b), and the resist film (3) is The semiconductor substrate (1) is provided with an opening groove (3a) having a width wider than that of the cutting groove (1b).
2. The method for manufacturing a semiconductor device according to claim 1, wherein the area to be cut is exposed.
JP45194A 1994-01-07 1994-01-07 Manufacture of semiconductor device Withdrawn JPH07201784A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP45194A JPH07201784A (en) 1994-01-07 1994-01-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP45194A JPH07201784A (en) 1994-01-07 1994-01-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH07201784A true JPH07201784A (en) 1995-08-04

Family

ID=11474161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP45194A Withdrawn JPH07201784A (en) 1994-01-07 1994-01-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH07201784A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1026725A3 (en) * 1999-02-05 2003-01-15 Sharp Kabushiki Kaisha Manufacturing method for a semiconductor device
WO2006048230A1 (en) 2004-11-01 2006-05-11 Xsil Technology Limited Increasing die strength by etching during or after dicing
US9076859B2 (en) 2011-05-19 2015-07-07 Panasonic Intellectual Property Management Co., Ltd. Method of manufacturing semiconductor chips

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1026725A3 (en) * 1999-02-05 2003-01-15 Sharp Kabushiki Kaisha Manufacturing method for a semiconductor device
US6730579B1 (en) 1999-02-05 2004-05-04 Sharp Kabushiki Kaisha Method of manufacturing a semiconductor dice by partially dicing the substrate and subsequent chemical etching
WO2006048230A1 (en) 2004-11-01 2006-05-11 Xsil Technology Limited Increasing die strength by etching during or after dicing
GB2420443A (en) * 2004-11-01 2006-05-24 Xsil Technology Ltd Dicing semiconductor wafers
GB2420443B (en) * 2004-11-01 2009-09-16 Xsil Technology Ltd Increasing die strength by etching during or after dicing
US9076859B2 (en) 2011-05-19 2015-07-07 Panasonic Intellectual Property Management Co., Ltd. Method of manufacturing semiconductor chips

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Effective date: 20010403