JPH07199206A - Liquid crystal display element - Google Patents

Liquid crystal display element

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Publication number
JPH07199206A
JPH07199206A JP35330893A JP35330893A JPH07199206A JP H07199206 A JPH07199206 A JP H07199206A JP 35330893 A JP35330893 A JP 35330893A JP 35330893 A JP35330893 A JP 35330893A JP H07199206 A JPH07199206 A JP H07199206A
Authority
JP
Japan
Prior art keywords
pixels
liquid crystal
boundary
display
crystal display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP35330893A
Other languages
Japanese (ja)
Inventor
Osamu Kimura
修 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP35330893A priority Critical patent/JPH07199206A/en
Publication of JPH07199206A publication Critical patent/JPH07199206A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prevent the occurrence of a display defect in a screen central part by forming pixels in the vicinity of a boundary between a first display part and a second display part smaller than other pixels in the same column. CONSTITUTION:The constitution by one column incorporates a first signal electrode 17, (n) pieces of first scan electrodes 13 intersecting with the electrode 17, a second signal electrode 27, (n) pieces of second scan electrodes 23 intersecting with the electrode 27, (n) pieces of pixels G1-Gn formed on intersections between the first signal electrode 17 and the first scan electrodes 13 and (n) pieces of pixels Gn+1 G2n formed on the intersections between the second signal electrode 27 and the second scan electrodes 23. The pitch T of the pixels G1-G2n is a fixed value, and though it is not changed, the sizes (sizes in the direction of column) of respective pixels are formed so as to be reduced gradually in accordance with approaching to the boundary Xn between the first and second display parts. By such a constitution, no horizontal stripes occurring on the boundary Xn on the screen become conspicuous, and electric field occurs over the whole pixels even when the deviation in a substrate and a patterning defect occur, and the occurrence of the display defect is prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は液晶表示素子に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device.

【0002】[0002]

【従来の技術】従来のマトリクス液晶表示素子の駆動方
式の1つとして分割マトリクス表示方式が知られてい
る。この表示方式は、例えば、走査電極を上側と下側の
2つのグループに分け、各グループに独立分離した信号
電極を割り当てるものである。この方式は、フレーム期
間内における走査電極1本あたりの選択期間が2倍にな
るため、表示画像のコントラスト比が高く、応答速度が
速い等の長所を有する。
2. Description of the Related Art A divided matrix display method is known as one of conventional driving methods for matrix liquid crystal display elements. In this display method, for example, the scanning electrodes are divided into two groups, an upper side and a lower side, and the signal electrodes which are independently separated are assigned to each group. This method has the advantages that the contrast ratio of the display image is high and the response speed is fast because the selection period per scan electrode in the frame period is doubled.

【0003】図4はマトリクス液晶表示素子の1コラム
分の信号電極1A、1B及び画素G1〜Gn、Gn+1〜G2
nを拡大して示す。図示するように、画面の中央、即
ち、2つの表示部の境界部分では、中央の2つの画素G
nとGn+1の間隔Xn内に、信号電極1A,1Bの終端が
位置合わせされなければならない。
FIG. 4 shows signal electrodes 1A and 1B for one column and pixels G1 to Gn and Gn + 1 to G2 for one column of a matrix liquid crystal display element.
The n is shown enlarged. As shown in the figure, at the center of the screen, that is, at the boundary between the two display portions, the two central pixels G
The ends of the signal electrodes 1A and 1B must be aligned within the interval Xn between n and Gn + 1.

【0004】[0004]

【発明が解決しようとする課題】従来の画素G1〜G2n
の間隔X1〜X2n-1は一定であり非常に狭い。このた
め、図5(A)に示すように、両基板に縦方向の位置ず
れが生じた場合や、(B)に示すように、信号電極1
A,1Bを形成する際にITO(Indium Tin Oxide)膜の
パターンニング不良が生じた場合には、信号電極1A,
1Bの終端の画素に電極が重ならない部分が生じるた
め、表示欠陥が発生し、歩留まりが低下するという問題
があった。又、位置合わせずれを考慮して予め終端の画
素同士の間隔を広げると、その部分が暗くなり、画面に
横筋が見えてしまうという問題もあった。この発明は上
記実状に鑑みてなされたもので、画面中央部の表示欠陥
の生じにくい分割マトリクス表示方式の液晶表示素子を
提供することを目的とする。
Conventional pixels G1 to G2n
The interval X1 to X2n-1 is constant and very narrow. Therefore, as shown in FIG. 5 (A), when there is a vertical misalignment between both substrates, or as shown in FIG.
When patterning failure of the ITO (Indium Tin Oxide) film occurs when forming A and 1B, the signal electrodes 1A and
Since there is a portion where the electrodes do not overlap with the pixel at the end of 1B, there is a problem that a display defect occurs and the yield decreases. Further, if the distance between the pixels at the end is widened in advance in consideration of misalignment, that portion becomes dark, and there is a problem that horizontal stripes are visible on the screen. The present invention has been made in view of the above situation, and an object of the present invention is to provide a liquid crystal display element of a split matrix display system in which a display defect in the central portion of the screen is unlikely to occur.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するた
め、この発明にかかる液晶表示素子は、複数の第1の走
査電極と第1の信号電極と、前記第1の走査電極と前記
第1の信号電極との交差部分に形成される画素とより構
成される第1の表示部と、複数の第2の走査電極と第2
の信号電極と、前記第2の走査電極と前記第2の信号電
極との交差部分に形成される画素より構成され、前記第
1の表示部と共に1つの画面を形成する第2の表示部と
を備える分割マトリクス方式の液晶表示素子において、
前記第1の表示部と前記第2の表示部との境界近傍の画
素は同一コラムの他の画素よりも小さく形成されている
ことを特徴とする。
In order to achieve the above object, a liquid crystal display element according to the present invention comprises a plurality of first scanning electrodes, first signal electrodes, the first scanning electrodes and the first scanning electrodes. A first display portion including a pixel formed at an intersection with the signal electrode of the second scanning electrode, a plurality of second scanning electrodes, and a second scanning electrode.
And a second display portion which is formed of a pixel formed at an intersection of the second scanning electrode and the second signal electrode and which forms one screen together with the first display portion. In a divided matrix type liquid crystal display device including
A pixel in the vicinity of the boundary between the first display portion and the second display portion is formed smaller than other pixels in the same column.

【0006】[0006]

【作用】この発明によれば、第1の表示部と第2の表示
部とから1つの画面が形成される分割マトリクス表示方
式の液晶表示素子において、第1の表示部と第2の表示
部の境界近傍の画素は同一コラムの他の画素よりも小さ
く形成されている。このような構成によれば、位置合わ
せ、製造時のエッチング不良等が発生しても、境界近傍
の画素が走査電極と信号電極との交差部からはみ出す確
率が減少し、液晶表示素子の製造時の歩留まりが向上す
る。また、画素の面積を徐々に変化させているので、前
記第1の表示部と前記第2の表示部との間隔に見える筋
が目立たなくなるため、表示品質には影響を与えない。
According to the present invention, in the liquid crystal display element of the split matrix display system in which one screen is formed from the first display section and the second display section, the first display section and the second display section are provided. The pixels near the boundary of are formed smaller than other pixels in the same column. According to such a configuration, even if an alignment defect, an etching defect during manufacturing, or the like occurs, the probability that pixels in the vicinity of the boundary will protrude from the intersection of the scanning electrode and the signal electrode is reduced. Yield is improved. Moreover, since the area of the pixel is gradually changed, the line that appears in the interval between the first display section and the second display section becomes inconspicuous, so that the display quality is not affected.

【0007】境界近傍の画素を同一コラムの他の画素よ
りも小さく形成する具体的手法としては、例えば、画素
のピッチを同一とし、各画素の間隔を境界近傍ほど大き
くなるようにしてもよく、或いは、例えば、画素のピッ
チと各画素の間隔がほぼ等しい部分と、画素のピッチが
同一で、各画素の間隔が境界に近づくほど大きくなる部
分を配置するようにしてもよい。
As a concrete method for forming the pixels near the boundary smaller than the other pixels in the same column, for example, the pitch of the pixels may be the same, and the interval between the pixels may be increased toward the boundary. Alternatively, for example, a portion in which the pixel pitch and the interval between the pixels are substantially equal to each other and a portion in which the pixel pitch is the same and the interval between the pixels increases toward the boundary may be arranged.

【0008】[0008]

【実施例】この発明の実施例に係る分割マトリクスタイ
プの液晶表示素子を図面を参照して説明する。 (第1実施例)本実施例の分割マトリクスタイプの液晶
表示素子の全体の基本構成を図2に示す。図示するよう
に、この液晶表示素子は、走査ドライバ11と、この走
査ドライバ11に接続された走査電極13と、第1の信
号ドライバ15と、第1の信号ドライバ15に接続され
たn本の第1の信号電極17と、第1の走査電極と第1
の信号電極との交差部に形成される画素(図示せず)よ
りなる第1の表示部19と、 走査ドライバ11に第1
の走査電極13と並列して接続されたn本の第2の走査
電極23と、第2の信号ドライバ25と、この第2の信
号ドライバ25に接続された第2の信号電極27と、第
2の走査電極と第2の信号電極との交差部に形成される
画素(図示せず)とより形成される第2の表示部29と
から構成され、全体として1つの表示部を構成する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A split matrix type liquid crystal display element according to an embodiment of the present invention will be described with reference to the drawings. (First Embodiment) FIG. 2 shows the entire basic configuration of a divided matrix type liquid crystal display device of the present embodiment. As shown in the figure, this liquid crystal display element includes a scan driver 11, a scan electrode 13 connected to the scan driver 11, a first signal driver 15, and n lines connected to the first signal driver 15. The first signal electrode 17, the first scan electrode and the first
A first display portion 19 including pixels (not shown) formed at the intersection with the signal electrode of
Second scan electrodes 23 connected in parallel with the second scan electrodes 13, second signal drivers 25, second signal electrodes 27 connected to the second signal drivers 25, The second display unit 29 is formed of pixels (not shown) formed at the intersections of the two scanning electrodes and the second signal electrodes, and constitutes one display unit as a whole.

【0009】上記構成においては、液晶表示素子の一方
の透明基板に信号電極を形成し、他方の透明基板に走査
電極と画素以外の部分を光遮蔽する光遮蔽層とを形成
し、画素部分以外には、遮光処理が施されている。
In the above structure, the signal electrode is formed on one transparent substrate of the liquid crystal display element, the scanning electrode and the light shielding layer for shielding the portion other than the pixel are formed on the other transparent substrate, and the signal electrode is formed on the other transparent substrate. Is light-shielded.

【0010】図1はこの実施例の液晶表示素子の1コラ
ム分の構成を示す。図示するように、1コラム分の構成
は、第1の信号電極17と、第1の信号電極17に交差
するn本の第1の走査電極13(一部のみ示す)と、第
2の信号電極27と、第2の信号電極27に交差するn
本の第2の走査電極23(一部のみ示す)と、第1の信
号電極17と第1の走査電極13の交差部に形成される
n個の画素G1〜Gnと、第2の信号電極27と第2の走
査電極23の交差部に形成されるn個の画素Gn+1〜G2
nとを含む。各画素は、物理的には、対向する信号電極
と走査電極と、それらの間に配置された液晶、及び光遮
蔽膜に形成された矩形状の開口より構成される。
FIG. 1 shows the structure of one column of the liquid crystal display element of this embodiment. As shown in the figure, the configuration for one column includes a first signal electrode 17, n first scanning electrodes 13 (only part of which are shown) intersecting the first signal electrode 17, and a second signal electrode. N intersecting the electrode 27 and the second signal electrode 27
Second scan electrode 23 (only part of which is shown), n pixels G1 to Gn formed at the intersections of first signal electrode 17 and first scan electrode 13, and second signal electrode N pixels Gn + 1 to G2 formed at the intersection of the second scan electrode 23 and the second scan electrode 23.
Including n and. Each pixel is physically composed of a signal electrode and a scanning electrode facing each other, a liquid crystal arranged between them, and a rectangular opening formed in the light shielding film.

【0011】図1において、画素G1〜G2nのピッチT
は一定値であり、変化しないが、画素のサイズ(幅)W
m(m=1、2、・・・、n、・・・、2n)と画素と画素の間
隔Xm(m=1、2、・・・、n、・・・、2n-1)は、次式
(1)、(2)を満足するように設定されている。
In FIG. 1, the pitch T of the pixels G1 to G2n is
Is a constant value and does not change, but the pixel size (width) W
m (m = 1, 2, ..., N, ..., 2n) and the pixel-to-pixel spacing Xm (m = 1, 2, ..., N, ..., 2n-1) It is set to satisfy the following expressions (1) and (2).

【0012】W1 >W2 >・・・>Wn Wn+1<Wn+2<・・・<W2n ・・・(1)W1> W2> ...> Wn Wn + 1 <Wn + 2 <... <W2n (1)

【0013】X1 <X2 <・・・<Xn Xn >Xn+1>・・・>X2n-1 ・・・(2)X1 <X2 <... <Xn Xn> Xn + 1> ...> X2n-1 (2)

【0014】即ち、第1の信号電極17及び第2の信号
電極27の終端に近づくに従って光り遮蔽膜による遮蔽
面積が大きくなる。従って、本実施例においては、各画
素のサイズ(コラム方向のサイズ)が第1と第2の表示
部19と29の境界に近づくに従って、徐々に小さくな
るように形成されている。
That is, the shield area of the light shielding film increases as the ends of the first signal electrode 17 and the second signal electrode 27 are approached. Therefore, in this embodiment, the size of each pixel (the size in the column direction) is gradually reduced as it approaches the boundary between the first and second display portions 19 and 29.

【0015】このような構成のよれば、画面の境界(X
n)に生ずる横筋が目立たないと共に基板の縦方向の位
置合わせにずれが生じたり、信号電極のパターンニング
不良が発生しても、境界近傍の画素が小さいため、信号
電極が画素を覆うことができ、画素全体に電界を生じさ
せることができるので、表示欠陥が生じない。
According to such a configuration, the screen boundary (X
Even if the horizontal stripes generated in n) are not conspicuous, the vertical alignment of the substrate is misaligned, or the patterning of the signal electrode is defective, the pixel near the boundary is small, so the signal electrode may cover the pixel. Since it is possible to generate an electric field in the entire pixel, no display defect occurs.

【0016】(第2実施例)図3は、この発明の第2実
施例にかかる液晶表示素子の1コラム分の構成を示す。
なお、本実施例の分割マトリクスタイプの液晶表示素子
の全体の構成は図2に示す第1実施例の構成と同一であ
る。
(Second Embodiment) FIG. 3 shows the structure of one column of a liquid crystal display element according to the second embodiment of the present invention.
The overall structure of the divided matrix type liquid crystal display device of this embodiment is the same as that of the first embodiment shown in FIG.

【0017】図3に示すように、この実施例では、画素
G1〜G2nのピッチRは一定である。画素G1〜Gpのサ
イズ(幅)W1〜Wpが一定であり、画素Gp〜Gnのサイ
ズWp〜Wnが順次小さくなり、画素Gn+1〜Gqのサイズ
Wn+1〜Wqが順次大きくなり、画素Gq〜G2nのサイズ
Wq〜W2nが一定である。また、画素G1〜G2n間の距離
X1〜Xp-1が一定であり、Xpー1〜Xnが順次大きくな
り、Xn+1〜Xqが順次小さくなり、Xq〜X2n-1が一定
である。この関係は、(3)、(4)式で表される。
As shown in FIG. 3, in this embodiment, the pitch R of the pixels G1 to G2n is constant. The size (width) W1 to Wp of the pixels G1 to Gp is constant, the sizes Wp to Wn of the pixels Gp to Gn sequentially decrease, and the sizes Wn + 1 to Wq of the pixels Gn + 1 to Gq sequentially increase, and the pixels The sizes Wq to W2n of Gq to G2n are constant. Further, the distances X1 to Xp-1 between the pixels G1 to G2n are constant, Xp-1 to Xn sequentially increase, Xn + 1 to Xq gradually decrease, and Xq to X2n-1 are constant. This relationship is expressed by equations (3) and (4).

【0018】 W1 =W2=・・・=Wp>Wp+1>Wp+2>・・・>Wn-1>Wn W2n=W2n-1・・・=Wq>Wq-1>Wq-2>・・・>Wn+2>Wn+1 ・・・(3)W1 = W2 = ... = Wp> Wp + 1> Wp + 2> ...> Wn-1> Wn W2n = W2n-1 ... = Wq> Wq-1> Wq-2>.・ ・ > Wn + 2 > Wn + 1 ・ ・ ・ (3)

【0019】 X1=X2=・・・=Xp-1<Xp<・・・<Xn Xn>Xn+1>・・・>Xq=Xq+1=・・・=X2n-1 ・・・(4)X1 = X2 = ... = Xp-1 <Xp <... <Xn Xn> Xn + 1> ...> Xq = Xq + 1 = ... = X2n-1 (4 )

【0020】このような構成においても、画面の境界
(Xn)に生ずる横筋が目立たないと共に基板の位置合
わせにずれ等が生じても境界近傍の画素が交差部内に位
置しやすくなり、表示品質の劣化が抑えられる。
Even in such a configuration, the horizontal stripes generated at the boundary (Xn) of the screen are inconspicuous, and even if the alignment of the substrate is misaligned, pixels near the boundary are likely to be located in the intersection, and the display quality is improved. Deterioration is suppressed.

【0021】なお、第1及び第2実施例において、第1
の表示部と第2の表示部の境界を対象軸として、画素の
サイズ及び間隔を対象にする、即ち、W1=W2n、W2=
W2n-1、・・・、Wn=Wn+1、と設定することが望まし
い。
In the first and second embodiments, the first
The pixel size and the interval are targeted with the boundary between the display unit and the second display unit as the target axis, that is, W1 = W2n, W2 =
It is desirable to set W2n-1, ..., Wn = Wn + 1.

【0022】なお、上記実施例においては、光遮蔽層の
面積をそれぞれ調整することにより、各開口のサイズ、
即ち、各画素の面積を決定したが、信号電極と走査電極
の交差部分が直接画素となる場合には、走査電極の幅と
間隔を変更することにより上記実施例と同様の効果が得
られる。なお、画素サイズを変更させる手法は上記実施
例に限定されない。第1の表示部と第2の表示部との境
界近傍の画素を小さく形成できるならば、他の手法を使
用してもよい。但し、表示画面の一部が歪んだ印象を与
える等の表示品質の劣化を招く手法は避ける必要があ
る。
In the above embodiment, the size of each opening is adjusted by adjusting the area of the light shielding layer.
That is, although the area of each pixel is determined, when the intersection of the signal electrode and the scanning electrode directly becomes the pixel, the same effect as that of the above-described embodiment can be obtained by changing the width and the interval of the scanning electrode. The method of changing the pixel size is not limited to the above embodiment. Other methods may be used as long as the pixels near the boundary between the first display portion and the second display portion can be formed small. However, it is necessary to avoid a method that causes deterioration of display quality, such as giving an impression that a part of the display screen is distorted.

【0023】以上説明したように、この実施例の液晶表
示素子によれば、分割マトリクス型の液晶表示素子の第
1の表示部と第2の表示部との境界近傍の画素を他の画
素(境界から離れた位置の画素)よりも小さく形成した
ので、基板の位置合わせ(縦方向)のずれや信号電極の
パターンニング不良等が存在する場合でも、画素が信号
電極と走査電極との交差部上に位置し、表示欠陥が防止
され、分割マトリクスの方式の液晶表示素子を使用する
種々の装置、例えば、投影型プロジェクタ、OHP、H
UDに利用できる。
As described above, according to the liquid crystal display element of this embodiment, the pixel near the boundary between the first display portion and the second display portion of the divided matrix type liquid crystal display element is replaced with another pixel ( Since it is formed smaller than the pixel at the position away from the boundary, even if there is a misalignment of the substrate alignment (vertical direction) or a patterning failure of the signal electrode, the pixel intersects the signal electrode and the scanning electrode. Various devices, such as projection type projectors, OHPs, and Hs, which are located on the upper side, prevent display defects, and use a liquid crystal display device of a divided matrix system.
Available for UD.

【0024】[0024]

【発明の効果】この発明によれば、分割マトリクス方式
の液晶表示素子の表示欠陥の発生を防止又は低減でき、
歩留まりを向上できる。
According to the present invention, it is possible to prevent or reduce the occurrence of display defects in a divided matrix type liquid crystal display device,
The yield can be improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の第1実施例にかかる液晶表示素子の
1コラム分の構成を示す図である。
FIG. 1 is a diagram showing a configuration of one column of a liquid crystal display element according to a first embodiment of the present invention.

【図2】分割マトリクス型液晶表示素子の構成を示す図
である。
FIG. 2 is a diagram showing a configuration of a split matrix type liquid crystal display element.

【図3】この発明の第2実施例にかかる液晶表示素子の
1コラム分の構成を示す図である。
FIG. 3 is a diagram showing a configuration for one column of a liquid crystal display element according to a second embodiment of the present invention.

【図4】従来の分割マトリクス型の液晶表示素子の1コ
ラム分の構成を示す図である。
FIG. 4 is a diagram showing a configuration of one column of a conventional split matrix type liquid crystal display element.

【図5】従来の分割マトリクス型の液晶表示素子の信号
電極の端部近傍の構成を示す図であり、(A)は基板の
位置ずれが生じた場合の例、(B)は信号電極のパター
ンニング不良が生じた場合の例を示す。
5A and 5B are diagrams showing a configuration in the vicinity of an end portion of a signal electrode of a conventional split matrix type liquid crystal display element, in which FIG. An example of a case where a patterning failure occurs will be shown.

【符号の説明】[Explanation of symbols]

11・・・走査ドライバ、13・・・走査電極、15・・・第1
の信号ドライバ、17・・・信号電極、19・・・第1の表示
部、23・・・走査電極、25・・・第2の信号ドライバ、2
7・・・信号電極、29・・・第2の表示部、G1〜G2n・・・画
11 ... Scan driver, 13 ... Scan electrode, 15 ... First
Signal driver, 17 ... signal electrode, 19 ... first display portion, 23 ... scanning electrode, 25 ... second signal driver, 2
7 ... Signal electrode, 29 ... Second display portion, G1 to G2n ... Pixel

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】複数の第1の走査電極と、複数の第1の信
号電極と、前記第1の走査電極と前記第1の信号電極と
の交差部分に形成される画素とより構成される第1の表
示部と、 複数の第2の走査電極と、複数の第2の信号電極と、前
記第2の走査電極と前記第2の信号電極との交差部分に
形成される画素とより構成され、前記第1の表示部と共
に1つの画面を形成する第2の表示部とを備える分割マ
トリクス方式の液晶表示素子において、 前記第1の表示部と前記第2の表示部との境界近傍の画
素は同一コラムの他の画素よりも小さく形成されている
ことを特徴とする分割マトリクスタイプの液晶表示素
子。
1. A plurality of first scanning electrodes, a plurality of first signal electrodes, and pixels formed at intersections of the first scanning electrodes and the first signal electrodes. A first display portion, a plurality of second scanning electrodes, a plurality of second signal electrodes, and pixels formed at intersections of the second scanning electrodes and the second signal electrodes. In the liquid crystal display element of the split matrix system, which comprises a second display section that forms one screen together with the first display section, a liquid crystal display element in the vicinity of the boundary between the first display section and the second display section is provided. A divided-matrix liquid crystal display element characterized in that pixels are formed smaller than other pixels in the same column.
【請求項2】各コラムの画素は、画素のピッチが同一
で、各画素の間隔が前記第1の表示部と前記第2の表示
部との境界近傍ほど大きいことを特徴とする請求項1記
載の液晶表示素子。
2. The pixels in each column have the same pixel pitch, and the interval between the pixels is larger near the boundary between the first display section and the second display section. The liquid crystal display element described.
【請求項3】各コラムの画素は、画素のピッチ及び各画
素の間隔が一定の部分と、画素のピッチが一定で、画素
の間隔が前記第1の表示部と前記第2の表示部との境界
に近づくほど大きくなる部分とを備えることを特徴とす
る請求項1記載の液晶表示素子。
3. A pixel in each column has a portion in which the pixel pitch and the interval between pixels are constant, and a portion in which the pixel pitch is constant and the pixel interval is the first display portion and the second display portion. 2. The liquid crystal display element according to claim 1, further comprising a portion that becomes larger as it gets closer to the boundary.
JP35330893A 1993-12-30 1993-12-30 Liquid crystal display element Pending JPH07199206A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP35330893A JPH07199206A (en) 1993-12-30 1993-12-30 Liquid crystal display element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35330893A JPH07199206A (en) 1993-12-30 1993-12-30 Liquid crystal display element

Publications (1)

Publication Number Publication Date
JPH07199206A true JPH07199206A (en) 1995-08-04

Family

ID=18429970

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35330893A Pending JPH07199206A (en) 1993-12-30 1993-12-30 Liquid crystal display element

Country Status (1)

Country Link
JP (1) JPH07199206A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999065010A1 (en) * 1998-06-10 1999-12-16 Matsushita Electric Industrial Co., Ltd. Display device
KR100917722B1 (en) * 2000-12-15 2009-09-15 티피오 홍콩 홀딩 리미티드 Active matrix device with reduced power consumption and liquid crystal display comprising such an active matrix device
JP2020531914A (en) * 2017-08-25 2020-11-05 武漢華星光電半導体顕示技術有限公司Wuhan China Star Optoelectronics Semiconductor Disolay Technology Co.,Ltd AMOLED display panel and display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999065010A1 (en) * 1998-06-10 1999-12-16 Matsushita Electric Industrial Co., Ltd. Display device
KR100917722B1 (en) * 2000-12-15 2009-09-15 티피오 홍콩 홀딩 리미티드 Active matrix device with reduced power consumption and liquid crystal display comprising such an active matrix device
JP2020531914A (en) * 2017-08-25 2020-11-05 武漢華星光電半導体顕示技術有限公司Wuhan China Star Optoelectronics Semiconductor Disolay Technology Co.,Ltd AMOLED display panel and display device

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