JPH07193131A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPH07193131A
JPH07193131A JP34827893A JP34827893A JPH07193131A JP H07193131 A JPH07193131 A JP H07193131A JP 34827893 A JP34827893 A JP 34827893A JP 34827893 A JP34827893 A JP 34827893A JP H07193131 A JPH07193131 A JP H07193131A
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor
circuit device
semiconductor integrated
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP34827893A
Other languages
Japanese (ja)
Other versions
JP2765467B2 (en
Inventor
Hitoshi Saito
仁 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5348278A priority Critical patent/JP2765467B2/en
Publication of JPH07193131A publication Critical patent/JPH07193131A/en
Application granted granted Critical
Publication of JP2765467B2 publication Critical patent/JP2765467B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To discriminate the type of a packaged semiconductor integrated circuit device and effectively use a terminal pin. CONSTITUTION:Power source lines VE1 and VE2, which have the same potential, are electrically separated in the semiconductor pellets 11, 12 and 12 for each type, and resistances R1, R2 and R3 which have the specific resistance value for each type are connected between the power source lines VE1 and VE2. Even after the semiconductor pellet is packaged, when the resistance value between the terminal pins L1 and L2 connected to the pads P1 and P2 which are connected to the power source lines VE1 and VE2 is measured, the type of the semiconductor integrated circuit device is discriminated based on the resistance value. An exclusive terminal pin for discriminating the type is not necessary arranged and the terminal pin is effectively used.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体集積回路装置に関
し、特に半導体ペレット組立後の検査工程におけるペレ
ットの識別を簡易化した半導体集積回路装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device, and more particularly to a semiconductor integrated circuit device which simplifies identification of pellets in an inspection process after assembling semiconductor pellets.

【0002】[0002]

【従来の技術】従来、半導体集積回路装置を少量多品種
で製造する場合に、1枚のウェハ上に複数種類の半導体
集積回路装置を製造する場合がある。この場合、ウェハ
を個々の半導体ペレットに切断した上で、かく半導体ペ
レットを組み立てる際に、同品種の半導体ペレットのみ
を選択して組み立てればその後の処理が簡略化される
が、この方法では同品種の半導体ペレットを選択する作
業に多大な工数がかかり、コスト高になるという問題が
ある。また、各品種の半導体ペレットを混ぜた状態で組
み立てを行い、組み立て後に半導体ペレットの選別を行
うことが考えられる。
2. Description of the Related Art Heretofore, in the case of manufacturing a small number of semiconductor integrated circuit devices in a large variety, there are cases where a plurality of types of semiconductor integrated circuit devices are manufactured on one wafer. In this case, after assembling the semiconductor pellets after cutting the wafer into individual semiconductor pellets, if only the semiconductor pellets of the same type are selected and assembled, the subsequent process is simplified. There is a problem in that a large number of man-hours are required for the work of selecting the semiconductor pellet, and the cost becomes high. Further, it is considered that the semiconductor pellets of each kind are assembled in a mixed state and the semiconductor pellets are selected after the assembly.

【0003】この際の選別方法として、特開昭63−1
22242号公報に記載されているものがある。この方
法は、図2(a)に示すように、例えば同一ウェハ2上
に3種類の半導体ペレット21,22,23が形成され
ているものとする。各半導体ペレット21,22,23
に設けられているテストパッドPTと接地線VEとの間
には、各品種の固有の抵抗値の抵抗R1,R2,R3の
いずれかが接続されている。したがって、パッケージを
行って半導体集積回路装置を組み立てた後に、図2
(b)のように、テストパッドTPと接地線VEにつな
がる接地パッドPEの各端子ピンL3,L4の間の抵抗
値を抵抗値測定器TESTにより測定すれば、品種を選
別することが可能である。
As a sorting method in this case, Japanese Patent Laid-Open No. 63-1
There is one described in Japanese Patent No. 22242. In this method, as shown in FIG. 2A, for example, three types of semiconductor pellets 21, 22, and 23 are formed on the same wafer 2. Each semiconductor pellet 21, 22, 23
Between the test pad PT and the ground line VE provided in the above, one of the resistors R1, R2, and R3 having a resistance value unique to each product type is connected. Therefore, after packaging and assembling the semiconductor integrated circuit device,
As shown in (b), if the resistance value between the terminal pads L3 and L4 of the test pad TP and the ground pad PE connected to the ground line VE is measured by the resistance value measuring device TEST, it is possible to select the product type. is there.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、この方
法ではテストパッドTPと接地線VEとを抵抗値測定器
TESTに接続するためには、テストパッドTPと接地
パッドPEをそれぞれ半導体集積回路装置の端子ピンL
3,L4に接続しなければならない。このため、接地ピ
ンL4は半導体集積回路装置の接地用として利用できる
が、テストパッドを接続した端子ピンL3は品種選別専
用のものとなり、品種選別後における実際の動作には不
要のものとなり、これにより高集積化で多ピン化の半導
体集積回路装置ではピンの有効利用を図る上での障害に
なるという問題がある。本発明の目的は、製造後におけ
る品種の選別を可能とする一方で端子ピンの有効利用を
図った半導体集積回路装置を提供することにある。
However, in this method, in order to connect the test pad TP and the ground line VE to the resistance value measuring device TEST, the test pad TP and the ground pad PE are respectively connected to the terminals of the semiconductor integrated circuit device. Pin L
3, must be connected to L4. Therefore, the ground pin L4 can be used for grounding the semiconductor integrated circuit device, but the terminal pin L3 to which the test pad is connected is dedicated to product selection, and is unnecessary for actual operation after product selection. Therefore, a semiconductor integrated circuit device having a high degree of integration and a large number of pins has a problem that it is an obstacle to effective use of the pins. An object of the present invention is to provide a semiconductor integrated circuit device which enables effective selection of terminal pins while enabling selection of types after manufacturing.

【0005】[0005]

【課題を解決するための手段】本発明は、1つの半導体
ペレット内に電気的に分離されている同電位の電源線を
有し、前記半導体ペレットがパッケージされたときに前
記各電源線がそれぞれ個別に端子ピンに接続されてなる
半導体集積回路装置において、各電源線の間には、半導
体集積回路装置の品種に特有の抵抗値を有する抵抗を接
続した構成とする。また、各電源線と抵抗を接続する配
線の少なくとも一部を、過電流により溶断されるように
構成することが好ましい。ここで、各半導体ペレットに
は、品種数に相当する数の異なる抵抗ちの抵抗が形成さ
れ、これらの抵抗を品種毎に選択して各電源線に接続す
る構成、あるいは各半導体ペレットには、品種毎にそれ
ぞれ抵抗値の異なる抵抗が形成される構成が採用され
る。また、電源線は低電位側電源線としての接地線であ
ってもよいことは言うまでもない。
SUMMARY OF THE INVENTION The present invention has a power line of the same potential that is electrically isolated in one semiconductor pellet, and when the semiconductor pellet is packaged, each power line is In a semiconductor integrated circuit device that is individually connected to terminal pins, a resistor having a resistance value peculiar to the type of semiconductor integrated circuit device is connected between each power supply line. Further, it is preferable that at least a part of the wiring that connects each power supply line to the resistor is blown by an overcurrent. Here, each semiconductor pellet is formed with a number of resistors having different resistances corresponding to the number of types, and a configuration in which these resistors are selected for each type and connected to each power line, or each semiconductor pellet has a type A configuration is adopted in which resistors having different resistance values are formed for each. Further, it goes without saying that the power supply line may be a ground line as a low potential side power supply line.

【0006】[0006]

【作用】半導体ペレットがパッケージされた半導体集積
回路装置として構成された状態でも、2本の同電位の電
源用の端子ピン間の抵抗値を測定すれば、その抵抗値に
基づいてその半導体集積回路装置の品種を選別すること
が可能となり、品種識別用の専用の端子ピンを設ける必
要がなく、端子ピンの有効利用が図られる。また、品種
の選別後に過電流により線路を溶断して抵抗を電源線か
ら切り離すことで、各電源線間の干渉を防止する。
Even if the semiconductor pellet is packaged as a semiconductor integrated circuit device, if the resistance value between the two terminal pins for the power supply of the same potential is measured, the semiconductor integrated circuit is obtained based on the resistance value. It becomes possible to select the type of the device, and it is not necessary to provide a dedicated terminal pin for identifying the type, and the terminal pin can be effectively used. Further, after selecting the product type, the line is melted by an overcurrent to separate the resistor from the power supply line, thereby preventing interference between the power supply lines.

【0007】[0007]

【実施例】次に、本発明について図面を参照して説明す
る。図1(a)は本発明の半導体集積回路装置の一実施
例を示す図である。半導体ウェハ1には複数品種の半導
体ペレット11,12,13が形成されており、各半導
体ペレット11,12,13はその後の工程で個々の半
導体ペレットに切断分離され、それぞれ独立してパッケ
ージが行われ、個々の半導体集積回路装置として構成さ
れるものである。ここで、前記各半導体ペレット11,
12,13の回路に設けられる電源線は、通常各回路ブ
ロック間の干渉を防止するために、回路ブロック毎に別
々に分離して配設することが一般的に行われている。こ
の例では、低電位側の電源線としての接地線が2つの接
地線VE1,VE2に分離されており、それぞれが別個
の接地パッドP1,P2に接続されている。したがっ
て、この構成の半導体ペレットを半導体集積回路装置と
してパッケージを行ったときには、各接地パッドP1,
P2はそれぞれ個別の端子ピンに接続されることなる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1A is a diagram showing an embodiment of a semiconductor integrated circuit device of the present invention. A plurality of types of semiconductor pellets 11, 12, and 13 are formed on the semiconductor wafer 1, and each semiconductor pellet 11, 12, and 13 is cut and separated into individual semiconductor pellets in a subsequent process, and each package is independently processed. That is, it is configured as an individual semiconductor integrated circuit device. Here, the semiconductor pellets 11,
The power supply lines provided in the circuits 12 and 13 are generally arranged separately for each circuit block in order to prevent interference between the circuit blocks. In this example, the ground line as the power line on the low potential side is separated into two ground lines VE1 and VE2, which are connected to separate ground pads P1 and P2. Therefore, when the semiconductor pellet having this structure is packaged as a semiconductor integrated circuit device, each ground pad P1,
P2 will be connected to each individual terminal pin.

【0008】そして、前記半導体ウェハ1に形成された
各半導体ペレット11,12,13では、この2本の接
地線VE1,VE2の間に抵抗R1,R2,R3のいず
れかを接続している。この場合、これらの抵抗R1,R
2,R3の抵抗値は、半導体ペレットの品種に応じて特
定の値のものが設定される。この実施例では、各半導体
ペレット11,12,13はそれぞれ異なる抵抗値の各
抵抗R1,R2,R3を各半導体ペレット11,12,
13にそれぞれ接続するように、各配線を相違させるこ
とで実現している。また、この実施例では、この抵抗R
1,R2,R3と接地線VE1,VE2とを接続する線
の幅を充分に細く形成しており、過電流が印加されたと
きには容易に溶断されるように構成されている。
In each of the semiconductor pellets 11, 12 and 13 formed on the semiconductor wafer 1, one of the resistors R1, R2 and R3 is connected between the two ground lines VE1 and VE2. In this case, these resistors R1 and R
The resistance values of R2 and R3 are set to specific values according to the type of semiconductor pellet. In this embodiment, each of the semiconductor pellets 11, 12, and 13 has a resistor R1, R2, R3 having a different resistance value.
This is realized by making each wiring different so as to be connected to each. Further, in this embodiment, the resistance R
The width of the line connecting 1, R2, R3 and the ground lines VE1, VE2 is formed to be sufficiently thin so that they are easily blown when an overcurrent is applied.

【0009】したがって、この半導体ウェハ1を個々の
半導体ペレット11,12,13に切断分離し、異種の
半導体ペレットを一括して組み立てを行ない、図1
(b)のように、それぞれ半導体集積回路装置ICを形
成する。。その後に、前記2つの接地線VE1,VE2
に接続されている2本の接地パッドP1,P2、即ち端
子ピンL1,L2の間の抵抗値を抵抗値測定器TEST
で測定すれば、その抵抗値によって半導体ペレットの品
種を容易に選別することができる。なお、2つの接地線
VE1,VE2は通常ではそれぞれ接地されて同電位と
されるものであるから、両端子ピン間に抵抗が接続され
ていても問題になることは少ない。また、仮に各接地線
を含む回路ブロック間の独立性が要求されて、抵抗を介
して回路ブロック間の干渉が影響されるおそがあるとき
には、両端子ピン間に過電流を通流すれば、抵抗と接地
線とを接続する細い線が溶断されるため、このような干
渉を防止することができる。
Therefore, this semiconductor wafer 1 is cut and separated into individual semiconductor pellets 11, 12, and 13, and different types of semiconductor pellets are collectively assembled.
As shown in (b), each semiconductor integrated circuit device IC is formed. . After that, the two ground lines VE1 and VE2
The resistance value between the two ground pads P1 and P2, that is, the terminal pins L1 and L2 connected to the
According to the resistance value, the type of semiconductor pellet can be easily selected. Since the two ground lines VE1 and VE2 are normally grounded to the same potential, there is little problem even if a resistor is connected between both terminal pins. Further, if independence between circuit blocks including each ground line is required, and there is a possibility that interference between circuit blocks will be affected via a resistor, if an overcurrent is passed between both terminal pins, Since a thin wire that connects the resistor and the ground wire is blown, such interference can be prevented.

【0010】したがって、この半導体集積回路装置で
は、本来的に設けられる同電位の端子ピンを利用するこ
とで半導体ペレットの品種を選別することが可能となる
ため、品種選別のための端子ピンを特別に設ける必要が
ない。このため、高集積化、多ピン化の半導体集積回路
における端子ピンの有効利用を図ることができる。特
に、マスタスライス等のように、同一のウェハに複数種
類の半導体ペレットを形成する場合に、形成された全て
の半導体ペレットを同一工程でパッケージして半導体集
積回路装置を製造した後でも、各半導体集積回路装置の
品種を簡単に選別でき、前記した端子ピンの有効利用を
図るとともに、製造コストを低減することができる。
Therefore, in this semiconductor integrated circuit device, since it is possible to select the type of the semiconductor pellet by using the terminal pin of the same potential which is originally provided, the terminal pin for selecting the type is special. There is no need to install it in. Therefore, it is possible to effectively utilize the terminal pins in the highly integrated and multi-pin semiconductor integrated circuit. In particular, when a plurality of types of semiconductor pellets are formed on the same wafer, such as a master slice, even after the semiconductor integrated circuit device is manufactured by packaging all the formed semiconductor pellets in the same process. The type of integrated circuit device can be easily selected, the above-described terminal pins can be effectively used, and the manufacturing cost can be reduced.

【0011】なお、前記実施例では2本の接地線の間に
抵抗を接続しているが、高電位側の電源線を2本有する
場合には、これらの電源線間に抵抗を接続するように構
成してもよい。また、前記実施例では各半導体ペレット
に抵抗値が異なる抵抗を形成してこれを選択している
が、スペース的な制約を受ける場合には、各品種の半導
体ペレットにそれぞれ抵抗値が異なる1個の抵抗を形成
するようにしてもよい。この抵抗値の異なる抵抗を製造
する方法は、例えば多結晶シリコンで抵抗を形成する場
合には、その多結晶シリコン膜の縦横寸法を各品種毎に
相違させることで容易に実現することができる。即ち、
多結晶シリコン膜をパターニングする際のマスク形状を
各品種で相違させるだけでよい。
Although the resistor is connected between the two ground lines in the above embodiment, when two power lines on the high potential side are provided, the resistor should be connected between these power lines. You may comprise. In addition, in the above-described embodiment, resistors having different resistance values are formed and selected for each semiconductor pellet, but when space restrictions are imposed, one resistance value is different for each type of semiconductor pellets. May be formed. This method of manufacturing resistors having different resistance values can be easily realized by, for example, when the resistors are made of polycrystalline silicon, by making the vertical and horizontal dimensions of the polycrystalline silicon film different for each kind. That is,
It suffices that the mask shape for patterning the polycrystalline silicon film be different for each kind.

【0012】[0012]

【発明の効果】以上説明したように、本発明の半導体集
積回路装置は、1つの半導体ペレット内に電気的に分離
されている同電位の電源線の間に、半導体集積回路装置
の品種に特有の抵抗値を有する抵抗を接続しているの
で、半導体ペレットがパッケージされて半導体集積回路
装置として構成された状態でも、2本の同電位の電源用
の端子ピン間の抵抗値を測定すれば、その抵抗値に基づ
いてその半導体集積回路装置の品種を選別することが可
能となり、品種識別用の専用の端子ピンを個別に設ける
必要がなく、端子ピンの有効利用を図ることができる。
As described above, the semiconductor integrated circuit device of the present invention is peculiar to the type of the semiconductor integrated circuit device between the power lines of the same potential which are electrically separated in one semiconductor pellet. Since a resistor having a resistance value of 1 is connected, even if the semiconductor pellet is packaged and configured as a semiconductor integrated circuit device, if the resistance value between the two terminal pins for power supply of the same potential is measured, It becomes possible to select the type of the semiconductor integrated circuit device based on the resistance value, and it is not necessary to individually provide a dedicated terminal pin for identifying the type, and the terminal pin can be effectively used.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の半導体ペレットの要部の平
面図と、その品種識別を行う状態を示す図である。
FIG. 1 is a plan view of a main part of a semiconductor pellet according to an embodiment of the present invention, and a diagram showing a state in which a product type is identified.

【図2】従来の半導体ペレットの一部の平面図と、その
品種識別を行う状態を示す図である。
FIG. 2 is a plan view of a part of a conventional semiconductor pellet and a diagram showing a state in which the product type is identified.

【符号の説明】[Explanation of symbols]

1 半導体ウェハ 11,12,13 半導体チップ VE1,VE2 同電位電源線(接地線) R1〜R3 抵抗 P1,P2 パッド L1,L2 端子ピン 1 Semiconductor Wafers 11, 12, 13 Semiconductor Chips VE1, VE2 Equipotential Power Supply Lines (Grounding Lines) R1 to R3 Resistors P1, P2 Pads L1, L2 Terminal Pins

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 1つの半導体ペレット内に電気的に分離
されている同電位の電源線を有し、前記半導体ペレット
がパッケージされたときに前記各電源線がそれぞれ個別
に端子ピンに接続されてなる半導体集積回路装置におい
て、前記各電源線の間には、半導体集積回路装置の品種
に特有の抵抗値を有する抵抗を接続してなることを特徴
とする半導体集積回路装置。
1. A semiconductor pellet having power lines of the same potential which are electrically separated from each other, and each of the power lines is individually connected to a terminal pin when the semiconductor pellet is packaged. In the semiconductor integrated circuit device according to the present invention, a resistor having a resistance value peculiar to a product type of the semiconductor integrated circuit device is connected between the power supply lines.
【請求項2】 各電源線と抵抗を接続する配線の少なく
とも一部を、過電流により溶断されるように構成してな
る請求項1の半導体集積回路装置。
2. The semiconductor integrated circuit device according to claim 1, wherein at least a part of a wiring connecting the power supply line and the resistor is blown by an overcurrent.
【請求項3】 各半導体ペレットには、品種数に相当す
る数の異なる抵抗ちの抵抗が形成され、これらの抵抗を
品種毎に選択して各電源線に接続してなる請求項1また
は2の半導体集積回路装置。
3. The semiconductor pellets are formed with resistors having different numbers of resistors corresponding to the number of types, and these resistors are selected for each type and connected to each power line. Semiconductor integrated circuit device.
【請求項4】 各半導体ペレットには、品種毎にそれぞ
れ抵抗値の異なる抵抗が形成されてなる請求項1または
2の半導体集積回路装置。
4. The semiconductor integrated circuit device according to claim 1, wherein each semiconductor pellet is formed with a resistor having a different resistance value for each type.
【請求項5】 電源線が接地線である請求項1ないし4
のいずれかの半導体集積回路装置。
5. The power supply line is a ground line.
Any one of the semiconductor integrated circuit device.
JP5348278A 1993-12-24 1993-12-24 Semiconductor integrated circuit device Expired - Lifetime JP2765467B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006294930A (en) * 2005-04-12 2006-10-26 Denso Corp Semiconductor integrated circuit device and mounting method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011689A (en) * 1973-06-01 1975-02-06
JPS63122242A (en) * 1986-11-12 1988-05-26 Nec Corp Method for constituting master slice integrated circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5011689A (en) * 1973-06-01 1975-02-06
JPS63122242A (en) * 1986-11-12 1988-05-26 Nec Corp Method for constituting master slice integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006294930A (en) * 2005-04-12 2006-10-26 Denso Corp Semiconductor integrated circuit device and mounting method thereof

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