JPH07193087A - Microwave transistor - Google Patents

Microwave transistor

Info

Publication number
JPH07193087A
JPH07193087A JP5331320A JP33132093A JPH07193087A JP H07193087 A JPH07193087 A JP H07193087A JP 5331320 A JP5331320 A JP 5331320A JP 33132093 A JP33132093 A JP 33132093A JP H07193087 A JPH07193087 A JP H07193087A
Authority
JP
Japan
Prior art keywords
gate
drain
electrode
feeding end
microwave transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5331320A
Other languages
Japanese (ja)
Inventor
Kenichi Hosoya
健一 細谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP5331320A priority Critical patent/JPH07193087A/en
Publication of JPH07193087A publication Critical patent/JPH07193087A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors

Abstract

PURPOSE:To avoid the deterioration of the radio frequency characteristics caused by a phase difference by a method wherein difference in distances of respective routes from a gate feeding end to a drain feeding end is made to be small enough without increasing an occupying area and a parasitic capacitance. CONSTITUTION:A microwave transistor in which a gate feeding end 6 is connected to the end of a gate bus electrode 4 and a drain feeding end 7 is connected to the end of a drain bus electrode 5 opposite to the gate feeding end 6 is obtained. With this constitution, the difference in distances of respective routes from the gate feeding end 6 to the drain feeding end 7 is made to be small enough to avoid the deterioration of the radio frequency characteristics caused by a phase difference without increasing an occupying area and a parasitic capacitance.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置、特にマイ
クロ波トランジスタに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, particularly a microwave transistor.

【0002】[0002]

【従来の技術】以下、図面を参照して従来のマイクロ波
トランジスタの平面構造を説明する。
2. Description of the Related Art A planar structure of a conventional microwave transistor will be described below with reference to the drawings.

【0003】図2は、従来の櫛形構造のマイクロ波トラ
ンジスタの平面図である。図2に於いて、1はソース電
極、2はドレイン電極、3はゲート電極、4はゲートバ
ス電極、5はドレインバス電極、6はゲート給電端、7
はドレイン給電端、8は単位トランジスタである。同図
に示すように、ゲートバス電極4の一方の側の中央部分
には、ゲート給電端6が接続され、他方の側には複数本
のゲート電極3が接続されている。同様に、ドレインバ
ス電極5の一方の側の中央部分には、ドレイン給電端7
が接続され、他方の側には複数本のドレイン電極2が接
続されている。そしてドレイン電極2、ソース電極1、
及びこれらに挟まれたゲート電極3とで単位トランジス
タ8を構成し、これがソース、ドレイン及びゲート電極
の長手方向と垂直な方向に、複数個、隣接して配置され
ている。
FIG. 2 is a plan view of a conventional microwave transistor having a comb structure. In FIG. 2, 1 is a source electrode, 2 is a drain electrode, 3 is a gate electrode, 4 is a gate bus electrode, 5 is a drain bus electrode, 6 is a gate power supply end, and 7
Is a drain power supply terminal, and 8 is a unit transistor. As shown in the figure, the gate feeding end 6 is connected to the central portion on one side of the gate bus electrode 4, and the plurality of gate electrodes 3 are connected to the other side. Similarly, in the central portion of the drain bus electrode 5 on one side, the drain feeding end 7
And a plurality of drain electrodes 2 are connected to the other side. And the drain electrode 2, the source electrode 1,
Further, the unit transistor 8 is constituted by the gate electrode 3 sandwiched therebetween, and a plurality of unit transistors 8 are arranged adjacent to each other in the direction perpendicular to the longitudinal direction of the source, drain and gate electrodes.

【0004】図3は、従来の樹枝状構造のマイクロ波ト
ランジスタの平面図である。図3に於いて、図2と異な
るのは、1段目接続配線9、1段目フィンガー10、2
段目接続配線11、2段目フィンガー12、3段目接続
配線13を設けている点にある。図3に示すように、ゲ
ート電極3は、順次、隣同士2つずつ組み合わされ、1
段目接続配線9で接続されている。1段目接続配線9の
中央には、1段目フィンガー10が接続されている。1
段目フィンガー10は、順次、隣同士2つずつ組み合わ
され、2段目接続配線11に接続されている。2段目接
続配線11の中央には2段目フィンガー12が接続さ
れ、それらは3段目接続配線13で接続されている。3
段目接続配線13の中央部分にはゲート給電端6が接続
されている。このように、1段目接続配線9、1段目フ
ィンガー10、2段目接続配線11、2段目フィンガー
12及び3段目接続配線13でトーナメント形状、即
ち、樹枝状形状の入力分岐部14を形成している。ドレ
イン側も同様にして出力分岐部15を形成している。
FIG. 3 is a plan view of a conventional dendritic microwave transistor. 3 is different from FIG. 2 in that the first-stage connection wiring 9, the first-stage fingers 10 and 2,
The point is that the stage connection wiring 11, the second stage finger 12, and the stage 3 connection wiring 13 are provided. As shown in FIG. 3, the gate electrodes 3 are sequentially combined two by two next to each other.
They are connected by the stage connection wiring 9. A first-stage finger 10 is connected to the center of the first-stage connection wiring 9. 1
The second-stage fingers 10 are sequentially combined two by two next to each other and connected to the second-stage connection wiring 11. A second-stage finger 12 is connected to the center of the second-stage connection wiring 11, and they are connected by a third-stage connection wiring 13. Three
The gate feeding end 6 is connected to the central portion of the stage connection wiring 13. In this way, the first-stage connection wiring 9, the first-stage finger 10, the second-stage connection wiring 11, the second-stage finger 12, and the third-stage connection wiring 13 have a tournament shape, that is, a dendritic input branch portion 14. Is formed. Similarly, the output side 15 is formed on the drain side.

【0005】[0005]

【発明が解決しようとする課題】図2に示した従来の櫛
形構造のマイクロ波トランジスタに於いては、ゲート給
電端6とゲート電極3との距離は、各ゲート電極の位置
により異なっており、同様に、ドレイン給電端7とドレ
イン電極2との距離も、各ドレイン電極の位置によて異
なっている。従って、ゲート給電端6に供給され、ゲー
ト電極3からドレイン電極2を経由してドレイン給電端
7に到達した信号の間には、それぞれの信号が経由した
経路の距離に応じた位相差が生じる。この位相差は高周
波になるほど大きい。よって、櫛形構造のマイクロ波ト
ランジスタを高周波で動作させた場合、各経路を経由し
た信号は、ドレイン給電端7において位相差を持って合
成されることになり、利得削減、波形歪みといった高周
波特性の劣化が生じるという問題があった。
In the conventional microwave transistor having a comb structure shown in FIG. 2, the distance between the gate feeding end 6 and the gate electrode 3 varies depending on the position of each gate electrode. Similarly, the distance between the drain feeding end 7 and the drain electrode 2 also differs depending on the position of each drain electrode. Therefore, between the signals supplied to the gate power feeding end 6 and reaching the drain power feeding end 7 from the gate electrode 3 via the drain electrode 2, there is a phase difference according to the distance of the route through which each signal passes. . This phase difference increases as the frequency becomes higher. Therefore, when the microwave transistor having a comb structure is operated at a high frequency, the signals that have passed through the respective paths are combined with a phase difference at the drain feeding end 7, resulting in high frequency characteristics such as gain reduction and waveform distortion. There was a problem of deterioration.

【0006】この位相差の問題を、図3に示した樹枝状
構造の入出力分岐部を具備する構造とすることにより回
避してきた。即ちこの構造においては、ゲート給電端6
からゲート電極3の各々に至る各経路の距離の差は十分
小さく、ドレイン電極2からドレイン給電端7の各々に
至る各経路の距離の差も十分小さい。従って、各経路を
伝搬してきた信号は、ドレイン給電端7において同位相
で合成されることになり、利得削減、波形歪みといった
高周波特性の劣化生じない。
The problem of the phase difference has been avoided by adopting a structure including the input / output branch portion of the dendritic structure shown in FIG. That is, in this structure, the gate feeding end 6
The distance difference between the respective paths from the gate electrode 3 to each of the gate electrodes 3 is sufficiently small, and the distance difference between the respective paths from the drain electrode 2 to each of the drain feeding ends 7 is also sufficiently small. Therefore, the signals propagating through the respective paths are combined at the drain feeding end 7 in the same phase, and the high frequency characteristics such as gain reduction and waveform distortion do not occur.

【0007】しかし、樹枝状構造のマイクロ波トランジ
スタに於いては、入力分岐部14及び出力分岐部15に
より占有面積が増大し回路の高集積化を妨げられるとい
う問題があった。また、基板裏面に接地面を具備するマ
イクロストリップ構造とする場合、入力分岐部及び出力
分岐部と接地面との間に生じる寄生容量がトランジスタ
の高周波特性を劣化させるという問題があった。さら
に、ゲート電極3、ドレイン電極2の数が、それぞれ、
2の累乗でなければならないという制限があった。
However, in the microwave transistor having the dendritic structure, there is a problem that the input branch section 14 and the output branch section 15 increase the occupied area and hinder high integration of the circuit. Further, when the microstrip structure is provided with the ground plane on the back surface of the substrate, there is a problem that the parasitic capacitance generated between the input branch section and the output branch section and the ground plane deteriorates the high frequency characteristics of the transistor. Furthermore, the numbers of gate electrodes 3 and drain electrodes 2 are
There was a restriction that it must be a power of two.

【0008】[0008]

【課題を解決するための手段】本発明のマイクロ波トラ
ンジスタは、ドレイン電極、ソース電極、及びこれらに
挟まれたゲート電極を有する単位トランジスタを、前記
ゲート電極の長手方向に対し垂直の方向に複数個隣接し
て配置し、ゲートバス電極の片側に前記複数個のゲート
電極を接続し、逆側にゲート給電端を接続し、同様にド
レインバス電極の片側に前記複数個のドレイン電極を接
続し、逆側にドレイン給電端を接続した櫛方構造であ
り、且つ、前記ゲート給電端を前記ゲートバス電極の一
方の端部に接続し、前記ドレイン給電端を前記ドレイン
バス電極の、前記ゲート給電端とは反対側の端部に接続
した構成を有する。
A microwave transistor of the present invention comprises a plurality of unit transistors each having a drain electrode, a source electrode, and a gate electrode sandwiched therebetween, in a direction perpendicular to the longitudinal direction of the gate electrode. Adjacent to each other, connect the plurality of gate electrodes to one side of the gate bus electrode, connect the gate feeding end to the opposite side, and similarly connect the plurality of drain electrodes to one side of the drain bus electrode. , A comb-shaped structure in which a drain feeding end is connected to the opposite side, and the gate feeding end is connected to one end of the gate bus electrode, and the drain feeding end is the gate feeding of the drain bus electrode. It has a configuration in which it is connected to the end opposite to the end.

【0009】[0009]

【作用】ゲート給電端を起点とし、ゲート電極からドレ
イン電極を経由して、ドレイン給電端に至る各経路の距
離の差を十分小さくでき、従って、各経路を伝搬してき
た信号間のドレイン給電端における位相差を十分小さく
できるため、位相差を持った信号同士が合成されること
による利得削減、波形歪みといった高周波特性の劣化を
十分小さくできる。また、同じく位相差を十分小さくで
きる樹枝状構造のマイクロ波トランジスタに比べ、占有
面積が小さく回路の高集積化が可能となる。また、基板
裏面に接地面を具備するマイクロストリップ構造とする
場合、入出力分岐部と接地面の間に生じる寄溶がないた
め、樹枝状構造に比べ高周波特性の点でも有利となる。
さらに、ゲート及びドレイン電極の数を、2の累乗に限
定せず、自由に選択できる。
With the gate feeding end as the starting point, the difference in distance between the gate electrode and the drain electrode via the drain electrode to the drain feeding end can be made sufficiently small. Therefore, the drain feeding end between the signals propagating through the respective paths can be reduced. Since the phase difference in 1 can be sufficiently reduced, it is possible to sufficiently reduce deterioration of high frequency characteristics such as gain reduction and waveform distortion due to combining signals having a phase difference. Further, similarly to the microwave transistor having a dendritic structure capable of sufficiently reducing the phase difference, the occupied area is small and the circuit can be highly integrated. Further, in the case of the microstrip structure having the ground plane on the back surface of the substrate, there is no dissolution that occurs between the input / output branch section and the ground plane, which is advantageous in terms of high frequency characteristics as compared with the dendritic structure.
Further, the number of gate and drain electrodes is not limited to a power of 2 and can be freely selected.

【0010】[0010]

【実施例】以下、図面を参照して本発明の一実施例を説
明する。図1は、本発明の一実施例のマイクロ波トラン
ジスタの平面図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of a microwave transistor according to an embodiment of the present invention.

【0011】本実施例のマイクロ波トランジスタは、ソ
ース電極1、ドレイン電極2、ゲート電極3、ゲートバ
ス電極4、ドレインバス電極5、ゲート給電端6、ドレ
イン給電端7から構成される。同図に示すように、ゲー
トバス電極4の一方の側の端部には、ゲート給電端6が
接続されており、他方の側には、複数のゲート電極3が
接続されている。また、ドレインバス電極5の一方の側
の、ゲート給電端6とは反対側の端部にはドレイン給電
端7が接続されており、他方の側には、複数のドレイン
電極2が接続されている。そしてドレイン電極2、ソー
ス電極1、及びこれらに挟まれたゲート電極3とで単位
トランジスタ8を構成し、これがソース、ドレイン及び
ゲート電極の長手方向と垂直な方向に、複数個、隣接し
て配置されている。
The microwave transistor of this embodiment comprises a source electrode 1, a drain electrode 2, a gate electrode 3, a gate bus electrode 4, a drain bus electrode 5, a gate feeding end 6 and a drain feeding end 7. As shown in the figure, the gate power supply end 6 is connected to one end of the gate bus electrode 4, and the plurality of gate electrodes 3 are connected to the other end. A drain power supply end 7 is connected to one end of the drain bus electrode 5 opposite to the gate power supply end 6, and a plurality of drain electrodes 2 are connected to the other side. There is. The drain electrode 2, the source electrode 1, and the gate electrode 3 sandwiched therebetween form a unit transistor 8, and a plurality of unit transistors 8 are arranged adjacent to each other in the direction perpendicular to the longitudinal direction of the source, drain and gate electrodes. Has been done.

【0012】なお本実施例では、複数のソース電極1を
接続する方法について限定していない。これについて
は、バイアホールを通して裏面に形成された接地面に接
続するソースアイランドバイアホール構造や、エアブリ
ッジを通して表面に形成された接地面に接続するエアブ
リッジ構造等が可能である。
In this embodiment, the method of connecting the plurality of source electrodes 1 is not limited. As for this, a source island via hole structure connected to the ground plane formed on the back surface through a via hole, an air bridge structure connected to the ground plane formed on the front surface through an air bridge, and the like are possible.

【0013】[0013]

【発明の効果】以上説明したように本発明のマイクロ波
トランジスタは、ゲート給電端とドレイン電極端を、そ
れぞれゲートバス電極とドレインバス電極の互いに反対
側の端部に接続している。これにより、ゲート給電端を
起点とし、ゲート電極からドレイン電極を経由して、ド
レイン給電端に至る各経路の距離の差を十分小さくでき
る。従って、ゲート給電端に供給され各単位トランジス
タを経由してきた信号間の、ドレイン給電端における位
相差を十分小さくできる。よって、占有面積や寄生容量
を増加させることなく、また、ゲート及びドレイン電極
の本数を2の累乗に限定されることなく、位相差を持っ
た信号同士が合成されることによる利得削減、波形歪み
といった高周波特性の劣化を十分小さくできる効果があ
る。
As described above, in the microwave transistor of the present invention, the gate feeding end and the drain electrode end are connected to the opposite ends of the gate bus electrode and the drain bus electrode, respectively. This makes it possible to sufficiently reduce the difference in distance between the gate power supply end and the route from the gate electrode to the drain power supply end via the drain electrode. Therefore, the phase difference at the drain power supply end between the signals supplied to the gate power supply end and passing through each unit transistor can be made sufficiently small. Therefore, gain reduction and waveform distortion caused by combining signals having a phase difference without increasing the occupied area or the parasitic capacitance and limiting the number of gate and drain electrodes to a power of 2 There is an effect that the deterioration of the high frequency characteristics can be sufficiently reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のマイクロ波トランジスタの
平面図である。
FIG. 1 is a plan view of a microwave transistor according to an embodiment of the present invention.

【図2】従来の櫛形構造のマイクロ波トランジスタの平
面図である。
FIG. 2 is a plan view of a conventional microwave transistor having a comb structure.

【図3】従来の樹枝状構造のマイクロ波トランジスタの
平面図である。
FIG. 3 is a plan view of a conventional microwave transistor having a dendritic structure.

【符号の説明】[Explanation of symbols]

1 ソース電極 2 ドレイン電極 3 ゲート電極 4 ゲートバス電極 5 ドレインバス電極 6 ゲート給電端 7 ドレイン給電端 8 単位トランジスタ 9 1段目接続配線 10 1段目フィンガー 11 2段目接続配線 12 2段目フィンガー 13 3段目接続配線 14 入力分岐部 15 出力分岐部 1 Source Electrode 2 Drain Electrode 3 Gate Electrode 4 Gate Bus Electrode 5 Drain Bus Electrode 6 Gate Feeding End 7 Drain Feeding End 8 Unit Transistor 9 1st Stage Connection Wiring 10 1st Stage Finger 11 2nd Stage Connection Wiring 12 2nd Stage Finger 13 Third stage connection wiring 14 Input branch section 15 Output branch section

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 ドレイン電極と、ソース電極と、及びこ
れらに挟まれたゲート電極とを有する単位トランジスタ
が、前記ゲート電極の長手方向に対し垂直の方向に複数
個隣接して配置され、ゲートバス電極の片側に前記複数
個のゲート電極が接続され、逆側にはゲート給電端が接
続され、同様にドレインバス電極の片側に前記複数個の
ドレイン電極が接続され、逆側にドレイン給電端が接続
される櫛形構造のマイクロ波トランジスタであって、前
記ゲート給電端が前記ゲートバス電極の一方の端部に接
続され、前記ドレイン給電端が前記ドレインバス電極
の、前記ゲート給電端とは反対側の端部に接続されるこ
とを特徴とするマイクロ波トランジスタ。
1. A plurality of unit transistors each having a drain electrode, a source electrode, and a gate electrode sandwiched therebetween are arranged adjacent to each other in a direction perpendicular to a longitudinal direction of the gate electrode, and a gate bus is provided. The plurality of gate electrodes are connected to one side of the electrode, the gate feeding end is connected to the opposite side, the plurality of drain electrodes are connected to one side of the drain bus electrode, and the drain feeding end is connected to the opposite side. A comb-shaped microwave transistor to be connected, wherein the gate feeding end is connected to one end of the gate bus electrode, and the drain feeding end is the opposite side of the drain bus electrode from the gate feeding end. A microwave transistor characterized in that it is connected to an end of a microwave transistor.
JP5331320A 1993-12-27 1993-12-27 Microwave transistor Pending JPH07193087A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5331320A JPH07193087A (en) 1993-12-27 1993-12-27 Microwave transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5331320A JPH07193087A (en) 1993-12-27 1993-12-27 Microwave transistor

Publications (1)

Publication Number Publication Date
JPH07193087A true JPH07193087A (en) 1995-07-28

Family

ID=18242372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5331320A Pending JPH07193087A (en) 1993-12-27 1993-12-27 Microwave transistor

Country Status (1)

Country Link
JP (1) JPH07193087A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2998994A1 (en) * 2014-09-19 2016-03-23 Kabushiki Kaisha Toshiba Semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61260680A (en) * 1985-05-15 1986-11-18 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS6237945B2 (en) * 1979-03-05 1987-08-14 Kawasaki Kiko Kk

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6237945B2 (en) * 1979-03-05 1987-08-14 Kawasaki Kiko Kk
JPS61260680A (en) * 1985-05-15 1986-11-18 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2998994A1 (en) * 2014-09-19 2016-03-23 Kabushiki Kaisha Toshiba Semiconductor device
US9484421B2 (en) 2014-09-19 2016-11-01 Kabushiki Kaisha Toshiba Semiconductor device

Similar Documents

Publication Publication Date Title
US5923060A (en) Reduced area gate array cell design based on shifted placement of alternate rows of cells
TW473882B (en) Semiconductor device
US6900482B2 (en) Semiconductor device having divided active regions with comb-teeth electrodes thereon
CN100514851C (en) Distributed amplifier
US7294892B2 (en) Multi-transistor layout capable of saving area
JP3439290B2 (en) Semiconductor device
EP1840913A1 (en) Capacitor and electronic circuit
JPH07193087A (en) Microwave transistor
JP3946874B2 (en) Semiconductor device
JP2008263432A (en) Distribution type power amplifier
JPH06310955A (en) High output field effect transistor
JPH07169911A (en) Inter digital capacitor
JP3544916B2 (en) Microwave semiconductor amplifier
JP2001053510A (en) High-frequency circuit
JP2713273B2 (en) Semiconductor device
JP3338386B2 (en) Field effect type semiconductor device
JPH0738120A (en) High frequency and high output amplifier
JPH06342813A (en) Field effect transistor
JP2003110382A (en) Semiconductor microwave amplifier
JP3667136B2 (en) RF power amplifier module
JP2008148099A (en) Differential amplifier
JPH04298052A (en) Semiconductor device
JP3027883B2 (en) Microwave semiconductor amplifier
JP4153898B2 (en) RF power amplifier module
JPH11251333A (en) Semiconductor device

Legal Events

Date Code Title Description
A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 19970729