JPH07183927A - Delay detecting device for multiphase modulated signal - Google Patents

Abstract

PURPOSE:To reduce demodulation distortion by finding a phase rotation quantity based upon a frequency offset during a preamble period, and holding the phase quantity even during a data signal period and subtracting it from a demodulation output. CONSTITUTION:A demodulator 15 calculates the phase rotation quantity by calculating the difference between an angle calculated value of an angle calculator 14 which is one symbol precedent and a current angle calculated value, and inputs it to a frequency offset compensator 16. The difference integrator 17 of the compensator 16 integrates the difference in the angle calculated value of each symbol for a specific symlbol section during preamble reception. The section-integrated phase rotation quantity is held by a phase rotation quantity holder 18 and the phase rotation quantity based upon the frequency offset is calculated from the mean value. The phase rotation quantity is continuously outputted as a fixed value during single data reception following a preamble signal and subtracted by a subtracter 19 from the output of the demodulator 15. Consequently, a transient offset is smoothed and stable demodulation is enabled.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention finds a phase rotation amount based on a frequency offset during a preamble signal period, and uses this phase rotation amount to compensate a frequency offset included in a demodulation output of a data signal. The present invention relates to a differential detection device for phase-phase modulated signals.

[0002]

2. Description of the Related Art In many multi-directional communication systems in which a master station and a plurality of slave stations are carried out in a burst form, many systems use PSK (Phase Shift Keying) modulation, and a carrier frequency shift, that is, a frequency offset is demodulated. Distortion seriously affects the error rate characteristic.

For this reason, in order to automatically compensate the phase rotation amount based on the frequency offset, for example, the carrier is reproduced on the receiving side and the phase is compared with the input wave, and the oscillation frequency of the phase-locked oscillator is automatically set to the input frequency. A phase-locked loop type synchronous detection device and the like to be followed have been proposed. However, in this type of synchronous detection device, since the phase of the burst seen from the master station side differs from slave station to slave station, it is inevitable that the phase synchronization loop of the master station corresponding to a plurality of slave stations in time division will provide quick response. There is a limit, and for the purpose of shortening the initial synchronization with respect to the burst, for example, as shown in FIG. 3, a transmission system has been proposed in which a preamble signal is added to the tip of the transmission data signal. However, if the configuration is such that the transmission data signal with the preamble signal added is received, the synchronous detection device has the drawback that the circuit for regenerating the carrier from the preamble signal is likely to be complicated and the manufacturing cost is high. Although the relationship between the noise ratio and the error rate is sacrificed to some extent,
The usefulness of the differential detection device, which does not require carrier wave regeneration and requires a small circuit scale, has come to the fore.

The differential detection apparatus divides the preamble signal and the following data signal into quadrature components, captures a signal which is multiphase-phase modulated by a receiving antenna, quadrature two-phase demodulates, and then AD-converts each quadrature component. Delay detection. Delay detection is
The received multi-phase modulation signal is delayed by 1 bit to form a delayed local signal, and this delayed local signal is phase-compared with the pre-delayed multi-phase modulation signal to detect the phase rotation amount. S (t) is equivalent to the multi-phase modulation signal R (t) multiplied by the delayed local signal L (t).

Here, when the carrier angular velocity is ω _c and the symbol period is T, for the M-th phase of the Nth power phase modulation of 2, the one-symbol period difference Δθ of the phase modulation signal θ (t).
(T) = θ (t) −θ (t−T), Δθ (t) = 2πk / M where k is 0, 1,
, M−1 is an integer ω _c T = (π / M) + 2πn where n is an integer such that I (t) = Re [S (t)] = cos [Δθ + (π /
M)] = α cos Δθ−β sin Δθ Q (t) = Im [S (t)] = sin [Δθ + (π /
M)] = αsin Δθ + β cos Δθ However, it can be understood that the orthogonal demodulation such that α = cos (π / M) and β = sin (π / M) can be performed.

However, in such differential detection, the carrier frequency is shifted by [Delta] [omega _c, the initial phase setting omega _c for appearing as a phase shift of [Delta] [omega _c T against T, when the 2-phase PSK i.e. for example M = 2 If (N = 1),
The demodulated signal when the phase shift is zero is S (t) = ± 1, whereas the demodulated amplitude is reduced by S (t) = ± cos (Δω _c T) and the noise resistance characteristic, that is, the error rate characteristic is There was a problem of deterioration.

Therefore, in order to reduce demodulation distortion due to such frequency offset, for example, Japanese Patent Publication No. Sho 63-381.
In the device disclosed in Japanese Laid-Open Patent Publication No. 43-43, "delay detection circuit", the output of the phase comparator is sampled and held within the preamble signal period of each burst, and the phase of the delayed local signal is changed by this value to shift the carrier frequency. A configuration that automatically compensates for the frequency offset is adopted.

A differential detection apparatus whose schematic configuration is shown in FIG. 4 supplies an input phase modulation signal to one comparison input terminal of a first phase comparator 2 and also a 1-bit delay unit 3 and a variable phase shifter 4. The phase comparison input terminal is supplied to the other of the first phase comparator 2 via the second phase comparator 6 after the input phase modulation signal is phased by π / 2 in the π / 2 phase shifter 5. To hold the phase difference obtained by comparing the phase with the output of the variable phase shifter 4 in the sample holding circuit 7, and the sample holding circuit 7 shifts during the preamble signal period arranged at the head of the input phase modulation signal. By holding the phase difference and controlling the variable phase shift amount of the variable phase shifter 4 during the data signal period with this phase difference, the demodulation distortion due to the shift of the carrier frequency is compensated. That is, when the output voltage of the sample holding circuit 7 is positive, the variable phase shifter 4 has a polarity that delays the phase, so that loop control is performed so that the phase difference becomes zero.

[0009]

This conventional delay demodulation device for a multi-phase phase modulated signal is not limited to the basic components constituting the skeleton of the differential detection system, that is, the first phase comparator 2 and the 1-bit delay device 3. In addition, the variable phase shifter 4, the π / 2 phase shifter 5, the second phase comparator 6, the sample holding circuit 7, and the like are required, and therefore the configuration of the entire apparatus is complicated.

Further, the frequency offset extracted from the preamble signal composed of an unmodulated carrier is substantially the frequency offset determined at the end of the preamble signal period, and the carrier frequency of the preamble signal itself is temporally changed due to the effect of fading. In such a case, the value held in the sample holding circuit 7 at a specific time is not always the value showing the most reliable frequency offset, and the information about the frequency offset obtained in the preamble signal period is displayed. There was a problem that it was not fully utilized to the maximum extent.

An object of the present invention is to provide a preamble signal period, which is an unmodulated carrier sent prior to a data signal,
The purpose is to arithmetically average demodulation errors based on frequency offsets and compensate demodulation distortion by the most reasonable method in terms of probability.

[0012]

SUMMARY OF THE INVENTION According to the present invention, a preamble signal and a subsequent data signal are divided into quadrature components to receive a multiphase (2 Nth phase) phase modulated signal, and the multiphase phase modulated signal is received. An AD converter that performs AD conversion for each orthogonal component, and the AD converter
An angle calculator that calculates the angle formed by the orthogonal components from the output of the converter with precision M bits, a demodulator that delay-detects the output of the angle detector to obtain a phase rotation amount, and demodulates the preamble signal period. In regard to M bits of the output phase rotation amount of the demodulator in, the difference between adjacent symbols is arithmetically averaged over several symbol periods to obtain the phase rotation amount based on the frequency offset, and the phase rotation amount is calculated as a data signal. The object is achieved by providing a differential detection device for a multi-phase phase modulation signal, which is provided with a frequency offset compensating means for holding it during a period and subtracting it from the demodulation output of the demodulator. is there.

Further, according to the present invention, the frequency offset compensating means integrates the difference between adjacent symbols with respect to M bits of the output phase rotation amount of the demodulator in the preamble signal period over several symbol engines. A difference accumulator, a phase rotation amount holder that holds the phase rotation amount based on the frequency offset obtained as an average value by dividing the output of the difference accumulator by the number of symbols in the accumulation section even during the data signal period, The object is achieved by providing a delay detection device for a multiphase phase modulation signal, which comprises a subtractor for subtracting the amount of phase rotation held by the phase rotation amount holder from the demodulated output of the demodulator. To do.

[0014]

According to the present invention, the preamble signal and the subsequent data signal are divided into quadrature components, and a multiphase (2 N phase) phase-modulated signal is received, and the multiphase phase-modulated signals are quadrature components. AD conversion is performed, the angle formed by the quadrature components from the AD conversion output is calculated with precision M bits, the angle detection output is differentially detected to obtain the amount of phase rotation, and demodulation is performed. For M bits of the demodulation output in the preamble signal period, By calculating the phase rotation amount based on the frequency offset by arithmetically averaging the difference between adjacent symbols over several symbol periods, and holding this phase rotation amount even during the data signal period and subtracting it from the demodulation output, The frequency offset can be compensated to reduce the demodulation distortion.

[0015]

EXAMPLES Examples of the present invention will be described below with reference to FIGS.
Will be described with reference to. FIG. 1 is a schematic circuit configuration diagram showing an embodiment of a delay detection device for a multiphase phase modulation signal of the present invention, and FIG. 2 is a signal point arrangement diagram when demodulating a four phase phase modulation signal.

The multi-phase phase modulation signal differential detection apparatus 11 shown in FIG. 1 receives a signal in which a preamble signal and a subsequent data signal are divided into quadrature components and subjected to four-phase phase modulation. Is as shown in FIG.
That is, for example, a data signal of an appropriate number of symbols is sandwiched between SD (start data) and NWID (network ID data) of each 4 symbols and ED (end data) of 4 symbols, and the preamble signal is immediately before SD. Is added with 148 symbols.

The quadrature phase modulation signal captured by the receiving antenna is quadrature two-phase demodulated by the quadrature demodulator 12 and then quadrature component, that is, I component (in-phase component) and Q component (quadrature component). It is sent out to the corresponding AD converters 13i and 13q and subjected to, for example, 4-bit AD conversion. The AD conversion outputs of both AD converters 13i and 13q are supplied to the angle calculator 14, where the angle θ formed by the orthogonal components I and Q is calculated with accuracy M (for example, 6) bits. The angle data formed by the quadrature component obtained by the angle calculator 14 is supplied to the demodulator 15 and the phase rotation amount is obtained by delay detection.

A frequency offset compensator 16 is connected to the demodulator 15 so that the average value of the demodulation errors obtained during the preamble signal period is compensated for the data signal. The frequency offset compensator 16 integrates the difference between adjacent symbols for M (here, 6) bits of the output phase rotation amount of the demodulator 15 in the preamble signal period over several symbol periods. 17, and the output of the difference integrator 17 is divided by the number of symbols L (for example, 30) in the integration section, and the phase rotation amount holder that holds the phase rotation amount based on the frequency offset obtained as an average value even during the data signal period 18 and a subtracter 19 for subtracting the phase rotation amount held by the phase rotation amount holding device 18 from the demodulated output of the demodulator 15. The difference accumulator 17 shown in the embodiment includes a subtracter 20 for difference calculation and a register circuit 21 that holds the output of the subtractor 20 and uses the latch output as the subtracted input of the subtractor 20.

By the way, the output 4 bits of the AD converter are
It is a two's complement format, in which the most significant bit "1" represents-and "0" represents +. Therefore, QPSK or 2
When a phase-modulated signal modulated with the square-phase (N = 2) PSK of is received, as shown in FIG. It will be. Also, the output 6 bits b1 of the angle calculator 14
-B6, the second most significant bit b2 following the most significant bit b1 indicates which quadrant of the first to fourth quadrants the calculated angle? Bit b3
Represents the positive and negative of the quadrant. Furthermore, the lower 3 bits b3 to b6 indicate which of the regions obtained by dividing the range of the angle θ of π / 4 into eight.

Calculation of the amount of phase rotation in the demodulator 15
This is performed by calculating the phase rotation amount by taking the difference between the calculated angle value one symbol before and the calculated angle value. In this case, of the demodulated output of the demodulator 15, the upper 2 bits are data and the lower 4 bits are data quality.

In the case of the embodiment, the difference integrator 17 calculates the difference of each 64-bit symbol by L during the reception of the preamble.
(= 30) The section is integrated over the symbol section. Specifically, partition subtraction is performed by subtracting the demodulation output for each symbol from the output of the register circuit 21 that holds the output of the subtractor 20 by the subtracter 20 and holding the output again in the register circuit 21. . The output of the subtractor 20 is held in the phase rotation amount holding unit 18, where it is divided by the integrated symbol number L, and the average value calculation calculates the phase rotation amount based on the frequency offset.

The phase rotation amount based on the frequency offset calculated in this way continues to be output as a fixed value during one data reception in succession to the preamble signal, and the offset value included in the phase rotation amount calculated from the data signal. In the subtractor 19, the demodulator 15
Is subtracted from the output of.

As described above, in this embodiment, for the M (= 6) bits of the demodulated output in the preamble signal period, the difference between adjacent symbols is arithmetically averaged over 30 symbol periods to obtain a frequency offset. The amount of phase rotation based on this is calculated, and this amount of phase rotation is held even during the data signal period and subtracted from the demodulation output, so unlike the case where the frequency offset is simply obtained at a specific point during the preamble signal period, From the preamble signal added to the beginning of the signal, it is possible to derive an average value of carrier frequency deviations, that is, frequency offsets over several symbol periods, based on the phase rotation amount. Therefore, even if the carrier frequency of the preamble signal itself fluctuates over time due to the effect of fading, the transient frequency offset due to fading is smoothed, and the stochastic most appropriate frequency offset is derived. By doing so, stable demodulation with less distortion is possible. Further, by inversely designating the preamble signal period from the time required for the average value calculation, it is possible to shorten the preamble signal period to the minimum necessary length and improve the communication efficiency.

Further, the frequency offset compensator 16 is an open loop type which does not feed back the compensation result, and can be composed of the difference integrator, the phase rotation amount holder 18 and the subtractor 19, so that the frequency offset compensator is used. The circuit configuration of the necessary part is simple, and the difference integrator 17 can also be configured by the subtractor 20 and the register circuit 21 that holds the subtraction output thereof and is used as the subtracted input of the subtractor. The frequency offset compensation can be performed without fail, and the frequency offset compensation is comparable to the closed loop automatic frequency control.

In the above embodiment, the case of differentially detecting a four-phase phase-modulated signal is taken as an example, but multiphase (N of 2) is used.
The value N that defines the number of phases of the multiplicative phase modulation is not limited to 2. For example, two-phase phase modulation (N = 1) or eight-phase phase modulation (N
= 3) or 16 phase modulation (N = 4), N can be selected as an arbitrary integer. Further, the differential detection apparatus of the present invention can also detect a signal obtained by further performing spread spectrum modulation on a signal subjected to multi-phase modulation as information modulation, and in that case, FDMA (frequency division multiplexing) or TDMA (time division). It is possible to support any transmission method such as multiplex method) or CDMA (code division multiplex method).

[0026]

As described above, the differential detection apparatus for a multi-phase phase modulation signal of the present invention can be operated even if the carrier frequency of the preamble signal itself fluctuates with time due to the effect of fading. By averaging, the transient frequency offset caused by fading can be smoothed and the stochastic most appropriate frequency offset can be derived. This enables stable demodulation with less distortion, and further shortens the preamble signal period to the minimum required length by increasing the communication efficiency by specifying the preamble signal period from the time required for the average value calculation. It has excellent effects such as being able to.

Further, according to the present invention, since the frequency offset compensating means is composed of the phase rotation amount holding device and the subtractor,
It is possible to surely compensate the frequency offset without using a complicated circuit configuration, and it is possible to perform the frequency offset compensation comparable to the closed loop automatic frequency control.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a differential detection apparatus for a polyphase modulation signal according to the present invention.

FIG. 2 is a diagram showing a signal point arrangement on a phase plane when a four-phase phase modulation signal is demodulated.

FIG. 3 is a diagram showing a data structure of a burst transmission signal.

FIG. 4 is a block diagram showing an example of a conventional differential detection apparatus for a multiphase phase modulation signal.

[Explanation of symbols]

 11 Delay Detection Device 12 Quadrature Demodulator 13i, 13q AD Converter 14 Angle Calculator 15 Demodulator 16 Frequency Offset Compensator 17 Difference Accumulator 18 Phase Rotation Amount Holder 19 Subtractor

Claims (2)

[Claims] 1. An AD that receives a signal in which a preamble signal and a subsequent data signal are divided into quadrature components and subjected to multiphase (Nth power of 2) phase modulation, and AD-converts the multiphase phase modulation signals for each quadrature component. A converter, an angle calculator that calculates the angle formed by the orthogonal components from the output of the AD converter with precision M bits, and a demodulator that delay-detects the output of the angle detector to obtain the amount of phase rotation and demodulates it. And M bits of the output phase rotation amount of the demodulator in the preamble signal period,
The difference between adjacent symbols is arithmetically averaged over several symbol periods to obtain the amount of phase rotation based on the frequency offset, and the amount of phase rotation due to this frequency offset is held even during the data signal period and demodulated by the demodulator. And a frequency offset compensating means for subtracting from the output. 2. The frequency offset compensating means includes a difference integrator that integrates a difference between adjacent symbols for M bits of an output phase rotation amount of the demodulator in the preamble signal period over several symbol periods. , A phase rotation amount holding unit that holds the phase rotation amount based on the frequency offset obtained as an average value by dividing the output of the difference integrator by the number of symbols in the integration section, and the phase rotation amount holding unit 2. A differential detection device for a multiphase phase modulation signal according to claim 1, further comprising a subtractor for subtracting the phase rotation amount held by the demodulator from the demodulation output of the demodulator.