JPH07176487A - Method for growing semiconductor single crystal and manufacture of laminated boards - Google Patents

Method for growing semiconductor single crystal and manufacture of laminated boards

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Publication number
JPH07176487A
JPH07176487A JP32029393A JP32029393A JPH07176487A JP H07176487 A JPH07176487 A JP H07176487A JP 32029393 A JP32029393 A JP 32029393A JP 32029393 A JP32029393 A JP 32029393A JP H07176487 A JPH07176487 A JP H07176487A
Authority
JP
Japan
Prior art keywords
single crystal
semiconductor
porous
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP32029393A
Other languages
Japanese (ja)
Other versions
JP3352196B2 (en
Inventor
Shunsuke Inoue
俊輔 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
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Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP32029393A priority Critical patent/JP3352196B2/en
Publication of JPH07176487A publication Critical patent/JPH07176487A/en
Application granted granted Critical
Publication of JP3352196B2 publication Critical patent/JP3352196B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To form an epitaxially grown layer in which a defect density is reduced on a porous semiconductor by covering spaces of ramified pores in a surface of the semiconductor with an oxide and then heat-treating the exposed surface of the semiconductor. CONSTITUTION:A surface of a porous semiconductor has many ramified pores 104 like trees. An oxide layer 103a is formed on a surface of the semiconductor by an oxidizing step, and spaces of the pores are covered with an oxide 103b. Then, the oxide of the surface is removed. Thereafter, a substrate is introduced into an epitaxially growing furnace, and a single crystal is grown. In this case, a tree structure of a porous layer is not changed even if it is heat treated in a step of forming a thin oxide film, but migrants of silicon atoms and relocation occur on the surface, thereby becoming an extremely thin single crystal layer. Thus, since a reduced pressure process is not required, generation of particles due to pumping can be completely suppressed. Accordingly, a defect of an SOI substrate due to the particles can be completely excluded.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体単結晶の成長方法
及び貼り合わせ基板の製造方法に係り、特に多孔質半導
体上に単結晶半導体を成長させ、これを貼り合わせてS
OI(Silicon−On−Insulator)基
板を作製する場合に好適に用いられる、半導体単結晶の
成長方法及び貼り合わせ基板の製造方法に関するもので
ある。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for growing a semiconductor single crystal and a method for manufacturing a bonded substrate, and in particular, growing a single crystal semiconductor on a porous semiconductor and bonding the same to S
The present invention relates to a method for growing a semiconductor single crystal and a method for manufacturing a bonded substrate, which are preferably used when producing an OI (Silicon-On-Insulator) substrate.

【0002】[0002]

【従来の技術】絶縁基板上に薄膜単結晶層を有する基板
はSOI基板と呼ばれ、この基板を用いて作製された集
積回路は、通常のバルク半導体で作製された回路と比べ
て、高速・低消費電力の動作が可能なことが古くから知
られており、その有用性は認められている。
2. Description of the Related Art A substrate having a thin film single crystal layer on an insulating substrate is called an SOI substrate, and an integrated circuit manufactured using this substrate has a higher speed / speed than a circuit manufactured using a normal bulk semiconductor. It has long been known that operation with low power consumption is possible, and its usefulness has been recognized.

【0003】SOI基板の作製法には、従来主に以下の
3通りの方法があった。
Conventionally, there have been the following three main methods for manufacturing an SOI substrate.

【0004】(1) 第1の方法は、SIMOX法と呼ばれ
ており、バルク半導体基板表面より数千オングストロー
ムの深さに高ドーズ量の酸素イオンを注入することによ
り、埋込酸化膜を形成する方法である。この方法は、再
表面の単結晶半導体層の膜厚均一性に優れるものの、イ
オン注入による結晶品質の劣化及び高価な高ドーズイオ
ン注入プロセスが必要などの欠点があり、広く集積回路
に用いられるに至っていない。
(1) The first method is called a SIMOX method, and a buried oxide film is formed by implanting a high dose amount of oxygen ions to a depth of several thousand angstroms from the surface of a bulk semiconductor substrate. Is the way to do it. Although this method is excellent in the film thickness uniformity of the recrystallized single crystal semiconductor layer, it has drawbacks such as deterioration of crystal quality due to ion implantation and an expensive high-dose ion implantation process, and is widely used in integrated circuits. I haven't arrived.

【0005】(2) 第2の方法は、ウェハ貼合せ法であ
る。この方法は、少なくとも一方の表面が絶縁された2
枚の単結晶ウェハを貼り合わせた後、研磨により一方の
単結晶を薄膜化する方法である。この方法は、単結晶品
質に優れているものの、研磨精度が充分でないために薄
膜化後の単結晶の厚さが不均一であることにより、やは
り広く集積回路に用いられるに至っていない。
(2) The second method is a wafer bonding method. In this method, at least one surface is insulated 2
This is a method in which one single crystal is thinned by polishing after bonding a single crystal wafer. Although this method is excellent in single crystal quality, it has not been widely used in integrated circuits because the polishing accuracy is not sufficient and the thickness of the single crystal after thinning is not uniform.

【0006】(3) 第3の方法は、再結晶化法である。こ
の方法は、アモルファス又は多結晶半導体を絶縁基板上
に堆積した後、レーザー等で溶融し、単結晶化する方法
である。この方法は、膜厚均一性に優れているものの、
単結晶品質が悪く、又、製造コストが高くつくため、広
く集積回路の製造には用いられていない。
(3) The third method is a recrystallization method. This method is a method in which an amorphous or polycrystalline semiconductor is deposited on an insulating substrate and then melted by a laser or the like to form a single crystal. Although this method has excellent film thickness uniformity,
Due to poor single crystal quality and high manufacturing cost, it has not been widely used in the manufacture of integrated circuits.

【0007】これらの問題を解決するSOI基板作製方
法が、米原らにより提案された(特開平5−21338
号)。この方法は、多孔質半導体層上に単結晶半導体を
成長させた第1の基体と、表面が絶縁された第2の基体
を貼り合わせた後、第1の基体の多孔質半導体を選択除
去することにより、SOI基板を作製するものである。
本方法は、ウェハ貼合せ法と同等な結晶品質を保ちなが
ら、膜厚の均一な単結晶半導体を得る方法として、極め
て優れた作製方法である。本方法により、安価で高品質
なSOI基板を作製できる。
A method for manufacturing an SOI substrate which solves these problems has been proposed by Yonehara et al. (Japanese Patent Laid-Open No. 21338/1993).
issue). According to this method, a first substrate on which a single crystal semiconductor is grown on a porous semiconductor layer and a second substrate whose surface is insulated are bonded together, and then the porous semiconductor of the first substrate is selectively removed. By doing so, an SOI substrate is manufactured.
This method is an extremely excellent manufacturing method as a method for obtaining a single crystal semiconductor having a uniform film thickness while maintaining the crystal quality equivalent to that of the wafer bonding method. By this method, an inexpensive and high-quality SOI substrate can be manufactured.

【0008】以下、図9〜図11を用いて、上記のSO
I基板の作製方法について説明する。まず、半導体基板
表面を陽極化成法により多孔質化し、半導体基板202
表面に多孔質半導体層201を形成する(図9)。この
ときの多孔質半導体表面の概念図が図10である。なお
図10は図9のC部拡大図である。図10に示すよう
に、多孔質半導体は樹木の枝状の小孔204を多数有し
ている。
The above SO will be described below with reference to FIGS. 9 to 11.
A method of manufacturing the I substrate will be described. First, the surface of the semiconductor substrate is made porous by the anodization method, and the semiconductor substrate 202
A porous semiconductor layer 201 is formed on the surface (FIG. 9). FIG. 10 is a conceptual diagram of the surface of the porous semiconductor at this time. Note that FIG. 10 is an enlarged view of portion C of FIG. As shown in FIG. 10, the porous semiconductor has a large number of branch-shaped small holes 204 in a tree.

【0009】この後、エピタキシャル成長をさせること
により、多孔質半導体層201表面に単結晶層205を
形成する(図11)。なおエピタキシャル成長は100
0℃を超えると内部の孔の再配列等の構造変化が起こ
り、増速エッチングの特性が損なわれるため、エピタキ
シャル成長は1000℃以下が望ましいとされており、
分子線エピタキシー法、プラズマCVD法、減圧CVD
法、光CVD法、バイアス・スパッタ法などが用いられ
る。然る後、表面に例えば数千Åの絶縁膜213を有す
る基板212又は石英基板などと、上記ウェハを貼合せ
た後、半導体基板202、多孔質半導体層201を順次
エッチング除去し、SOI基板を得る(図12)。
After that, a single crystal layer 205 is formed on the surface of the porous semiconductor layer 201 by epitaxial growth (FIG. 11). Epitaxial growth is 100
When the temperature exceeds 0 ° C, structural changes such as rearrangement of internal holes occur and the characteristics of the enhanced etching are impaired. Therefore, it is desirable that the epitaxial growth be 1000 ° C or less.
Molecular beam epitaxy, plasma CVD, low pressure CVD
Method, optical CVD method, bias sputtering method, or the like is used. After that, after bonding the above wafer with a substrate 212 or a quartz substrate having an insulating film 213 of, for example, several thousand liters on its surface, the semiconductor substrate 202 and the porous semiconductor layer 201 are sequentially removed by etching to form an SOI substrate. To obtain (FIG. 12).

【0010】[0010]

【発明が解決しようとする課題】しかしながら、多孔質
半導体上への単結晶半導体成長を用いた従来のSOI基
板作製法は以下の様な課題を生ずる場合があった。
However, the conventional method for manufacturing an SOI substrate using the growth of a single crystal semiconductor on a porous semiconductor may cause the following problems.

【0011】エピタキシャル成長法の中で最も高品質な
単結晶が成長できるのは、シリコン化合物ガスの熱分解
を用いたCVD法であるが、化合物ガスとして用いられ
るSiH4 ,SiHCl3 ,SiH2 Cl2 ,SiCl
4 は1000℃以下の温度ではいずれも減圧下でのみエ
ピタキシャル成長することが可能である。例えばSiH
2 Cl2 を用いて950℃でエピタキシャル成長させる
場合、ガス圧を100Torr以下にする必要がある。
このことから以下の問題点を生ずる場合がある。
Among the epitaxial growth methods, the highest quality single crystal can be grown by the CVD method using the thermal decomposition of a silicon compound gas. SiH 4 , SiHCl 3 and SiH 2 Cl 2 used as the compound gas can be used. , SiCl
4 is capable of both at a temperature below 1000 ° C. to epitaxially grown only under reduced pressure. For example SiH
When epitaxially growing with 2 Cl 2 at 950 ° C., the gas pressure needs to be 100 Torr or less.
This may cause the following problems.

【0012】 減圧プロセスでは、装置内でのパーテ
ィクル発生が多い。これは、エピタキシャル成長装置で
は通常数十バッチの連続運転が行われるが、このような
装置では内壁にポリシリコン等のパーティクルを多く付
着させており、減圧下では、装置内で乱流が起きやすい
ため、装置のパーティクルが内壁から離脱し、ウェハ上
に付着するからである。
In the depressurization process, many particles are generated inside the apparatus. This is because in an epitaxial growth apparatus, several tens of batches are usually operated continuously, but in such an apparatus, many particles such as polysilicon are attached to the inner wall, and under reduced pressure, turbulent flow easily occurs in the apparatus. This is because the particles of the device separate from the inner wall and adhere to the wafer.

【0013】 一般に、たとえ単結晶成長する温度で
あっても、単結晶成長の臨界温度Tcに近づくにつれ、
結晶中の欠陥密度が増加する。これは、単結晶成長の
際、成長原子がマイグレートしにくくなり、格子位置に
正確に到達しない確率が高まるためと考えられる。同一
原料ガスで比較した場合、成長温度を出来るだけ高くし
た方が欠陥を生じる確率は下がる。
In general, even if the temperature for single crystal growth is approached, as the critical temperature Tc for single crystal growth is approached,
The defect density in the crystal increases. This is considered to be because it is difficult for the grown atoms to migrate during single crystal growth, and the probability that the lattice position does not reach the lattice position accurately increases. When the same source gas is used for comparison, the higher the growth temperature, the lower the probability of causing defects.

【0014】 多孔質半導体表面上にも欠陥が残留し
ているが、低温ではこの欠陥が充分除去されず、その上
に成長した単結晶半導体の欠陥が消えない。
Although defects remain on the surface of the porous semiconductor, the defects are not sufficiently removed at a low temperature and the defects of the single crystal semiconductor grown on the defects cannot be eliminated.

【0015】上記〜を模式的に図13,図14に示
した。図13は多孔質半導体201上にエピタキシャル
成長により単結晶半導体205を堆積した断面図を示し
ており、図14は絶縁膜を有する基体に貼り合わせた基
板の断面図を示すものである。
The above items 1 to 3 are schematically shown in FIGS. FIG. 13 shows a cross-sectional view in which a single crystal semiconductor 205 is deposited on the porous semiconductor 201 by epitaxial growth, and FIG. 14 shows a cross-sectional view of a substrate bonded to a base having an insulating film.

【0016】図13に示す、多孔質上に付着したパーテ
ィクル208や、単結晶成長中のパーティクル210、
又は格子欠陥、更に多孔質半導体上の欠陥より生じた単
結晶半導体の欠陥211はいずれも、図14に示すよう
に最終的な単結晶の欠陥となる。特にパーティクル性の
欠陥は、207,209で示したボイドを生じるため、
貼合せ工程後に単結晶層の欠落となり、SOI基板品質
を著しく劣化させる。
As shown in FIG. 13, particles 208 adhered on the porous layer, particles 210 during single crystal growth,
Alternatively, any of the lattice defects and the defects 211 of the single crystal semiconductor generated from the defects on the porous semiconductor are final single crystal defects as shown in FIG. In particular, particle-like defects cause the voids 207 and 209,
After the bonding step, the single crystal layer is missing, and the SOI substrate quality is significantly deteriorated.

【0017】本発明の1つの目的は、欠陥密度を著しく
低減させたエピタキシャル成長層を多孔質半導体上に形
成する方法を提供することにある。本発明の更なる目的
はSOI基板の単結晶半導体の品質を著しく向上させる
ことにある。
One object of the present invention is to provide a method for forming an epitaxial growth layer having a significantly reduced defect density on a porous semiconductor. A further object of the present invention is to significantly improve the quality of the single crystal semiconductor of the SOI substrate.

【0018】更に本発明の目的は、高品質のSOI基板
を再現性よく高い歩留りで製造する方法を提供すること
にある。
A further object of the present invention is to provide a method for producing a high quality SOI substrate with high reproducibility and high yield.

【0019】[0019]

【課題を解決するための手段】本発明の半導体単結晶の
成長方法は、多孔質半導体表面を絶縁物化して絶縁層を
形成する第1の工程と、前記絶縁層の少なくとも一部を
除去することにより前記多孔質半導体の露出表面を形成
する第2の工程と、還元性ガス又は還元性ガスを主成分
とする雰囲気中において、前記多孔質半導体が前記絶縁
層のない場合は構造変化を起こす第1の温度で、前記露
出表面を熱処理する第3の工程と、1気圧又はその近傍
の気圧のガス圧力中、前記第1の温度とほぼ同一又は前
記第1の温度より低い第2の温度にて、前記多孔質半導
体上に半導体単結晶を成長させる第4の工程と、を含む
ことを特徴とする。
According to the method for growing a semiconductor single crystal of the present invention, a first step of converting a porous semiconductor surface into an insulating material to form an insulating layer, and removing at least a part of the insulating layer. In the second step of forming the exposed surface of the porous semiconductor, and in the atmosphere containing a reducing gas or a reducing gas as a main component, the porous semiconductor causes a structural change when the insulating layer does not exist. A third step of heat-treating the exposed surface at a first temperature, and a second temperature which is substantially the same as the first temperature or lower than the first temperature in a gas pressure of 1 atm or near atmospheric pressure. And a fourth step of growing a semiconductor single crystal on the porous semiconductor.

【0020】本発明の貼り合わせ基板の製造方法は、上
記半導体単結晶の成長方法により半導体単結晶を成長さ
せた多孔質半導体の半導体単結晶面と絶縁性基体の絶縁
面とを貼り合わせたことを特徴とする。
In the method for producing a bonded substrate of the present invention, the semiconductor single crystal surface of the porous semiconductor on which the semiconductor single crystal is grown by the above semiconductor single crystal growth method and the insulating surface of the insulating substrate are bonded together. Is characterized by.

【0021】[0021]

【作用】本発明は、多孔質半導体表面を絶縁物化して絶
縁層を形成することで、多孔質半導体表面の枝状の小孔
の空間を酸化物で覆い、少なくともその一部を除去して
多孔質半導体表面を露出させ、次に還元性ガス中又は還
元性ガスを主成分とする雰囲気中において、前記多孔質
半導体が前記絶縁層のない場合は構造変化を起こす第1
の温度で、多孔質半導体露出表面を熱処理することで、
その表面を単結晶化させて薄い単結晶層を形成し、その
後その薄い単結晶層表面に、1気圧又はその近傍の気圧
のガス圧力中、前記第1の温度とほぼ同一又は前記第1
の温度より低い第2の温度にて、半導体単結晶を成長さ
せるものである。
According to the present invention, the space of the branch-like small holes on the surface of the porous semiconductor is covered with an oxide by forming the insulating layer by converting the surface of the porous semiconductor into an insulating material, and at least a part thereof is removed. First, the surface of the porous semiconductor is exposed, and then, in the reducing gas or in an atmosphere containing a reducing gas as a main component, the porous semiconductor causes a structural change when the insulating layer does not exist.
By heat-treating the exposed surface of the porous semiconductor at the temperature of
The surface is single-crystallized to form a thin single-crystal layer, and then, on the thin single-crystal layer surface, at a gas pressure of 1 atm or in the vicinity thereof, the temperature is almost the same as the first temperature or the first temperature.
The semiconductor single crystal is grown at a second temperature lower than the temperature of.

【0022】本発明においては、多孔質半導体表面の枝
状の小孔の空間が酸化物で覆われているため、1000
℃を超える温度で熱処理しても多孔質の構造変化は起き
ず、このため1気圧又はその近傍の気圧のガス圧力中で
単結晶を成長することが可能となる。また、還元性ガス
中又は還元性ガスを主成分とする雰囲気中における熱処
理により単結晶化された薄い単結晶層上に半導体単結晶
の堆積を行うので欠陥等の少ない単結晶の成長が可能と
なる。
In the present invention, since the space of the branch-like small holes on the surface of the porous semiconductor is covered with the oxide, 1000
Even if the heat treatment is performed at a temperature higher than 0 ° C, the structure of the porous structure does not change, and therefore, it becomes possible to grow a single crystal under a gas pressure of 1 atm or a pressure in the vicinity thereof. Further, since a semiconductor single crystal is deposited on a thin single crystal layer that has been single-crystallized by heat treatment in a reducing gas or in an atmosphere containing a reducing gas as a main component, it is possible to grow a single crystal with few defects. Become.

【0023】その結果、単結晶半導体中のパーティク
ル、欠陥を著しく低減させ、高品質のSOI基板を、安
価に再現性良く製造することができる。
As a result, particles and defects in the single crystal semiconductor can be remarkably reduced, and a high quality SOI substrate can be manufactured at low cost and with good reproducibility.

【0024】[0024]

【実施例】以下、本発明の実施例について図面を用いて
詳細に説明する。 〈実施例1〉図1〜図8を用いて本発明に係る貼り合わ
せ基板の製造方法の第1の実施例を示す。
Embodiments of the present invention will be described in detail below with reference to the drawings. <Embodiment 1> A first embodiment of the method for manufacturing a bonded substrate according to the present invention will be described with reference to FIGS.

【0025】まず、5インチの面方位(100)のp型
シリコン基板102表面をHF(49%)とC25
Hの2:1混合液中、0.01(A/cm2 )の電流密
度で陽極化成した。15分間化成することで約15μm
の多孔質シリコン層101を得た(図2)。多孔質シリ
コン層101の厚さは、SOI基板作製プロセスの際の
プロセスマージン及びウェハのそりを考慮して決められ
るもので、単結晶成長条件には多孔質シリコン層厚は影
響を与えない。
First, the surface of the p-type silicon substrate 102 having a plane orientation of 5 inches (100) is HF (49%) and C 2 H 5 O.
Anodization was carried out in a 2: 1 mixture of H at a current density of 0.01 (A / cm 2 ). About 15μm by forming for 15 minutes
A porous silicon layer 101 was obtained (FIG. 2). The thickness of the porous silicon layer 101 is determined in consideration of the process margin in the SOI substrate manufacturing process and the wafer warp, and the single crystal growth condition is not affected by the porous silicon layer thickness.

【0026】次に、300〜500℃中、乾燥酸素中で
1時間酸化した(図3)。この時の多孔質表面の部分断
面図を図4に示す。図4は図3のA部拡大図に対応す
る。図4に示すように、多孔質半導体表面は樹木の枝状
の小孔104を多数有し、酸化工程により多孔質半導体
表面には酸化層103aが形成され、小孔の空間は、酸
化物103bで覆われる。次に希HF(0.1〜5%)
中で10〜60secエッチングし、表面の酸化膜を除
去する(図5)。この時の多孔質表面の部分断面図を図
6に示す。図6は図5のB部拡大図に対応する。
Next, it was oxidized in dry oxygen at 300 to 500 ° C. for 1 hour (FIG. 3). A partial cross-sectional view of the porous surface at this time is shown in FIG. FIG. 4 corresponds to an enlarged view of part A of FIG. As shown in FIG. 4, the porous semiconductor surface has a large number of branch-like small holes 104 of a tree, an oxide layer 103a is formed on the surface of the porous semiconductor by the oxidation step, and the spaces of the small holes are oxide 103b. Covered with. Then dilute HF (0.1-5%)
Etching is performed for 10 to 60 seconds to remove the oxide film on the surface (FIG. 5). A partial cross-sectional view of the porous surface at this time is shown in FIG. FIG. 6 corresponds to an enlarged view of part B of FIG.

【0027】次に、基板をエピタキシャル成長炉に入
れ、単結晶を成長させる工程を経る。成長炉は日本アプ
ライドマテリアル社製のエピタキシャル成長炉を用い
た。基板はサセプターに設置された後、炉内の空気をN
2 ガス、その後H2 ガスで置換した。次に炉を1080
℃まで昇温させた。この温度で10分間保持させる。こ
の後の基板表面を図示したものが図1である。薄い酸化
膜を形成する工程により、1080℃で熱処理しても多
孔質層の樹木構造は構造変化をおこしていないが、表面
はシリコン原子のマイグレートと再配列が起こり、極薄
の単結晶層106となる。次にSiH2 Cl2 ガス50
0(ml/min)、H2 ガス200(l/min)を
導入し、1040℃,1気圧中でシリコン単結晶層10
5を1μm堆積させた。この時の断面図は図7である。
その後、炉は降温され、N2 で充分置換した後、炉より
とり出される。
Next, the substrate is placed in an epitaxial growth furnace and a single crystal is grown. The growth furnace used was an epitaxial growth furnace manufactured by Nippon Applied Materials. After the substrate is installed on the susceptor, the air in the furnace is
It was replaced with 2 gas and then with H 2 gas. Then the furnace is 1080
The temperature was raised to ° C. Hold at this temperature for 10 minutes. FIG. 1 shows the surface of the substrate after this. Due to the process of forming a thin oxide film, the tree structure of the porous layer does not change even after heat treatment at 1080 ° C, but the migration and rearrangement of silicon atoms occur on the surface, resulting in an extremely thin single crystal layer. It becomes 106. Next, SiH 2 Cl 2 gas 50
0 (ml / min) and H 2 gas 200 (l / min) were introduced, and the silicon single crystal layer 10 was heated at 1040 ° C. and 1 atm.
5 was deposited to 1 μm. A sectional view at this time is FIG. 7.
After that, the temperature of the furnace is lowered, and after being sufficiently replaced with N 2 , it is taken out of the furnace.

【0028】基板はその後、表面に4000Åの酸化膜
113を形成した第2のシリコン基板112と貼り合わ
せ装置にて貼り合わされた後、1000℃でN2 ガス
中、1時間の熱処理をおこない、貼り合わせ強度を向上
させた。
After that, the substrate was bonded to the second silicon substrate 112 having a 4000 Å oxide film 113 formed on the surface by a bonding apparatus, and then heat-treated at 1000 ° C. in N 2 gas for 1 hour to bond the substrate. Improves the bonding strength.

【0029】次に、従来通りの方法、即ち、グラインダ
ーで第1の基板の単結晶シリコン102を研削した後、
HF:H22 =1:5の混合液で多孔質シリコン層1
01を除去し、SOI基板を得た(図8)。
Next, the conventional method, that is, after grinding the single crystal silicon 102 of the first substrate by a grinder,
Porous silicon layer 1 with a mixed solution of HF: H 2 O 2 = 1: 5
01 was removed to obtain an SOI substrate (FIG. 8).

【0030】なお、本実施例では、単結晶成長前の熱処
理温度を1080℃としたが1000℃〜1150℃の
範囲が可能であり、望ましくは成長温度と同じ又はそれ
以上の温度がよい。時間も2分〜30分程度が可能であ
る。また成長温度は、SiH 2 Cl2 ガスを用いた場合
は、1020℃〜1100℃が可能である。成長温度の
最適化は、多孔質シリコン層101から、単結晶成長層
105へのp型不純物(ここではボロン原子)の混入の
許容量を考慮しておこなうのがよい。混入量はp型不純
物濃度により異なるが、例えば0.01〜0.02Ω・
mの比抵抗の基板を用いた場合、1040℃の成長で深
さ0.5μmまでボロンが混入する。混入したボロンは
エピタキシャル層の使用目的に応じ、他の基板を貼り合
わせた後に、酸化,エッチング,機械研磨等により、除
去することが可能である。
In this embodiment, the heat treatment before the single crystal growth is performed.
The processing temperature was set to 1080 ° C, but 1000 ° C to 1150 ° C
Range, preferably equal to or higher than the growth temperature
The above temperature is good. The time can be about 2 to 30 minutes
It The growth temperature is SiH 2 Cl2 When using gas
Can be from 1020 ° C to 1100 ° C. Of growth temperature
The optimization is from the porous silicon layer 101 to the single crystal growth layer.
Of p-type impurities (here, boron atom) into 105
It is better to consider the allowable amount. Mixing amount is p-type
Although it depends on the substance concentration, for example, 0.01 to 0.02 Ω
When using a substrate with a specific resistance of m
Boron is mixed up to 0.5 μm. The mixed boron is
Bond other substrates according to the purpose of using the epitaxial layer
After removing it, remove it by oxidation, etching, mechanical polishing, etc.
It is possible to leave.

【0031】なお、多孔質Siを作製するためには、正
孔が必要であり、N型Siに比べてP型Siの方が多孔
質Siに変質しやすい(長野、中島、安野、大中、梶
原、電子通信学会技術研究報告、vol.79,SSD79-9549(19
79) 、K.イマイ、Solid-State Electoronics,vol.24,
159(1981))。 しかし、N型Siも正孔の注入があれば、
多孔質Siに変質することが知られている(R.P.Holmst
rom and J.Y.Chi,Appl.Phys.Lett.,vol.42,386(198
3))。
It is to be noted that holes are required to produce porous Si, and P-type Si is more easily transformed into porous Si than N-type Si (Nagano, Nakajima, Anno, Ohnaka). , Kajiwara, Technical Report of IEICE, vol.79, SSD79-9549 (19
79), K .; Imai, Solid-State Electoronics, vol.24,
159 (1981)). However, if N-type Si is also injected with holes,
It is known to be transformed into porous Si (RP Holmst
rom and JYChi, Appl.Phys.Lett., vol.42,386 (198
3)).

【0032】更に成長ガスはSiH4 (モノシラン)ガ
ス、SiCl4 (四塩化シラン)ガス、SiHCl3
(トリクロロシラン)ガス、或いはSi26 (ジシラ
ン)ガス、Si38 (トリシラン)ガス等が可能であ
る。使用されるガスにより単結晶成長可能な温度範囲は
異なるが、一般に高温で成長をおこなう方が単結晶の結
晶性は良好である。更に成長中のガス流量は、例えばS
iH2 Cl2 流量50〜2000(ml/min)、H
2 流量50〜1000(l/min)が可能であるが、
使用した装置の構造において、適正な堆積速度と面内膜
厚分布が得られる条件を選んだ。堆積膜厚は、SOI基
板の使用目的に応じて自由に選択できるが、本実施例で
は、透過型液晶パネルの半導体基板として使用するため
に5000Å〜3μm程度とするのが適当であった。高
速の集積回路用に500〜5000Å、或いは高耐圧回
路用に3〜10μmとすることも可能である。
Further, the growth gas is SiH 4 (monosilane) gas, SiCl 4 (tetrachlorosilane) gas, SiHCl 3
(Trichlorosilane) gas, Si 2 H 6 (disilane) gas, Si 3 H 8 (trisilane) gas or the like is possible. Although the temperature range in which the single crystal can be grown differs depending on the gas used, the crystallinity of the single crystal is generally better when grown at a high temperature. Further, the gas flow rate during growth is, for example, S
iH 2 Cl 2 flow rate 50 to 2000 (ml / min), H
2 Flow rate of 50-1000 (l / min) is possible,
In the structure of the device used, conditions were selected that would give an appropriate deposition rate and in-plane film thickness distribution. The deposited film thickness can be freely selected according to the purpose of use of the SOI substrate, but in the present embodiment, it was suitable to be about 5000 Å to 3 μm for use as the semiconductor substrate of the transmissive liquid crystal panel. It is possible to set the thickness to 500 to 5000 Å for a high speed integrated circuit, or 3 to 10 μm for a high breakdown voltage circuit.

【0033】本実施例により、 減圧プロセスを必要としないため、ポンピングに起因
するパーティクルが全く発生しなくなった。従って、パ
ーティクルに起因するSOI基板の欠陥を完全に排除で
きた。 多孔質半導体表面を単結晶化したので、SOI基板の
結晶品質を著しく向上させることができた。 高温で結晶成長をおこなったので、結晶中の微小欠陥
や転位を著しく減少させることができた。
According to the present embodiment, no depressurization process is required, so that no particles due to pumping are generated. Therefore, the defects of the SOI substrate due to the particles could be completely eliminated. Since the surface of the porous semiconductor was single-crystallized, the crystal quality of the SOI substrate could be significantly improved. Since the crystal was grown at a high temperature, it was possible to remarkably reduce minute defects and dislocations in the crystal.

【0034】本実施例を実施することにより、単結晶品
質、膜厚分布が極めて優れたSOI基板を、再現性良く
低コストで生産するための技術が確立した。 〈実施例2〉本実施例では、図1で示した表面の単結晶
化工程を、電熱炉でおこなった。多孔質層を形成後、表
面を酸化し、その酸化膜を除去するまでの工程は実施例
1と全く同じである。
By carrying out this example, a technique for producing an SOI substrate having excellent single crystal quality and extremely excellent film thickness distribution with good reproducibility and at low cost was established. Example 2 In this example, the single crystallizing step of the surface shown in FIG. 1 was performed in an electric heating furnace. The steps from forming the porous layer to oxidizing the surface and removing the oxide film are exactly the same as in Example 1.

【0035】次に基板を、電気炉に入れ、N2 とH2
の混合ガス中で15分間熱処理した。N2 とH2 とを混
合させたのは、安全性を考慮したためであり、効果は同
じである。処理時間も5〜30分が可能である。温度は
第1実施例と同じ1080℃としたがこの温度に限定さ
れるものではない。
Next, the substrate was placed in an electric furnace and heat-treated for 15 minutes in a mixed gas of N 2 and H 2 . The reason why N 2 and H 2 are mixed is because safety is taken into consideration, and the effect is the same. The processing time can be 5 to 30 minutes. The temperature was set to 1080 ° C. as in the first embodiment, but the temperature is not limited to this.

【0036】その後、エピタキシャル成長炉で1040
℃、1気圧、SiH2 Cl2 ガスを熱分解して1μmの
単結晶シリコンを成長させた。この後の工程は実施例1
と全く同じである。
After that, in an epitaxial growth furnace, 1040
SiH 2 Cl 2 gas was thermally decomposed at 1 ° C. and 1 atm to grow 1 μm single crystal silicon. The subsequent steps are the same as in Example 1.
Is exactly the same as

【0037】本実施例によっても第1実施例と同じく、
結晶品質が極めて優れ、膜厚分布の良好なSOI基板を
再現性よく製造することができた。即ち、 パーティクル低減効果を得ることができた。 多孔質表面の結晶性改善効果を得ることができた。 高温による微小欠陥、転位密度の低減効果が得られ
た。そのため、SOI基板の品質歩留り向上に著しく貢
献することとなった。
According to this embodiment, as in the first embodiment,
It was possible to reproducibly manufacture an SOI substrate having extremely excellent crystal quality and a good film thickness distribution. That is, the particle reducing effect could be obtained. The effect of improving the crystallinity of the porous surface could be obtained. The effect of reducing micro defects and dislocation density due to high temperature was obtained. Therefore, the quality yield of the SOI substrate is significantly improved.

【0038】更に、熱処理装置と成長炉とを分離するこ
とにより、 多孔質中の不純物が成長膜に入りにくい。 多孔質中の不純物が、エピタキシャル成長炉を汚染し
にくい。 などの効果が得られた。
Furthermore, by separating the heat treatment apparatus and the growth furnace, it is difficult for impurities in the porous material to enter the growth film. Impurities in the porous structure are unlikely to contaminate the epitaxial growth furnace. The effect such as was obtained.

【0039】これらの効果もSOI基板の品質及び量産
性の向上に寄与するものであった。
These effects also contributed to the improvement of the quality and mass productivity of the SOI substrate.

【0040】[0040]

【発明の効果】以上詳細に説明したように、本発明によ
れば、 減圧プロセスを必要としないため、ポンピングに起
因するパーティクルの発生を完全に抑えることができ
る。従って、パーティクルに起因するSOI基板の欠陥
を完全に排除することができる。 多孔質半導体表面を単結晶化したので、SOI基板
の結晶品質を著しく向上させることができる。 高温で結晶成長をおこなうことができるので、結晶
中の微小欠陥や転位が著しく減少させることができ、S
OI基板の品質歩留りを向上させることができる。
As described in detail above, according to the present invention, since the depressurization process is not required, the generation of particles due to pumping can be completely suppressed. Therefore, the defects of the SOI substrate caused by the particles can be completely eliminated. Since the surface of the porous semiconductor is single-crystallized, the crystal quality of the SOI substrate can be significantly improved. Since the crystal can be grown at a high temperature, minute defects and dislocations in the crystal can be remarkably reduced.
It is possible to improve the quality yield of the OI substrate.

【0041】したがって、単結晶品質、膜厚分布が極め
て優れたSOI基板を、再現性良く低コストで生産する
ことができる。
Therefore, it is possible to produce an SOI substrate having excellent single crystal quality and extremely excellent film thickness distribution with good reproducibility and at low cost.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の半導体単結晶の成長方法の製造工程を
説明するための概略的な部分拡大断面図である。
FIG. 1 is a schematic partially enlarged cross-sectional view for explaining a manufacturing process of a semiconductor single crystal growth method of the present invention.

【図2】本発明に係るSOI基板の製造工程を説明する
ための断面図である。
FIG. 2 is a cross-sectional view for explaining a manufacturing process of an SOI substrate according to the present invention.

【図3】本発明に係るSOI基板の製造工程を説明する
ための断面図である。
FIG. 3 is a cross-sectional view for explaining a manufacturing process of an SOI substrate according to the present invention.

【図4】図3のA部の概略的な部分拡大断面図である。FIG. 4 is a schematic partially enlarged cross-sectional view of part A in FIG.

【図5】本発明に係るSOI基板の製造工程を説明する
ための断面図である。
FIG. 5 is a cross-sectional view for explaining the manufacturing process of the SOI substrate according to the present invention.

【図6】図5のB部の概略的な部分拡大断面図である。6 is a schematic partial enlarged cross-sectional view of a B part in FIG.

【図7】本発明に係るSOI基板の製造工程を説明する
ための断面図である。
FIG. 7 is a cross-sectional view for explaining a manufacturing process of an SOI substrate according to the present invention.

【図8】本発明に係るSOI基板の製造工程を説明する
ための断面図である。
FIG. 8 is a cross-sectional view for explaining the manufacturing process of the SOI substrate according to the present invention.

【図9】従来例に係るSOI基板の製造工程を説明する
ための断面図である。
FIG. 9 is a cross-sectional view for explaining the manufacturing process of the SOI substrate according to the conventional example.

【図10】図9のC部の概略的な部分拡大断面図であ
る。
FIG. 10 is a schematic partial enlarged cross-sectional view of a C part in FIG.

【図11】従来例に係るSOI基板の製造工程を説明す
るための断面図である。
FIG. 11 is a cross-sectional view for explaining the manufacturing process of the SOI substrate according to the conventional example.

【図12】従来例に係るSOI基板の製造工程を説明す
るための断面図である。
FIG. 12 is a cross-sectional view for explaining the manufacturing process of the SOI substrate according to the conventional example.

【図13】従来の製造方法による課題を説明するための
作製された貼り合わせ基板を示す断面図である。
FIG. 13 is a cross-sectional view showing a produced bonded substrate for explaining the problems caused by the conventional manufacturing method.

【図14】従来の製造方法による課題を説明するための
作製されたSOI基板を示す断面図である。
FIG. 14 is a cross-sectional view showing a manufactured SOI substrate for explaining a problem caused by a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

101 多孔質半導体層 102 半導体基板 103 多孔質半導体酸化層 103a,103b 酸化物 104 樹木の枝状の小孔 105 単結晶層 106 薄い単結晶層 101 Porous Semiconductor Layer 102 Semiconductor Substrate 103 Porous Semiconductor Oxide Layer 103a, 103b Oxide 104 Branch-like Small Trees 105 Single Crystal Layer 106 Thin Single Crystal Layer

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 多孔質半導体表面を絶縁物化して絶縁層
を形成する第1の工程と、 前記絶縁層の少なくとも一部を除去することにより前記
多孔質半導体の露出表面を形成する第2の工程と、 還元性ガス又は還元性ガスを主成分とする雰囲気中にお
いて、前記多孔質半導体が前記絶縁層のない場合は構造
変化を起こす第1の温度で、前記露出表面を熱処理する
第3の工程と、 1気圧又はその近傍の気圧のガス圧力中、前記第1の温
度とほぼ同一又は前記第1の温度より低い第2の温度に
て、前記多孔質半導体上に半導体単結晶を成長させる第
4の工程と、 を含む半導体単結晶の成長方法。
1. A first step of converting a surface of a porous semiconductor into an insulating material to form an insulating layer, and a second step of forming an exposed surface of the porous semiconductor by removing at least a part of the insulating layer. And a step of heat-treating the exposed surface at a first temperature that causes a structural change in the case where the porous semiconductor does not have the insulating layer in a reducing gas or an atmosphere containing a reducing gas as a main component. And a step of: growing a semiconductor single crystal on the porous semiconductor at a second pressure that is substantially the same as the first temperature or lower than the first temperature in a gas pressure of 1 atm or in the vicinity thereof. A fourth step, and a method for growing a semiconductor single crystal, including:
【請求項2】 前記絶縁物は前記多孔質半導体の酸化物
であることを特徴とする請求項1記載の半導体単結晶の
成長方法。
2. The method for growing a semiconductor single crystal according to claim 1, wherein the insulator is an oxide of the porous semiconductor.
【請求項3】 前記還元性ガスは水素ガスであることを
特徴とする請求項1記載の半導体単結晶の成長方法。
3. The method for growing a semiconductor single crystal according to claim 1, wherein the reducing gas is hydrogen gas.
【請求項4】 前記多孔質半導体はp型半導体であるこ
とを特徴とする請求項1記載の半導体単結晶の成長方
法。
4. The method for growing a semiconductor single crystal according to claim 1, wherein the porous semiconductor is a p-type semiconductor.
【請求項5】 請求項1記載の半導体単結晶の成長方法
により半導体単結晶を成長させた多孔質半導体の半導体
単結晶面と絶縁性基体の絶縁面とを貼り合わせたことを
特徴とする貼り合わせ基板の製造方法。
5. A bonding method, characterized in that the semiconductor single crystal surface of a porous semiconductor on which a semiconductor single crystal is grown by the method of growing a semiconductor single crystal according to claim 1 and the insulating surface of an insulating substrate are bonded to each other. Manufacturing method of laminated substrate.
JP32029393A 1993-12-20 1993-12-20 Method of manufacturing bonded substrate and method of manufacturing semiconductor substrate Expired - Fee Related JP3352196B2 (en)

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JPH07176487A true JPH07176487A (en) 1995-07-14
JP3352196B2 JP3352196B2 (en) 2002-12-03

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