JPH07170744A - Power-factor improving power supply device - Google Patents

Abstract

PURPOSE:To prevent the damage of one electrolytic capacitor due to the short circuit of the other electrolytic capacitor in the two electrolytic capacitors connected in series for smoothing. CONSTITUTION:A series voltage divider circuit consisting of an eighth resistor 39 connected in parallel with a second electrolytic capacitor 37 and a nineth resistor 40, a transistor 35 connected to the ground side of a series voltage divider circuit composed of a sixth resistor 33 for detecting the output voltage of a chopper circuit and a seventh resistor 34 and turned off when the voltage divider output of the series voltage divider circuit consisting of the eighth resistor 39 and the nineth resistor 40 reaches 0V, and a control circuit 28 controlling chopping by an FET 25 by the voltage divider output of the series voltage divider circuit made up of the sixth resistor 33 and the seventh resistor 34 are provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power factor correction type power supply device for chopping and rectifying and smoothing a DC current from a DC power supply.

[0002]

2. Description of the Related Art An example of a circuit of a conventional power factor correction type power supply device is shown in FIG. The AC current supplied from the AC power supply 1 is
It is supplied to the diode bridge 3 via the noise filter 2 and full-wave rectified by the diode bridge 3. One end of an inductor 4 is connected to the positive terminal of this diode bridge 3, and the other end of this inductor 4 is
N-channel FET for chopping (fie
The drain terminal of ld effect transistor 5 is connected. The source terminal of the FET 5 is connected to the negative terminal of the diode bridge 3 via the first resistor 6.

The gate terminal of the FET 5 is connected to the Do output terminal of the control circuit 8 via the second resistor 7. The connection point between the source terminal of the FET 5 and the first resistor 6 is connected to the V of the control circuit 8 via the third resistor 9.
It is connected to the cs input terminal.

A series voltage dividing circuit composed of a fourth resistor 10 and a fifth resistor 11 is connected between the positive terminal and the negative terminal of the diode bridge 3, and the voltage dividing output of the series voltage dividing circuit is connected. The point is connected to the Vm input terminal of the control circuit 8.

The connection point between the other end of the inductor 4 and the drain terminal of the FET 5 is connected to the anode terminal of the diode 12, and between the cathode terminal of the diode 12 and the negative terminal of the diode bridge 3. Is connected to a series voltage dividing circuit composed of a sixth resistor 13 and a seventh resistor 14, and the voltage dividing output point of this series voltage dividing circuit is
It is connected to the Vf input terminal of the control circuit 8.

The control circuit 8 receives power from the driving power source Vcc and flows into the full-wave rectified direct current voltage (input voltage) obtained from the Vm input terminal and the FET 5 obtained from the Vcs input terminal. Vf based on the voltage of the current, that is, the inductor current, and the voltage of the chopping output current obtained from the Vf input terminal, that is, the output voltage.
The FET 5 is controlled by the output signal from the Do output terminal so that the output voltage obtained from the input terminal becomes the set voltage.

The inductor 4 and the FET described above
5, the control circuit 8, a series voltage dividing circuit including the fourth resistor 10 and the fifth resistor 11, the diode 1
2. A chopper circuit is formed by a series voltage dividing circuit including the sixth resistor 13 and the seventh resistor 14.

A series circuit composed of a first electrolytic capacitor 15 and a second electrolytic capacitor 16 for smoothing is connected between the cathode terminal of the diode 12 and the negative terminal of the diode bridge 3. There is. A load 17 is connected between both ends of this series circuit.

The chopper circuit described above is used as a step-up chopper for boosting the output voltage to a higher voltage with respect to the input voltage from the diode bridge 53, and the control circuit 8 turns on the FET 5 to turn the inductor 4 on. Energy is stored in the FET, and then the FET 5 is turned off to release the energy of the inductor 4 so that chopping is performed to maintain the sine wave of the alternating current and the alternating voltage in the same phase. It will improve.

Therefore, the output voltage from the chopper circuit is
Since the voltage becomes instantaneously high, it is necessary to use a capacitor having a high breakdown voltage as a smoothing capacitor for smoothing the output voltage.

However, as shown in FIG. 4, if the first electrolytic capacitor 15 and the second electrolytic capacitor 16 are connected in series, the output voltage is divided and each electrolytic capacitor 15,
16 can be applied to each electrolytic capacitor 1
As the elements 5 and 16, those having a relatively low breakdown voltage can be used.

[0012]

By the way, as the capacitance of the electrolytic capacitor increases, the package shape also increases, and the exterior of the package of the electrolytic capacitor is connected to the negative electrode. Therefore, when the mounting space for mounting is small, the exteriors of the electrolytic capacitors may come into contact with each other.

In the example in which the above-mentioned conventional electrolytic capacitors are connected in series, when the outer casings of the first electrolytic capacitor 15 and the second electrolytic capacitor 16 come into contact with each other, the negative terminal of the first capacitor 15 is Diode bridge 3
Short circuit to the negative electrode terminal of the first electrolytic capacitor 1
5, the output voltage is not applied to the voltage divided into two, but the output voltage is applied as it is, and the voltage higher than the withstand voltage is applied to the first electrolytic capacitor 15. There is a problem that 15 may be damaged.

Further, there is a problem that even if the second electrolytic capacitor 16 is short-circuited due to a defect or deterioration, the first electrolytic capacitor may be damaged.

Therefore, the present invention provides a power factor improving power supply device capable of preventing damage to the other electrolytic capacitor due to a short circuit of one electrolytic capacitor in two electrolytic capacitors connected in series for smoothing. The purpose is to

[0016]

According to the present invention, there is provided a chopper circuit which is provided with an inductor and a switching element and chops a DC current obtained from a DC power source by controlling the switching of the switching element, and the output voltage from the chopper circuit is rectified. In a power factor correction type power supply device having a smoothing circuit in which a diode and a pair of electrolytic capacitors that smooth the rectified output from this diode are connected in series, the connection point between the electrolytic capacitors is at least the terminal on the negative side of the smoothing circuit. And a chopping stopping means for stopping chopping of the chopper circuit when a short circuit is detected by the short circuit detecting means.

[0017]

In the present invention having such a structure, the short-circuit detecting means detects whether or not the connection point between the pair of electrolytic capacitors connected in series is short-circuited with at least the negative terminal of the smoothing circuit. .

When the short-circuit detecting means detects a short-circuit between the connection point between the electrolytic capacitors and at least the negative terminal of the smoothing circuit, the chopping stopping means stops the chopping of the chopper circuit.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of essential parts showing a power factor improving power supply device of a first embodiment to which the present invention is applied.

The AC current supplied from the AC power supply 21 is
Through the noise filter 22, the diode bridge 23
And is full-wave rectified by the diode bridge 23. One end of an inductor 24 is connected to the positive terminal of the diode bridge 23, and the drain terminal of an N-channel FET (field effect transistor) 25 for performing chopping is connected to the other end of the inductor 24. There is. The source terminal of the FET 25 is connected to the negative terminal of the diode bridge 23 via the first resistor 26.

The AC power supply 21, the noise filter 22 and the diode bridge 23 constitute a DC power supply.

The gate terminal of the FET 25 is connected to the Do output terminal of the control circuit 28 via the second resistor 27. The connection point between the source terminal of the FET 25 and the first resistor 26 is connected to the Vcs input terminal of the control circuit 28 via the third resistor 29.

A fourth resistor 30 and a fifth resistor 31 are provided between the positive electrode terminal and the negative electrode terminal of the diode bridge 23.
Is connected to the Vm input terminal of the control circuit 28. The voltage dividing output point of the series voltage dividing circuit is connected to the Vm input terminal of the control circuit 28.

The other end of the inductor 24 and the FET 2
The connection point with the drain terminal of 5 is connected to the anode terminal of the diode 32, and the cathode terminal of the diode 32 is connected to the series voltage dividing circuit including the sixth resistor 33 and the seventh resistor 34. Between the series voltage dividing circuit and the negative terminal of the diode bridge 23,
A PN type transistor 35 is connected. The voltage dividing output point of the series voltage dividing circuit is connected to the Vf input terminal of the control circuit 28.

The control circuit 28 is supplied with power from the driving power source Vcc, and the full-wave rectified direct current voltage (input voltage) obtained from the Vm input terminal and the current flowing through the FET 25 obtained from the Vcs input terminal. , That is, based on the voltage of the inductor current and the voltage of the chopping output current obtained from the Vf input terminal, that is, the output voltage, V
The FET 25 is controlled by the output signal from the Do output terminal so that the output voltage obtained from the f input terminal becomes the set voltage.
To control.

The inductor 24 and the FET described above
25, the control circuit 28, a series voltage dividing circuit composed of the fourth resistor 30 and the fifth resistor 31, a series voltage dividing circuit of the diode 32, the sixth resistor 33 and the seventh resistor 34. A chopper circuit is formed by the circuit and the like.

Between the cathode terminal of the diode 32 and the negative terminal of the diode bridge 23,
A series circuit including a smoothing first electrolytic capacitor 36 and a second electrolytic capacitor 37 is connected. A load 38 is connected across the series circuit.

Further, a series voltage dividing circuit consisting of an eighth resistor 39 and a ninth resistor 40 is connected in parallel with the second electrolytic capacitor 37, and the voltage dividing output point of this series voltage dividing circuit is It is connected to the base terminal of the transistor 35.

The eighth resistor 39 and the ninth resistor 40
The series voltage dividing circuit composed of and constitutes a short circuit detecting means, and the transistor 35 constitutes a chopping stopping means.

In this embodiment having such a structure, when the outer casings of the first electrolytic capacitor 36 and the second electrolytic capacitor 37 are in contact with each other, or due to deterioration of the second electrolytic capacitor 37 or the like. When the positive electrode terminal and the negative electrode terminal are short-circuited, the voltage division output of the series voltage dividing circuit including the eighth resistor 39 and the ninth resistor 40 becomes the ground (0 V), so that the transistor 35 is turned off. Operate.

Then, the sixth resistor 33 and the seventh resistor 34
Assuming that the voltage-divided output of the series voltage dividing circuit with the voltage V0 is the cathode terminal potential of the diode 32, the internal impedance of the control circuit 28 is RFB, and the resistance value of the sixth resistor 33 is R33,
At the Vf input terminal of the control circuit 28, {RFB / (RFB + R
33)} V0 is applied.

Therefore, since the control circuit 28 determines that the output voltage is sufficiently higher than the input voltage, D
The ON / OFF operation of the FET 25 is stopped by the control signal output from the o output terminal to the gate terminal of the FET 25, and the chopping is stopped.

As a result, the voltage supplied from the cathode terminal of the diode 32 to the load 38 drops to the voltage (input voltage) of the full-wave rectified current obtained by the diode bridge 23, so that the withstand voltage of the first electrolytic capacitor 36 is reduced. It becomes a lower potential.

As described above, according to this embodiment, the output voltage of the chopper circuit and the series voltage dividing circuit composed of the eighth resistor 39 and the ninth resistor 40 connected in parallel to the second electrolytic capacitor 37. Is connected to the ground side of a series voltage dividing circuit composed of a sixth resistor 33 and a seventh resistor 34, and is divided by a series voltage dividing circuit consisting of an eighth resistor 39 and a ninth resistor 40. A transistor 35 that is turned off when the voltage output becomes 0V, and a control circuit 28 that controls chopping by the FET 25 by the voltage division output of the series voltage dividing circuit including the sixth resistor 33 and the seventh resistor 34 are provided. As a result, when the positive electrode terminal and the negative electrode terminal of the second electrolytic capacitor 37 are short-circuited, the voltage division output of the series voltage dividing circuit including the eighth resistor 39 and the ninth resistor 40 becomes 0 V, and the transistor 35 is turned off. Shi , The sixth resistor 33 and the seventh resistor 3 of the
Since the divided voltage output of the serial voltage dividing circuit composed of 4 and 4 is increased, the chopping by the FET 25 is stopped by the control circuit 28. Therefore, the voltage applied to the first electrolytic capacitor 36 drops to the voltage of the full-wave rectified current obtained by the diode bridge 23, so that the damage of the first electrolytic capacitor 36 can be reliably prevented.

FIG. 2 is a circuit diagram of essential parts showing a power factor improving power supply device according to a second embodiment of the present invention.

The AC current supplied from the AC power supply 51 is
Through the noise filter 52, the diode bridge 53
And is full-wave rectified by the diode bridge 53. One end of an inductor 54 is connected to the positive terminal of the diode bridge 53, and the drain terminal of an N-channel FET 55 for chopping is connected to the other end of the inductor 54. The source terminal of the FET 55 is connected to the negative terminal of the diode bridge 53 via the first resistor 56.

A DC power supply is constituted by the AC power supply 51, the noise filter 52 and the diode bridge 53.

The gate terminal of the FET 55 is connected to the Do output terminal of the control circuit 58 via the second resistor 57. The connection point between the source terminal of the FET 55 and the first resistor 56 is connected to the Vcs input terminal of the control circuit 58 via the third resistor 59.

A fourth resistor 60 and a fifth resistor 61 are provided between the positive electrode terminal and the negative electrode terminal of the diode bridge 53.
Is connected to the Vm input terminal of the control circuit 58. The voltage dividing output point of the series voltage dividing circuit is connected to the Vm input terminal of the control circuit 58.

The other end of the inductor 54 and the FET 5
The connection point of the diode 5 with the drain terminal is connected to the anode terminal of the diode 62, and the sixth resistor 63 and the seventh resistor 63 are provided between the cathode terminal of the diode 62 and the negative terminal of the diode bridge 53. A series voltage dividing circuit including a resistor 64 is connected. The voltage dividing output point of the series voltage dividing circuit is connected to the Vf input terminal of the control circuit 58.

The control circuit 58 controls the drive power source Vcc to N
Power is supplied through the PN transistor 65,
Full-wave rectified DC current voltage obtained from Vm input terminal
(Input voltage) and the FET obtained from the Vcs input terminal
The current flowing through 55, that is, the voltage of the inductor current,
Based on the voltage of the chopping output current obtained from the Vf input terminal, that is, the output voltage, the FET 55 is controlled by the output signal from the Do output terminal so that the output voltage obtained from the Vf input terminal becomes the set voltage.

The inductor 54 and the FET described above
55, the control circuit 58, a series voltage dividing circuit composed of the fourth resistor 60 and the fifth resistor 61, the diode 62, the series voltage dividing of the sixth resistor 63 and the seventh resistor 64 A chopper circuit is formed by the circuit and the like.

Further, between the cathode terminal of the diode 62 and the negative terminal of the diode bridge 53,
A series circuit including a smoothing first electrolytic capacitor 66 and a second electrolytic capacitor 67 is connected. A load 68 is connected across the series circuit.

Further, a series voltage dividing circuit composed of an eighth resistor 69 and a ninth resistor 70 is connected in parallel with the second electrolytic capacitor 67, and the voltage dividing output point of this series voltage dividing circuit is It is connected to the base terminal of the transistor 65.

The eighth resistor 69 and the ninth resistor 70
The serial voltage dividing circuit consisting of and constitutes a short circuit detecting means, and the transistor 65 constitutes a chopping stopping means.

In this embodiment having such a configuration, when the outer casings of the first electrolytic capacitor 66 and the second electrolytic capacitor 67 contact each other, or due to deterioration of the second electrolytic capacitor 67 or the like. When the positive electrode terminal and the negative electrode terminal are short-circuited, the voltage division output of the series voltage dividing circuit composed of the eighth resistor 69 and the ninth resistor 70 becomes the ground (0 V), so that the transistor 65 is turned off. Operate.

Then, the power supply from the driving power source Vcc to the control circuit 58 is cut off by the off operation of the transistor 65, and the operation of the control circuit 58 is stopped. Therefore, the FET
The on / off operation of 55 stops and chopping stops.

As a result, the voltage supplied from the cathode terminal of the diode 62 to the load 68 decreases to the voltage of the full-wave rectified current (input voltage) obtained by the diode bridge 53, and the withstand voltage of the first electrolytic capacitor 66 exceeds the withstand voltage. It becomes a low potential.

As described above, according to the present embodiment, the series voltage dividing circuit including the eighth resistor 69 and the ninth resistor 70 connected in parallel to the second electrolytic capacitor 67, and this series voltage dividing circuit. Of the transistor 65 which is turned off when the divided voltage output of 0 becomes 0V and the driving power supply Vcc via this transistor 65.
When the positive terminal and the negative terminal of the second electrolytic capacitor 37 are short-circuited by providing the control circuit 58 for inputting electric power from the FET 55 and controlling the chopping by the FET 55,
The voltage divider output of the series voltage divider becomes 0V, and the transistor 6
5 is turned off, the power supply from the drive power supply to the control circuit 58 is cut off, and the chopping by the FET 55 is stopped. Therefore, the voltage applied to the first electrolytic capacitor 66 is reduced to the voltage of the full-wave rectified current obtained by the diode bridge 53, so that the damage of the first electrolytic capacitor 66 can be reliably prevented.

FIG. 3 is a circuit diagram of essential parts showing a power factor improving power supply device according to a third embodiment of the present invention.

The AC current supplied from the AC power supply 81 is
Through the noise filter 82, the diode bridge 83
And is full-wave rectified by the diode bridge 83. One end of an inductor 84 is connected to the positive terminal of the diode bridge 83, and the drain terminal of an N-channel type FET 85 for performing chopping is connected to the other end of the inductor 84. The source terminal of the FET 85 is connected to the negative terminal of the diode bridge 83 via the first resistor 86.

The AC power supply 81, the noise filter 82 and the diode bridge 83 constitute a DC power supply.

The gate terminal of the FET 85 is connected to the Do output terminal of the control circuit 88 via the second resistor 87. The connection point between the source terminal of the FET 85 and the first resistor 86 is connected to the Vcs input terminal of the control circuit 88 via the third resistor 89.

Further, the Do output terminal of the control circuit 88 is connected to the negative terminal of the diode bridge 83 via a PNP type transistor 90.

A fourth resistor 91 and a fifth resistor 92 are provided between the positive electrode terminal and the negative electrode terminal of the diode bridge 83.
Is connected to the Vm input terminal of the control circuit 88. The voltage dividing output point of the series voltage dividing circuit is connected to the Vm input terminal of the control circuit 88.

The other end of the inductor 84 and the FET 8
5 is connected to the anode terminal of the diode 93, and the sixth resistor 94 and the seventh resistor 94 are connected between the cathode terminal of the diode 93 and the negative terminal of the diode bridge 83. A series voltage dividing circuit including a resistor 95 is connected. The voltage dividing output point of the series voltage dividing circuit is connected to the Vf input terminal of the control circuit 88.

The control circuit 88 receives power from the driving power source Vcc and receives the full-wave rectified DC current voltage (input voltage) obtained from the Vm input terminal and the current flowing through the FET 85 obtained from the Vcs input terminal. , That is, based on the voltage of the inductor current and the voltage of the chopping output current obtained from the Vf input terminal, that is, the output voltage, V
The FET85 is controlled by the output signal from the Do output terminal so that the output voltage obtained from the f input terminal becomes the set voltage.
To control.

The inductor 84 and the FET described above
85, the control circuit 88, a series voltage dividing circuit composed of the fourth resistor 91 and the fifth resistor 92, a series voltage dividing circuit of the diode 93, the sixth resistor 94 and the seventh resistor 95. A chopper circuit is formed by the circuit and the like.

Between the cathode terminal of the diode 93 and the negative terminal of the diode bridge 83,
A series circuit including a smoothing first electrolytic capacitor 96 and a second electrolytic capacitor 97 is connected. A load 98 is connected across the series circuit.

Further, a series voltage dividing circuit composed of an eighth resistor 99 and a ninth resistor 100 is connected in parallel with the second electrolytic capacitor 97, and the voltage dividing output point of this series voltage dividing circuit is It is connected to the base terminal of the transistor 90 via the tenth resistor 101.

The eighth resistor 99 and the ninth resistor 10
The series voltage dividing circuit consisting of 0 and 0 constitutes short-circuit detecting means,
The transistor 90 constitutes a chopping stopping means.

In this embodiment having such a structure, when the outer casings of the first electrolytic capacitor 96 and the second electrolytic capacitor 97 are in contact with each other, or due to deterioration of the second electrolytic capacitor 97 or the like. When the positive electrode terminal and the negative electrode terminal are short-circuited, the voltage division output of the series voltage dividing circuit including the eighth resistor 99 and the ninth resistor 100 becomes the ground (0V), so that the PNP transistor is used. 90
Works on.

Then, the potential of the gate terminal of the FET 85 is forcibly set to the ground (0 V), so that the on / off operation of the FET 85 is stopped and the chopping is stopped.

As a result, the voltage supplied from the cathode terminal of the diode 93 to the load 98 is reduced to the voltage (input voltage) of the full-wave rectified current obtained by the diode bridge 83, which is higher than the withstand voltage of the first electrolytic capacitor 96. It becomes a low potential.

As described above, according to this embodiment, the control circuit 8
FET85 for chopping by control signal from 8
And the eighth electrolytic capacitor 97 connected in parallel to the second electrolytic capacitor 97.
Is connected between the gate terminal of the FET 85 and the ground, and is turned on when the voltage division output of the series voltage divider circuit becomes 0V. By providing the transistor 90, when the positive terminal and the negative terminal of the second electrolytic capacitor 97 are short-circuited, the voltage division output of the series voltage dividing circuit becomes 0 V, the transistor 90 is turned on, and the gate terminal of the FET 85 is turned on. The potential of is forced to 0V, and this FET85
Chopping by is stopped. Therefore, the voltage applied to the first electrolytic capacitor 96 is reduced to the voltage of the full-wave rectified current obtained by the diode bridge 83, so that the damage of the first electrolytic capacitor 96 can be reliably prevented.

In this embodiment, a series voltage dividing circuit consisting of an eighth resistor and a ninth resistor is connected in parallel with the second electrolytic capacitor side to stop the chopping by the FET. However, the present invention is not limited to this and can be modified without departing from the gist of the present invention. For example, in addition to the eighth resistor and the ninth resistor connected in parallel to the second electrolytic capacitor, a series voltage dividing circuit including two resistors is provided in parallel to the first electrolytic capacitor, Even when the voltage dividing output point of the voltage dividing circuit exceeds the upper limit voltage, the FET
It is also possible to stop the chopping by. Alternatively, when a resistance is connected in parallel to each of the first electrolytic capacitor and the second electrolytic capacitor, and the divided voltage output of the series voltage dividing circuit composed of these resistors becomes 0 V or the upper limit voltage or more, the FET It is also possible to stop the chopping by.

[0068]

As described above in detail, according to the present invention,
A DC current from a DC power source is chopped by a chopper circuit, and the chopped voltage is smoothed by a series circuit consisting of a pair of electrolytic capacitors via diodes. By this, when one electrolytic capacitor is short-circuited, this short-circuited condition can be detected and chopping of the chopper circuit can be stopped, so that the voltage applied to the other electrolytic capacitor can be reduced, A power factor correction type power supply device capable of preventing the electrolytic capacitor from being damaged can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of a main part of a power factor correction type power supply device according to a first embodiment of the present invention.

FIG. 2 is a block diagram showing a circuit configuration of a main part of a power factor correction type power supply device according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing a circuit configuration of essential parts of a power factor correction type power supply device according to a third embodiment of the present invention.

FIG. 4 is a block diagram showing a circuit configuration of a main part of a conventional power factor correction type power supply device.

[Explanation of symbols]

25 ... FET, 28 ... Control circuit, 33, 34, 39, 4
0 ... Resistance, 35 ... Transistor, 36, 37 ... Electrolytic capacitor.

Claims (1)

[Claims] 1. A chopper circuit, comprising an inductor and a switching element, for chopping a DC current obtained from a DC power supply by controlling the switching of the switching element, a diode for rectifying an output voltage from the chopper circuit, and a diode for rectifying the output voltage from the chopper circuit. In a power factor correction type power supply device having a smoothing circuit formed by connecting a pair of electrolytic capacitors for smoothing the rectified output in series, is the connection point between the electrolytic capacitors short-circuited to at least the negative terminal of the smoothing circuit? A power factor improving power supply device comprising: a short-circuit detecting means for detecting whether or not there is provided; and a chopping stopping means for stopping chopping of the chopper circuit when a short circuit is detected by the short-circuit detecting means.