JPH1014246A - Inrush-current preventing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely prevent an inrush-current upon recovery from instantaneous interruption of input voltage by turning an FET on through the operation of a feedback resistor and a capacitor, connected with the feedback winding of a transformer, while delaying by a time constant which is dependent on the feedback resistor and the capacitor. SOLUTION: After an FET Q2 has been turned off by interrupting an input voltage Vin through an input voltage detection control circuit 10 and then input voltage Vin has recovered, an input current being suppressed by a suppressing resistor R1 until the FET Q2 is turned on, is fed to the input winding N1 of a transformer T. At the same time, the FET Q2 is turned on through the operation of a feedback resistor R3 and a capacitor C3 connected with the feedback winding N3 of the transformer T, while being delayed by a time constant which is dependent on the feedback resistor R3 and the capacitor C3. According to the circuitry, an inrush current can be surely prevented upon recovery of the input voltage Vin from instantaneous interruption through operation of the FET Q2, the input voltage detection control circuit 10, the suppressing resistor R1 and the feedback resistor R3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an inrush current prevention circuit used for various power supply circuits.

[0002]

2. Description of the Related Art As an inrush current prevention circuit used in a conventional power supply circuit, a circuit shown in FIG. 3 is known.

The conventional circuit shown in FIG. 3 comprises a power supply 1 for supplying a DC input voltage Vin, a power switch 2, an inrush current prevention circuit 20, an input winding N1, an output winding N2, and an input winding. A transformer T having a feedback winding N3 coupled to N1; and an input voltage Vin supplied from the power supply 1 is switched to an input winding N1 of the transformer T to induce an AC voltage in an output winding N2. And a switching circuit section comprising a switching transistor Q1 comprising an N-channel MOS-FET.

A rectifier circuit 4 comprising rectifier diodes D5 and D6 and a smoothing circuit comprising a choke coil L1 and an electrolytic capacitor C4 are connected to the output winding N2 of the transformer T.

The input winding N1 of the transformer T has an input resistor R4 and an input capacitor C2 via a diode D2.
Are connected in parallel.

An input smoothing capacitor C1 is connected between one end of the input winding N1 of the transformer T and the source of the switching transistor Q1.

The inrush current prevention circuit 20 is connected to the power supply 1
Between the anode side of the input winding N1 and one end of the input winding N1;
A thyristor SCR to which a cathode is connected, and a resistor R5 connected between an anode and a cathode of the thyristor SCR.
A resistor R6 connected between the cathode and the gate of the thyristor SCR; one end of the feedback winding N3;
A diode D1 and a feedback resistor R3 connected in series between the gate of R and a feedback resistor R3. A voltage induced in the feedback winding N3 is supplied to the thyristor SCR via the diode D1 and the resistor R3.
To drive the thyristor SCR.

[0008]

However, when the above-described conventional rush current prevention circuit 20 is used, the rush current when the power switch 2 is turned on can be prevented, but the rush current when the input voltage is restored cannot be prevented. There were challenges. The reason will be described below with reference to FIG.

Now, when the power supply circuit is operating, as shown in FIG. 4, the input voltage Vin changes at time t (10 to 1).
(Approximately 0 msec).

At this time, although the voltage of the input smoothing capacitor C1 is reduced by the discharge, the PWM control unit 3 and the switching transistor Q1 continue to operate, so the feedback winding N3 is connected between the gate and cathode of the thyristor SCR.
, And the thyristor SCR also continues to operate.

When the input voltage Vin is restored after the elapse of the time t, the thyristor SCR continues to operate.
The input smoothing capacitor C1 at the moment when the input voltage Vin is restored
Inrush current ip, that is, the input current cannot be suppressed, and a large inrush current ip of, for example, several A to several tens A as shown in FIG. 4 flows.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide an inrush current prevention circuit that can accurately prevent an inrush current at the time of recovery after a momentary interruption of an input voltage. It is.

[0013]

According to the first aspect of the present invention,
A primary side is provided with a transformer having an input winding and a feedback winding, and a switching control unit controls the input voltage from a power supply supplied to the input winding by a switching control unit, and a predetermined voltage is applied to an output winding side of the transformer. An inrush current prevention circuit used in a power supply circuit for inducing AC power, an FET connected between an anode side of the power supply and an input winding of a transformer, and an input voltage from the power supply detected to detect an input voltage. An input voltage detection control circuit that turns off the FET by turning off the FET, a current suppression circuit that supplies a suppressed current to the input winding of the transformer when the input voltage is restored after the FET is turned off, and the FET And a delay drive circuit for turning on the FET with a predetermined delay time when the input voltage is restored after turning off.

According to a second aspect of the present invention, there is provided a transformer having an input winding and a feedback winding on the primary side, and switching control of an input voltage from a power supply supplied to the input winding by a switching control unit. In a rush current prevention circuit used in a power supply circuit for inducing a predetermined AC power on the output winding side of the transformer, a FET having a drain and a gate connected between the anode side of the power supply and the input winding
A feedback resistor connected between the feedback winding and the gate of the FET, an input voltage detection control circuit that detects an input voltage from the power supply and turns off the FET by cutting off the input voltage; A drain resistance of the FET, a suppression resistor connected in parallel between the gate, and a gate capacitor connected between the gate of the FET and the negative electrode of the power supply, wherein the input voltage detection control circuit cuts off the input voltage, FE
When the input voltage is restored after turning off T, the FET
While the input current suppressed through the suppression resistor is supplied to the input winding of the transformer until the transistor turns on, the gate capacitor is charged through the feedback resistor connected to the feedback winding of the transformer, and the feedback is performed. The FET is turned on with a delay by a time constant determined by a resistor and a gate capacitor.

According to a third aspect of the present invention, in the rush current prevention circuit according to the second aspect, the input voltage detection control circuit comprises:
An IC circuit for detecting an input voltage from the power supply;
The circuit operates when the C circuit detects the cutoff of the input voltage, and
The ET comprises a photocoupler transistor for short-circuiting between the gate and the source of the ET.

According to the rush current prevention circuit according to the first aspect of the present invention, when the input voltage is restored after the input voltage detection control circuit turns off the FET due to the cutoff of the input voltage, the current suppression circuit is activated. The input current suppressed until the FET is turned on is supplied to the input winding of the transformer, and the operation of the delay drive circuit turns on the FET with a predetermined delay time. Large inrush current can be accurately prevented.

According to the inrush current prevention circuit of the second aspect of the present invention, when the input voltage is restored after the input voltage detection control circuit turns off the FET by shutting off the input voltage, the suppression resistor is connected to the inrush current prevention circuit. The input current suppressed until the FET is turned on is supplied to the input winding of the transformer, and the operation of the feedback resistor and the capacitor connected to the feedback winding of the transformer causes only the time constant determined by the feedback resistor and the capacitor. Since the FET is turned on with a delay, a large inrush current to the transformer at the time of input voltage recovery can be accurately prevented.

According to the third aspect of the present invention, as the input voltage detection control circuit, an IC circuit that detects an input voltage from the power supply, and operates when the IC circuit detects a cutoff of the input voltage. Thus, with a simple configuration using a photocoupler transistor that short-circuits the gate and source of the FET, the cutoff of the input voltage can be accurately detected and the rush current prevention circuit using the FET can be operated.

[0019]

Embodiments of the present invention will be described below in detail.

FIG. 1 is a circuit diagram showing an inrush current prevention circuit according to an embodiment of the present invention. Elements having the same functions as those of the conventional example shown in FIG. Will be described mainly with respect to parts different from the conventional example.

The rush current prevention circuit and the power supply circuit of the present embodiment shown in FIG. 1 have the same basic configuration as that of the conventional example.
Instead of CR, the drain and source of the N-channel MOS-FET Q2 are connected between the power supply 1 and one end of the input winding N1, and the voltage supplied from the feedback winding N3 is applied to the diode D1 and the feedback resistor R3. MOS-FET via
Supply to the gate of Q2 to drive this MOS-FET Q2; connect the suppression resistor R1 between the drain and source of the MOS-FET Q2; connect a gate capacitor C3 between the gate of the MOS-FET Q2 and the negative electrode of the power supply 1. A voltage detection control circuit 1 for detecting the input voltage Vin from the power supply 1 to short-circuit the gate and source of the MOS-FET Q2 and to turn off the MOS-FET Q2.
The feature is that 0 is provided. In FIG. 1, D4 is a backflow prevention diode.

The voltage detection control circuit 10 has an input voltage V
The voltage dividing resistors R5 and R6 for dividing "in" and the voltage dividing resistor R5
, R6, an IC circuit 4 for detecting a voltage proportional to the input voltage Vin, and a photodiode comprising a photodiode PD and a phototransistor PTR connected between the output terminal of the IC circuit 4 and the negative electrode of the power supply 1. And a collector of the phototransistor PTR.
The phototransistor PT is connected to the gate of the OS-FET Q2.
The emitter of R is connected to the source of the MOS-FET Q2.

Next, the operation of the inrush current prevention circuit and the power supply circuit of the above-described embodiment will be described mainly with reference to FIG. 2 mainly for the operation at the momentary interruption and restoration of the input voltage Vin. .

As shown in FIG. 2, the input voltage Vin changes at time t.
(Msec) After a momentary interruption, recovery is assumed.

When the input voltage Vin is momentarily interrupted, the IC circuit 4 detects the instantaneous interruption of the input voltage Vin with an insufficient voltage, turns on the photodiode PD of the photocoupler, emits light, and turns on the phototransistor PTR. Let it.

When the phototransistor PTR is turned on,
The gate and source of the MOS-FET Q2 are short-circuited,
As a result, the MOS-FET Q2 is turned off.

When the input voltage Vin is restored after the elapse of the time t, the IC circuit 4 turns off the photocoupler. At this time, the potential of the gate of the MOS-FET Q2 is equal to the charged potential of the gate capacitor C3. MOS up to
-Because it does not reach the potential before the FET Q2 is activated,
In this state, the input smoothing capacitor C1 is charged by the input current suppressed by the suppression resistor R1 connected in parallel with the MOS-FET Q2. The waveform of the input current is shown in the lowermost column of FIG.

On the other hand, the gate capacitor C3 is connected to the feedback winding N
3 is charged by the voltage supplied through the diode D1 and the feedback resistor R3, and the charged potential gradually increases.

The MOS-FET Q2 has a leak current characteristic when the level of the supply voltage to its gate is low. That is, at this time, the voltage waveform between the gate and the source has a leak current characteristic until the time point indicated by the symbol α after the lapse of the predetermined delay time t1 shown in FIG.

When the level of the supply voltage to the gate of the MOS-FET Q2 reaches the rated level,
The FET Q2 is in the ON state, that is, the voltage waveform between the gate and the source has a linear characteristic after the point α and rises to the rated voltage. The gate current of the MOS-FET Q2 also has a linear characteristic after the point α and rises to the rated voltage.

The above-described delay time t 1 is determined by the feedback resistance R
1. Various changes can be made by selecting the resistance value and the capacitance value of the gate capacitor C3.

By the operation as described above, the waveform of the input current to the input smoothing capacitor C1, that is, the waveform of the input current to the input winding is restored when the input voltage Vin is restored after the momentary interruption.
In the lowermost column of FIG. 2, the current becomes the current suppressed by the suppression resistor as shown by the symbol β, and after the elapse of the delay time t1, the current follows the linear characteristic of the MOS-FET Q2 as shown by the symbol γ. In addition, it is possible to accurately suppress an excessive rush current when the input voltage Vin is restored after a momentary interruption. Further, by selecting the resistance value and the capacitance value of the feedback resistor R1 and the gate capacitor C3, it is possible to arbitrarily set the peak value of the input current indicated by the symbol γ.

In the above embodiment, the MOS-FET
Has been described, but the present invention can be implemented using other transistors having a leakage current characteristic and a linear characteristic.

The photocoupler for controlling the gate can also be implemented by using an element whose input and output are electrically insulated and which can be turned on and off at the same or higher speed.

[0035]

According to the first aspect of the present invention, an FET,
It is possible to provide an inrush current prevention circuit that can accurately prevent a large inrush current to the transformer when input voltage is restored by the operation of the input voltage detection control circuit, the current suppression circuit, and the delay drive circuit.

According to the second aspect of the present invention, the operation of the FET, the input voltage detection control circuit, the suppression resistor, the feedback resistor, and the capacitor can accurately prevent a large rush current to the transformer when the input voltage is restored. A possible inrush current prevention circuit can be provided.

According to the third aspect of the present invention, the cutoff of the input voltage can be accurately detected with a simple configuration to operate the inrush current prevention circuit using the FET.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing an inrush current prevention circuit according to an embodiment of the present invention.

FIG. 2 is a waveform diagram of each part of the inrush current prevention circuit according to the embodiment of the present invention.

FIG. 3 is a circuit diagram showing a conventional inrush current prevention circuit.

FIG. 4 is a waveform diagram of each part of the conventional inrush current prevention circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Power supply 2 Power switch 3 PWM control part 4 IC circuit 10 Voltage detection control circuit Q1 Switching transistor Q2 MOS-FET T Transformer N1 Input winding N3 Feedback winding R1 Suppression resistor R3 Feedback resistor C1 Input smoothing capacitor C3 Gate capacitor

Claims (3)

[Claims] 1. A transformer having an input winding and a feedback winding on a primary side, and switching control of an input voltage from a power supply supplied to the input winding by a switching control unit to output the transformer. In a rush current prevention circuit used in a power supply circuit for inducing a predetermined AC power on a winding side, an FET connected between an anode side of the power supply and an input winding of a transformer, and an input voltage from the power supply are detected. An input voltage detection control circuit that turns off the FET by cutting off the input voltage; and a current suppression that supplies a suppressed current to the input winding of the transformer when the input voltage is restored after the FET is turned off. And a delay drive circuit for turning on the FET with a predetermined delay time when the input voltage is restored after the FET is turned off. Inrush current protection circuit that. 2. A transformer having an input winding and a feedback winding on a primary side, and switching control of an input voltage from a power supply supplied to the input winding by a switching control unit to output the transformer. In a rush current prevention circuit used in a power supply circuit for inducing a predetermined AC power on a winding side, a FET having a drain and a gate connected between an anode side of the power supply and an input winding; and the feedback winding and an FET. A feedback resistor connected between the gate of the FET, an input voltage detection control circuit that detects an input voltage from the power supply, and turns off the FET by cutting off the input voltage; And a gate capacitor connected between the gate of the FET and the negative electrode of the power supply, wherein the input voltage detection control circuit cuts off the input voltage. When the input voltage is restored after being off more the FET, the F
While the input current suppressed via the suppression resistor is supplied to the input winding of the transformer until ET is turned on,
A rush current prevention circuit, wherein the gate capacitor is charged via a feedback resistor connected to a feedback winding of the transformer, and the FET is turned on with a delay by a time constant determined by the feedback resistor and the gate capacitor. 3. The input voltage detection control circuit includes an IC circuit for detecting an input voltage from the power supply, and operates when the IC circuit detects a cutoff of the input voltage to operate between the gate and the source of the FET. 3. The inrush current prevention circuit according to claim 2, comprising a photocoupler transistor that short-circuits the inrush current.