JPH07163189A - Pwm controller for motor - Google Patents

Abstract

PURPOSE:To realize high speed operation without requiring any high speed control device by operating a plurality of control devices in parallel at different timings thereby updating the command signal value for each phase a plurality of times during a single period of a reference signal. CONSTITUTION:A timing generator 24 for a PWM controller 16 generates interruption signals for CPUs 18A and 18B at different timings in synchronism with a reference triangular wave (ref) generated from a triangular wave generator 26. A comparator 28 compares voltage commands UC, VC, WC for respective phases on a latch 32 with the reference triangular wave (ref) generated from the triangular wave generator 26 and produces three types of waveforms through PWM of the reference triangular wave (ref) They are fed, as switching signals USW, VSW and WSW, to an inverter 14 and the voltage commands UC, VC, WC on the latch 32 are updated at a moment of time when the switching operation is not carried out. This constitution realizes stabilized high speed operation without requiring any expensive control device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention uses a PWM output for a motor.
PWM of motor controlled based on (pulse width modulation) signal
Regarding the control device.

[0002]

2. Description of the Related Art As a method of controlling the output of a motor,
PWM control is generally known. In this type of control, a reference signal having a predetermined waveform such as a triangular wave is compared with a command signal for the motor, and thereby a switching signal is generated. This signal is a signal obtained by PWMing the reference signal with the command signal. For example, when trying to drive the AC motor by the output of the battery, for the power conversion circuit such as an inverter arranged between the battery and the AC motor,
By supplying this switching signal, the output of the motor can be controlled. That is, the switching signal is supplied to the power conversion circuit and is used for switching control of the switching element that constitutes the circuit.

The value of the command signal is usually, for example, Japanese Patent Laid-Open No. 1-
As shown in No. 236815, it is updated with one cycle of the reference signal as a cycle. FIG. 5 shows an example of a control waveform when the reference signal and the command signal are compared for each cycle of the reference signal.

The control waveform shown in this figure is a waveform when the motor to be controlled is a three-phase AC motor. The command signal for the motor is generated as voltage commands U _c , V _c , and W _c for each U, V, W phase. further,
Reference signal is a triangular wave (reference triangular ref), voltage command _{U c,} V _{c, W} c is compared with the reference triangular wave ref. This comparison, U, V, W phases of the switching signal (PWM _{signal) U s w, V sw,} W sw is generated. For example, the value of the U-phase switching signal U _sw is re
It goes high during f> U _c and goes low during ref <U _c .

In this figure, voltage commands U _c , V _c ,
W _c is updated every one cycle T _c1 of the reference triangular wave ref. That is, (usually CPU) control device for generating a voltage command _{U c,} V _{c, W} c is the voltage according in synchronization with the rising peak of the reference triangular wave ref at its output command _{U c,} V c, the _{W c} new Is set to a value. In this way, the control device is operated in synchronization with the peak of the reference triangular wave ref at which switching signal U
_{This is because sw} , V _sw , and W _sw are also low values, and the switching operation in the power conversion circuit has not occurred.

[0006]

SUMMARY OF THE INVENTION With such a configuration,
The frequency of the switching operation in the power conversion circuit becomes equal to the frequency of the switching signal and eventually the frequency of each phase command signal. Therefore, it is difficult to control the output of the motor stably up to the high speed range. In addition, 1 of the reference signal
It is conceivable to update the voltage command multiple times during the cycle, but for that purpose the operating frequency of the control device must be increased. As a switching element that constitutes a power conversion circuit, for example, an IGBT (Insulated Gate Bipolar Transistor) is used.
istor), the switching frequency that can be supported is about 10 to 20 kHz.
This can be achieved by using a high speed control device such as (Digital Signal Processor). However, since this kind of device is usually expensive, the cost of the control device increases. Further, the processing load on the control device becomes heavy, and it becomes impossible to perform other additional processing.

Even if an inexpensive low speed control device is used to drive the motor at a high speed, a control delay will occur. When the control delay occurs, the current amplitude and phase of the motor deviate from the value of the command signal, so that the output torque of the motor and the maximum speed decrease. Further, as a result of the current phase of the motor being delayed, the current value increases with respect to the torque required for the motor. This leads to increased copper loss, iron loss, reduced efficiency, and increased motor size.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a control device capable of operating a motor at high speed without using a high speed control device. And

[0009]

In order to achieve such an object, a motor PWM control apparatus according to the present invention includes a plurality of control devices for generating a command signal for each phase and a plurality of control devices. It is characterized in that the control device is provided with means for operating the control devices in parallel at different timings to update the value of the command signal of each phase a plurality of times during one cycle of the reference signal.

Further, in the motor PWM control apparatus according to the present invention, the reference signal is a triangular wave, and there are two control devices. One of the two control devices is the other one in the rising portion of the reference signal. It is characterized in that the individual generate a command signal in the falling portion.

The motor PWM control apparatus according to the present invention is characterized in that when one of the plurality of control devices fails or malfunctions, the other control device continues to operate.

[0012]

In the present invention, a plurality of control devices are provided, and these control devices operate in parallel at different timings.
By this operation, the value of the command signal of each phase is updated a plurality of times during one cycle of the reference signal. Therefore, since the waveform of the PWM signal becomes smoother, the harmonics contained in the PWM signal can be reduced and the loss can be reduced, and the responsiveness at the time of high speed operation can be improved. As described above, according to the present invention, the waveform of the PWM signal can be controlled at a higher speed without increasing the operating frequency of each control device, that is, without using a control device that can operate at high speed and is generally expensive. . As a result, the apparatus can be configured using a slower and cheaper control device. In addition, since an inexpensive control device generally does not react sensitively to noise, the reliability of the device is improved.

Further, in the present invention, when a triangular wave is used as the reference signal and two control devices are used, one of these control devices raises the command signal at the rising portion of the reference signal by the other one. The command signals in the falling portion can be shared.
In this case, the operation timing of each control device can be given as an interrupt signal synchronized with the peak of the triangular wave. By doing so, it becomes possible to always update the value of the command signal when the switching operation is not performed.

In the present invention, when a failure or abnormality occurs in any of the plurality of control devices, the control is continued by the other control device. In the present invention, since the plurality of control devices are operating in parallel, even if a failure or abnormality occurs in any of the plurality of control devices, at most, the update frequency of the command signal only decreases. , The operation of the motor can be continued. Further, if the user is alerted that a failure or abnormality has occurred, the user can know the situation.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described below with reference to the drawings. It should be noted that the same components as those of the conventional example shown in FIG.

FIG. 1 shows a PWM according to an embodiment of the present invention.
The configuration of the controller is shown. The control target of the apparatus shown in this figure is a three-phase AC motor 10. This motor 1
Zero is driven by the electric power of the battery 12, and this electric power is supplied to the motor 10 via the inverter 14. The inverter 14 is composed of a predetermined number of switching elements, and by the switching operation of these switching elements, the DC power from the battery 12 is converted into AC power and then supplied to the motor 10.

The switching operation of the switching element which constitutes the inverter 14 is performed on each phase switching signal U _sw , V _sw , W _sw supplied from the PWM control device 16 according to this embodiment for each phase of U, V, W. According to
To be executed. The PWM control device 16 gives each phase switching signal _Usw , _Vsw , _Wsw to the inverter 14 in response to a command relating to the required output given by the user or the like, and thereby outputs the output of the motor 10 so as to _{obtain the} required output. Control.

The PWM controller 16 includes two CPUs 18
It has A and 18B. CPU 18A and 18B
Respectively generate and output U, V, W phase voltage commands U _c , V _c , W _c according to the required output. CPU18A
18B, on the other hand, the rotational position detector 20 detects the rotational position of the motor 10 (rotor angle), and the current detector 22 detects the current of the motor 10. When generating the voltage commands U _c , V _c , and W _c , the CPUs 18A and 1
8B uses this information in addition to the requested output.

The CPUs 18A and 18B start the process of generating the phase voltage commands U _c , V _c and W _c in response to the interrupt signal supplied from the timing generator 24. The timing generator 24 generates this interrupt signal so that the interrupt signal for the CPU 18A and the interrupt signal for the CPU 18B have different timings. As shown in FIG. 2, for example, the timing generator 24 sends the time t ₀ , t ₂ , ... To the CPU 18A at the time t.
_{At 1} , t ₃ , ..., An interrupt signal is given to the CPU 18B. Therefore, the CPU 18A causes the times t ₀ , t ₂ ,
The processing is started from ..., and the CPU 18B causes the times t ₁ , t ₃ ,
The process starts from.

The timing generator 24 is the CPU 1
The interrupt signals for 8A and 18B are sent to the triangular wave generator 2
It is generated in synchronism with the reference triangular wave ref generated by 6. The timing generator 24 may be, for example, as shown in FIGS.
As shown in, an interrupt signal is generated at the peak timing of the reference triangular wave ref. Of the generated interrupt signals, the interrupt signal with the negative peak timing is the CPU 18
An interrupt signal of positive peak timing is sent to the CPU 18
B, respectively. Therefore, when one cycle of the reference triangular wave ref is represented by T _c1 as shown in FIG.
Interrupt signal given to CPU 18A and CPU 1
The time interval with the interrupt signal given to 8B is T
_c2 = T _c1 / 2. Further, as shown in FIGS. 3 and 4, the CPU 18A sends the phase voltage commands U _c , V _c , and W _c in the rising period of the reference triangular wave ref to the CPU.
18B indicates each phase voltage command U _c in the falling period,
V _c and W _c are generated respectively. The reference triangular wave ref is a signal that is compared with the phase voltage commands U _c , V _c , and W _c in a comparator 28, which will be described later, and is the switching signal U _sw , V _sw , and the carrier wave of the PWM signal that is W _sw. Become.

Three-state buffers 30A and 30B are provided after the CPUs 18A and 18B, respectively. The three-state buffers 30A and 30B store the output of the corresponding CPU 18A or 18B in response to the enable signal from the timing generator 24 being turned on. The timing generator 24 includes CPUs 18A and 18A.
In synchronization with the interrupt signal to B, the enable signals for the corresponding three-state buffers 30A and 30B are turned on. Therefore, the respective phase voltage commands U _c , V _c , W _c generated by the processes in the respective CPUs 18A and 18B are
As shown in FIGS. 2 and 4, the corresponding three-state buffer 30A or 30B is synchronized with the interrupt signal.
Stored in. For example, the phase voltage commands U _c , V _c , and W _{c, which} are the results of the processing executed by the CPU 18A in response to the interrupt signal at time t ₀ , are synchronized with the next interrupt signal being given to the CPU 18A, that is, It is stored in the three-state buffer 30A at time _{t 2.} The timing generator 24 turns off the enable signal for the three-state buffer 30B when turning on the enable signal for the three-state buffer 30A. Therefore, the phase voltage commands U _c , V _c , and W _c on the three-state buffers 30A and 30B can be read alternately.

Three-state buffers 30A and 30B
A latch 32 is further provided in the subsequent stage. Latch 32, in response to a latch signal supplied from the timing generator 24, latches the phase voltage command _{U c, V c, W c} . The timing generator 24 includes CPUs 18A and 18B.
The latch signal is generated in synchronism with the interrupt signal being given to any of the above. Thus, the phase voltage command _U c of the three-state buffers _30A, V c, _{W c} and phase voltage command _U c of the three-state buffer 30B, V
_c and W _c are alternately latched by the latch 32.
As described above, since the time interval between the interrupt signal for the CPU 18A and the interrupt signal for the CPU 18B is T _c2 , the phase voltage commands U _c , V _c , W on the latch 32 are set.
_As shown in FIGS. 3 and 4, _c will be updated with T _c2 as the period. In FIG. 4, the operation of updating the voltage command value V _i (i: integer) for one phase is shown.

The comparator 28 compares the phase voltage commands U _c , V _c , W _c on the latch 32 with the reference triangular wave ref from the triangular wave generator 26. As a result, as shown in FIG. 3, three types of waveforms obtained by PWM of the reference triangular wave ref by each of the phase voltage commands U _c , V _c , and W _c are obtained. These waveforms are the switching signals U _sw , V _sw , W
It is supplied to the inverter 14 as _sw . Also, since the interrupt signal is synchronized with the peak of the reference triangular wave ref,
As is apparent from FIG. 3, the phase voltage commands U _c , V _c , and W _c on the latch 32 are updated when the inverter 14 is not performing the switching operation.

Therefore, in this embodiment, as is clear from the comparison between the control waveform shown in FIG. 3 and the conventional waveform shown in FIG. 5, the reference triangular wave ref is twice twice during one cycle T _c1 . That is, the values of the respective phase voltage commands U _c , V _c , and W _c supplied to the comparator 28 are updated with T _c2 as a cycle. Therefore, the control delay is halved as compared with the conventional one, so that the output torque of the motor 10 and the maximum speed can be prevented from decreasing. In addition, since the current value for the required output does not easily increase due to the phase delay, an increase in copper loss and iron loss,
It is less likely that the efficiency will decrease and the motor will become larger. Further, in this embodiment, the switching signals U _sw , V
The waveforms of _sw and W _sw are smoothed, and the harmonic components contained in the current supplied to the motor 10 are reduced. This reduces the loss and enables the motor 10 to operate more efficiently.

Further, as shown in FIGS. 2 and 4, C
The processing of the PUs 18A and 18B is the same as in the conventional method.
It suffices if it is performed during one cycle T _c1 of ef. Therefore, in this embodiment, it is not necessary to use generally expensive CPUs that operate at high speed as the CPUs 18A and 18B. As a result, the motor 10 can be stably operated at high speed with a relatively inexpensive structure. In addition, since an inexpensive CPU generally does not react sensitively to noise, the reliability of the device is improved.

In this embodiment, as shown in FIG. 1, the CPU 18A and the CPU 18B monitor whether or not there is another failure. If you fail one of the CPU, not fail and accurate phase voltage command _U c from _CPU, V c, is _{W c} obtained. So, the CPU that found that the other CPU failed,
A warning to that effect is issued to the user and the timing generator 24. The user or the like can take a predetermined action in response to this warning. The timing generator 24 always turns off the enable signal for the one of the three-state buffers 30A and 30B corresponding to the failed CPU. After that, each phase voltage command U _c on the latch 32,
V _c and W _c are updated only once during one cycle T _c1 of the reference triangular wave ref, but the control of the motor 10 is not interrupted. Thus, in this embodiment, an excellent fail-safe function is realized.

Although the number of CPUs is two in the above description, the number of CPUs is not particularly limited in the present invention. In general, the more control devices such as CPUs are used in parallel, the more control delay can be reduced. Further, although the reference triangular wave ref is used as the reference signal (carrier wave),
Other waveforms may be used. Furthermore, the configuration is not limited to interrupting at the peak of the reference signal. In addition, the circuit for alternately inputting each phase voltage command supplied from a plurality of control devices to the comparator is not limited to the configuration of this embodiment, and various configurations known to those skilled in the art can be applied.

[0028]

As described above, according to the present invention,
Since a plurality of control devices are provided and these are operated in parallel at different timings and the value of the command signal for each phase is updated multiple times during one cycle of the reference signal, the waveform of the PWM signal becomes smoother, It is possible to reduce the harmonics contained in, and eventually reduce the loss. Further, since the control delay is reduced and the responsiveness at high speed operation is improved, the motor can be operated more stably at high speed. At that time, it is not necessary to increase the operating frequency of each control device, that is, to use a generally expensive control device that can operate at high speed. As a result, the apparatus can be configured using a slower and cheaper control device. In addition, since an inexpensive control device generally does not react sensitively to noise, it is possible to improve the reliability of the device.

Further, according to the present invention, when a triangular wave is used as the reference signal and two control devices are used, one of these control devices changes the command signal at the rising portion of the reference signal to another. Since one command signal can be shared in each falling portion, the value of the command signal can be constantly updated at the time when the switching operation is not performed.

According to the present invention, when a failure or abnormality occurs in any of the plurality of control devices,
Since control is continued by the operation of other control devices,
Further, the operation of the motor can be continued only by reducing the update frequency of the command signal at most. At that time, it is preferable to issue an alarm.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a PWM control device according to an embodiment of the present invention.

FIG. 2 is a timing chart showing the processing timing of each CPU in this embodiment.

FIG. 3 is a timing chart showing control waveforms in this embodiment.

FIG. 4 is a timing chart showing a voltage command updating operation in this embodiment.

FIG. 5 is a timing chart showing a conventional control waveform.

[Explanation of symbols]

 10 Motor 14 Inverter 16 PWM Controller 18A, 18B CPU 24 Timing Generator 26 Triangular Wave Generator 28 Comparator

Claims (3)

[Claims] 1. A control device for generating a command signal for each phase in synchronization with a reference signal to control an output of a motor to be controlled, a means for generating a reference signal having a predetermined cycle, and the command signal. And a reference signal, and means for controlling each phase output of the motor based on the PWM signal obtained as a result, in a PWM control device for a motor, wherein a plurality of control devices are provided and a plurality of control devices are different. A PWM control device for a motor, comprising means for updating the value of the command signal of each phase a plurality of times during one cycle of the reference signal by operating in parallel at the timing. 2. The PWM control device for a motor according to claim 1, wherein the reference signal is a triangular wave, there are two control devices, and one of the two control devices has a reference signal at the rising edge of the other. A PWM control device for a motor, wherein one of them generates a command signal at a falling portion. 3. The motor PWM control device according to claim 1, wherein when one of the plurality of control devices has a failure or abnormality, the other control device continues to operate. And a PWM control device for the motor.