JPH07161836A - Manufacture of semiconductor memory device - Google Patents

Abstract

PURPOSE: To provide a method for manufacturing a semiconductor storage device, wherein by forming a word line on a substrate and then a TFT with polysilicon over it, the word line is separated from a bit line, a contact region, electric charge storage electrode, and a contact region. CONSTITUTION: An element isolation film 3 is formed on a semiconductor substrate 1, a gate region 2 is formed, and then a gate-insulating film 4 is formed on the upper part of the element isolation film 3 and the gate region 2. Over it, an activation region 5 of TFT is formed, and a source/drain region 5A is formed by ion-implantation on it. After a first insulating film 7 is vapor- deposited on the upper part of the activation region 5, a first contact hole 15 is formed, where a conductor is embedded to form a bit line 8. On the first insulating film 7 and the bit line 8, a second insulating film 9 is formed, and a second contact hole 16 is formed, where a conductor is embedded to form an electric charge storage electrode 10. Then around the electric charge storage electrode 10, a capacitor insulating film 11 and a plate electrode 12 are formed successively.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a thin film transistor (Thin
The present invention relates to a method of manufacturing a semiconductor memory device using a film transistor (TFT), and more particularly to a semiconductor memory device capable of solving a short circuit problem between a bit line and a charge storage electrode by forming a gate electrode on a semiconductor substrate. The present invention relates to a manufacturing method.

[0002]

2. Description of the Related Art Generally, in a DRAM structure, the higher the degree of integration, the sharper the distance between a bit line and a word line and the distance between a charge storage electrode and a word line. However, since there is a serious problem that a short circuit occurs between them, there is a problem that a strict degree of matching is required when forming a contact, and the margin during the process is extremely reduced.

[0003]

SUMMARY OF THE INVENTION Therefore, the present invention has been made in view of the above problems. First, a word line is first formed on a semiconductor substrate, and then a TFT is formed of polysilicon on the word line.
An object of the present invention is to provide a method of manufacturing a semiconductor memory device, in which the word line can be isolated from a bit line contact region and a charge storage electrode contact region by forming a (thin film transistor).

[0004]

In order to achieve the above object, a method of manufacturing a semiconductor memory device according to the present invention includes a method of forming an element isolation insulating film 3 on a semiconductor substrate 1 and then forming a gate region by an ion implantation method. 2 and forming a gate insulating film 4 on the element isolation insulating film 3 and the gate region 2 from the above step, depositing polysilicon on the gate insulating film 4, and Etching a predetermined portion of silicon to form an active region 5 of the thin film transistor, and from the above step, a photoresist mask 6 is arranged with a predetermined width on the active region 5 corresponding to the gate region 2. Forming a source / drain region 5A of the thin film transistor by implanting ions into the exposed active region 5 of the thin film transistor, and removing the photoresist mask 6 from the step. And, first on top of the active region 5
And then forming a first contact hole 15 by etching a predetermined portion of the first insulating film 7 above the source / drain region 5A of the thin film transistor. From the step of filling the first contact hole 15 with a conductor and forming the bit line 8 by a patterning process, and from the step of forming a bit line 8 above the first insulating film 7 and the bit line 8. Forming the second contact hole 16 by etching the first and second insulating films 7 and 9 on the source / drain region 5A of the thin film transistor with a predetermined width after forming the insulating film 9; The step of filling the conductor in the second contact hole 16 from the step and forming the charge storage electrode 10 by a patterning process, and the step of forming the charge storage electrode from the step. Characterized in that comprising the step of forming the capacitor insulating film 11 and a plate electrode 12 are sequentially around the electrode 10.

Further, in the present invention, the thin film transistor can be formed after the polysilicon deposited on the gate insulating film 4 is heat-treated into single crystal silicon.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 is a layout diagram for manufacturing a semiconductor memory device according to the present invention. In FIG. 1 described above, word line 2 and bit line 8
And a region where the charge storage electrode 10 is located. The contact region 13 of the bit line is a source / source region.
The contact region 14 for the charge storage electrode is connected to the charge storage electrode 10 and the source / source region.
The drain region 5A is connected to a portion, and the thin film transistor active region 5 is a portion operating as a thin film transistor.

FIGS. 2A to 2D are sectional views showing steps for manufacturing a semiconductor memory device according to the present invention. 2A is a cross-sectional view in which the element isolation insulating film 3 is formed on the semiconductor substrate 1 and the gate region 2 is formed by an ion implantation method using the element isolation insulating film 3 as a mask. Since such a gate region 2 is used as a word line (reference numeral 2 in FIG. 1) of a memory device, it must have as low a resistance as possible.

2B shows that the gate insulating film 4 is formed on the gate region 2 and the element isolation insulating film 3 by the thermal oxidation method or the chemical vapor deposition method from the structure of FIG. A predetermined portion of the insulating film 4 in which polysilicon is deposited is etched to form an activation region 5 of the thin film transistor, and then the gate region 2 is formed on the activation region 5 corresponding to the gate region 2. FIG. 5 is a cross-sectional view showing a state in which a source / drain region 5 (A) of a thin film transistor is formed by arranging a photosensitive film mask 6 having the same width as that of FIG. Channel region 5B.

On the other hand, in FIG. 2B, the thin film transistor may be formed after the polysilicon 5 deposited on the gate insulating film 4 is heat treated to be single crystal silicon.

In FIG. 2C, after removing the photoresist mask 6 and depositing a first insulating film 7 on the activation region 5, a first insulating film 7 is deposited on the source / drain region 5A of the thin film transistor. The first insulating film 7 is etched to a predetermined width to form a first contact hole 15, and then a conductor is embedded in the first contact hole 15 to form a bit line 8 by a patterning process. It is sectional drawing of the made state.

In FIG. 2D, after the bit line 8 is formed, a second insulating film 7 is formed on the first insulating film 7 and the bit line 8, and then the source of the thin film transistor is formed. / The first and second portions above the drain region 5A
The insulating films 7 and 9 are etched to a predetermined width to form a second contact hole 16, and then a conductor is embedded in the second contact hole 16 to form the charge storage electrode 10 by a patterning process. At this stage, the capacitor insulating film 11 and the plate electrode 12 are formed around the charge storage electrode 10.
FIG. 4 is a cross-sectional view of a state in which the layers are sequentially formed.

[0012]

As described above, according to the present invention, by applying a thin film transistor to a semiconductor memory device to form a word line on a silicon substrate, a word line is formed between a word line and a bit line and between word lines. Since the problem of short circuit with the charge storage electrode can be eliminated at all, there is an effect of increasing the margin during the process.

Further, the active region of the semiconductor memory device according to the present invention is formed so that the silicon substrate and other active regions and the insulating film are separated from each other, thereby solving the problem of leakage current. Therefore, there is an effect that the yield and the characteristics of the memory element can be improved.

[Brief description of drawings]

FIG. 1 is a layout diagram for manufacturing a semiconductor memory device according to the present invention.

2A to 2D are cross-sectional views showing a manufacturing process of a semiconductor memory device according to the present invention.

[Explanation of symbols]

1 semiconductor substrate 2 gate region (word line) 3 element isolation insulating film 4 gate insulating film 5 activation region 6 photosensitive film mask 7 first insulating film 8 bit line 9 second insulating film 10 charge storage electrode 11 capacitor insulating film 12 plate electrode 13 bit line contact region 14 contact region for charge storage electrode 15 first contact hole 16 second contact hole

Claims (2)

[Claims] 1. A method of manufacturing a semiconductor memory device, comprising the steps of forming an element isolation insulating film 3 for element isolation on a semiconductor substrate 1 and then forming a gate region 2 by an ion implantation method. After forming the gate insulating film 4 on the element isolation insulating film 3 and the gate region 2, depositing polysilicon on the gate insulating film 4 and etching a predetermined portion of the polysilicon, Forming the activation region 5 of the thin film transistor, and activating the exposed thin film transistor by arranging a photoresist mask 6 with a predetermined width on the activation region 5 corresponding to the gate region 2 from the step. Forming a source / drain region 5A of the thin film transistor by ion-implanting the region 5; and removing the photoresist mask 6 from the above stage, After depositing the first insulating film 7 on the portion, a predetermined portion of the first insulating film 7 above the source / drain region 5A of the thin film transistor is etched to form a first contact hole 15. A step of filling a conductor in the first contact hole 15 and forming a bit line 8 by a patterning process from the step; and a step of forming the bit line 8 from the step. After forming the second insulating film 9 on the upper portion, the first and second insulating films 7 and 9 on the source / drain regions 5A of the thin film transistor are etched to a predetermined width to form the second contact hole 16. And forming a conductor in the second contact hole 16 from the step and patterning the charge storage electrode 10.
And a step of sequentially forming a capacitor insulating film 11 and a plate electrode 12 around the charge storage electrode 10 from the above step. 2. The method of manufacturing a semiconductor memory device according to claim 1, wherein the thin film transistor is formed after the polysilicon 5 on the gate insulating film 4 is heat-treated to form single crystal silicon.