JPH07160226A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To display an image without hourly change such as a still image with, a TFT liquid crystal display panel only by adding a simple circuit without using an image memory, etc. CONSTITUTION:This device is provided with the TFT liquid crystal display panel 34, a liquid crystal voltage detection circuit 35 detecting voltages of respective column electrodes applied with a display signal of the liquid crystal display panel 34, an operational amplifier 36 as an inversion circuit inverting the voltages of respective column electrode detected by the liquid crystal voltage detection circuit 35 corresponding to the inversion timing of the display signal of the liquid crystal panel 34 and a multiplexer 31 as a switch selection circuit applying the voltage of respective column electrodes obtained through the operational amplifier 36 to the column electrodes of the liquid crystal panel 34 as a display signal when the display of the still image is instructed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix drive liquid crystal display device using a TFT (thin film transistor).

[0002]

2. Description of the Related Art Recently, not only television receivers that are compact and lightweight and which emphasize portability but also personal computers, word processors, and the like are widely used in general electronic equipments, in which liquid crystal display panels are used as displays. Among the liquid crystal display panels, a thin film transistor (TFT: Thin Film Tr) as a non-linear element is provided inside the panel.
an active matrix drive that forms an anisotor) and drives the liquid crystal by the action to obtain a display.
Due to the feature that a high-contrast display can be obtained without crosstalk, it has become the mainstream as a liquid crystal display panel for image display that requires high image quality.

Active matrix drive liquid crystal display panel using TFTs (hereinafter abbreviated as "TFT-LCD")
In the above, row electrodes and column electrodes which are insulated from each other are formed on one piece of glass, and TFTs are formed at the respective intersections by a thin film forming technique and a photolithography technique. The gate, drain, and source terminals of the TFT are connected to the row electrodes, column electrodes, and display pixels, respectively. In addition, one electrode (common electrode) common to all pixels is formed on the lower surface of the other glass arranged on the glass.
A liquid crystal display panel is constructed by sandwiching a liquid crystal between a piece of glass.

FIG. 4 shows a driving structure of this TFT-LCD. In the figure, n-1, n, ... Are gate bus lines (row electrodes), m, m + 1, ... are drain bus lines (column electrodes), 11 is a gate driver for sequentially scanning and driving the gate bus lines, and 12 is an analog signal. A drain driver for driving the drain bus line, 13 is a TFT provided for each pixel, CLC is an equivalent capacitance of liquid crystal, and VCOM is a voltage applied to a counter electrode (source electrode) of the liquid crystal.

With the above structure, the display operation is as follows. That is, the analog signal to be displayed as shown in FIG. 5A is input to the drain driver 12. The drain driver 12 is composed of a sample hold circuit, a shift register, an output control circuit, and the like, and these are driven by the clock CK1. The drain driver 12 is a gate bus line n shown in FIG.
While the analog signal for the gate bus line n input while −1 is being scan driven is delayed by 1H (horizontal synchronization period) and the analog signal for the next gate bus line n + 1 is input, It is output by controlling the inverted signal of the output enable signal E shown in 2). At this time, each TFT 13 of the gate bus line n is driven by the gate driver 11 as shown in FIG.
It is turned on as shown in (4). Therefore, assuming that the voltage applied to the drain electrode is VIN, the voltage value | VIN-VCOM | is applied to the liquid crystal of each pixel on the gate bus line n, and each pixel has a gray scale corresponding to the voltage VIN applied to the drain electrode. Will be displayed in. Normally, the polarity of the analog input signal is inverted for each line, and the polarity of the analog input signal is inverted for each field even on the same line.
To enter.

[0006]

As described above, the general T
In the FT-LCD, the display operation is executed according to the analog signal input at any time. Therefore, when displaying an image that does not change with time, such as a still image, an image memory for digitizing and storing the image signal is provided, and the polarity is inverted at any time according to the image read from this image memory. However, there is a problem that the circuit scale is large and complicated.

The present invention has been made in view of the above situation, and an object thereof is to display an image such as a still image on a TFT-LCD by adding a simple circuit without using an image memory or the like. An object of the present invention is to provide a liquid crystal display device that can be operated.

[0008]

Means for Solving the Problems That is, the present invention is as follows: (1) Active matrix drive liquid crystal display panel using TFTs (thin film transistors) and voltage of each column electrode to which a display signal of this liquid crystal display panel is applied is detected. And a switching selection circuit for applying the voltage of each column electrode obtained through the voltage detection to the column electrode of the liquid crystal display panel as a display signal when a still image is instructed to be displayed. It was done like this. (2) In the above item (1), the voltage detection circuit is
Further, an inverting circuit for inverting the voltage of each of the column electrodes detected corresponding to the inversion timing of the display signal of the liquid crystal display panel is provided. (3) In the above item (1), the voltage detection circuit is
Further, a level shift circuit for level-shifting the detected voltage of each column electrode is provided.

[0009]

With the constitutions shown in the above (1) to (3), the memory effect of the liquid crystal display panel itself is utilized, and a simple circuit is added without using an image memory or the like.
Images such as still images can be displayed on the FT liquid crystal display panel.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a liquid crystal television device will be described below with reference to the drawings. FIG. 1 shows the overall circuit configuration. Television waves received by an antenna 21 are supplied to a tuner 22. This tuner 22
Selects a specified channel according to the tuning signal from the tuning control circuit 23 and converts it into an intermediate frequency signal. The intermediate frequency signal output from the tuner 22 is sent to the TV linear circuit 24.

The TV linear circuit 24 is composed of an intermediate frequency amplification circuit, a video detection circuit, a video amplification circuit, an AFT detection circuit, and the like. The intermediate frequency signal from the tuner 22 is amplified by the intermediate frequency amplification circuit, and the video image is generated. The detection circuit detects the image. Then, an audio signal is extracted from the output signal of the video detection circuit and sent to the audio circuit 25.

The audio circuit 25 is composed of an audio detection circuit and an audio amplification circuit. The signal from the TV linear circuit 24 is audio-detected and converted into a low frequency signal, and then the audio is amplified and the speaker 26 is driven to be loud. To do.

The output signal of the video detection circuit in the TV linear circuit 24 is sent to the chroma circuit 27 and the sync separation circuit 28 after being amplified by the video amplification circuit. The sync separation circuit 28 separates the horizontal and vertical sync signals contained in the video signal, and outputs the composite sync signal C-SYNC to the tuning control circuit 23 and the horizontal sync signal H-SYNC and the vertical sync signal V-SYNC. Output to each control circuit 29.

The TV linear circuit 24 also performs AFT detection of the output signal of the intermediate frequency amplifier circuit by an AFT detection circuit, extracts an AFT signal whose voltage value changes in an S-shape, and sends it to the tuning control circuit 23.

The tuning control circuit 23 is provided with key inputs such as tuning setting data and tuning up / down instructions from the key input section 30. The tuning control circuit 23 creates a tuning signal having a voltage value corresponding to a designated channel based on the operation of the tuning up / down key in the key input unit 30 and the AFT signal from the TV linear circuit 24, and as described above. Output to tuner 22.

The timing control circuit 29 outputs various timing signals (Timing) to the tuning control circuit 23 based on the horizontal sync signal H-SYNC and the vertical sync signal V-SYNC sent from the sync separation circuit 28.

The chroma circuit 27 performs chroma processing on the video signal supplied from the TV linear circuit 24 to obtain RGB primary color signals, and outputs them to the drain driver 32 via the multiplexer 31.

The timing control circuit 29 creates a timing signal for display control based on the horizontal sync signal H-SYNC and the vertical sync signal V-SYNC provided from the sync separation circuit 28, and the drain driver 32 and It controls the operation of the gate driver 33.

The gate driver 33 is a circuit similar to the gate driver 11 shown in FIG. 4, and has a timing control circuit.
Generate a scanning signal according to the timing signal from 29, and
The gate bus lines, which are the row electrodes of the FT-LCD 34, are sequentially scanned and driven. The drain driver 32 is also a circuit similar to the drain driver 12 of FIG. 4, and the polarity of the analog RGB primary color signals sent via the multiplexer 31 is changed line by line by the timing signal from the timing control circuit 29. Further, even if the same line is reversed and the polarity is reversed every field, the data is sequentially read, and when the signal for one line is read, the drain bus line which is the column electrode of the TFT-LCD 34 is driven for display.

However, the drive voltage of the drain bus line of the TFT-LCD 34 by the drain driver 32 is directly detected by the liquid crystal voltage detection circuit 35, and the detected content is sent to the plus input terminal of the operational amplifier 36. An inverted level signal corresponding to the signal inversion state in the drain driver 32 is input from the timing control circuit 29 to the negative input terminal of the operational amplifier 36, and the output of the operational amplifier 36 is output via the multiplexer 31. It is sent to the drain driver 32.

The multiplexer 31 is normally a chroma circuit.
The signal sent from 27 is supplied to the drain driver 32 as a display signal by switching and selecting the signal sent from the operational amplifier 36 according to the stop motion signal from the tuning control circuit 23 when displaying a still image. .

The following FIG. 2 mainly shows the above drain driver.
32 illustrates an internal circuit configuration of the liquid crystal voltage detection circuit 35. The drain driver 32 is a shift register 32 having a capacity corresponding to the number of drain buses of the TFT-LCD 34.
a, a level shifter 32b, a sample hold circuit 32c, and a buffer amplifier 32d.

The analog display signal sent from the chroma circuit 27 through the multiplexer 31 is held by the shift register 32a in the drain driver 32 while sequentially shifting its position. The content held in the shift register 32a is boosted by the level shifter 32b to a level suitable for the drive voltage of the drain bus line, and sampled and held by the sample hold circuit 32c at the timing when one line is completed. The hold value in the sample hold circuit 32c is amplified by the buffer amplifier 32d under the control of the inverted signal of the output enable signal E1 and applied to each drain bus line of the TFT-LCD 34.

Therefore, each TFT 13 of the gate line of the TFT-LCD 34, which is turned on by the gate driver 33 at this time, is turned on, and the display is driven.

The driving voltage value on each drain bus line of the TFT-LCD 34 is detected by the liquid crystal voltage detection circuit 35. That is, the liquid crystal voltage detection circuit 35 is a TFT
A buffer amplifier 35, which is arranged in a circuit configuration symmetrical to the drain driver 32 with the LCD 34 interposed therebetween.
a, a sample hold circuit 35b, a level shifter 35c, and a shift register 35d.

Each drain line of the TFT-LCD 34 is amplified by the buffer amplifier 35a under the control of the inverted signal of the output enable signal E2, and the sample hold circuit 35b.
Then, sample holding for one line is performed. The hold value of the sample hold circuit 35b is appropriately boosted by the level shifter 35c to a level suitable for the drive voltage of the drain bus line, and held by the shift register 35d while sequentially shifting the position. The contents held in the shift register 35d are sent to the plus input terminal of the operational amplifier 36.

An inverted level signal corresponding to the signal inversion state in the drain driver 32 is input from the timing control circuit 29 to the minus input terminal of the operational amplifier 36, and the output of the operational amplifier 36 is sent to the multiplexer 31 as a display signal. .

The multiplexer 31 has a c-contact, and the display signal from the chroma circuit 27 is applied to the first free end of the operational amplifier 36.
The display signal from the second free end is input to the second free end. When viewing a normal TV broadcast, the first free end is input, and when the still screen is displayed, the second free end is output by the stop motion signal from the tuning control circuit 23. The end is switched and selected, and the input analog display signal is supplied to the drain driver 32.

In the above-mentioned structure, the multiplexer 31 is switched and connected to the first free end side during normal television broadcast viewing. Therefore, the primary color signal from the chroma circuit 27 is supplied as a display signal to the drain driver 12 via this multiplexer 31, and the drain driver 32 drives the drain bus line of the TFT-LCD 34 based on this display signal. At this time, the gate bus lines of the TFT-LCD 34 are sequentially scanned and driven by the gate driver 33, so that the received TV broadcast image is displayed on the TFT-LCD.
It will be displayed and output at 34. At this time, TFT-L
The voltage applied to each pixel of the CD34 is charged as the equivalent capacitance CLC due to the memory effect of the liquid crystal.

When the display of the still screen is instructed by operating the "stop motion" key on the key input unit 30, the tuning control circuit 23 sends a stop motion signal to the multiplexer 31, and the second free motion signal is sent. Switch and connect the ends.

FIG. 3 exemplifies the operation in such a case, and the drain driver 32 applies a voltage to each drain bus line for the gate bus line n as shown in FIG. 3 (1), for example. In the immediately preceding blanking period, the gate driver 33 causes the TFT 13 of the gate bus line n + 1.
Is turned on, and at the same time, as shown in FIG. 3 (3), the liquid crystal voltage detection circuit is generated by the inverted signal of the output enable signal E2
The buffer amplifier 35a of 35 is operated.

Therefore, the buffer amplifier 35a detects the voltage applied to each drain bus line of the gate bus line n + 1 corresponding to the display image at the immediately preceding timing by the equivalent capacitance CLC in each pixel of the gate bus line n + 1. The output is sampled and held by the sample and hold circuit 35b, then appropriately boosted through the level shifter 35c and held in the shift register 35d.

The value held in the shift register 35d is sequentially shifted and output to the operational amplifier 36. In the operational amplifier 36, the timing control circuit 29 as shown in FIG.
The signal from the shift register 35d is inverted by the inversion level input from and is supplied to the drain driver 32 through the multiplexer 31, and each drain bus line is driven at the timing when the gate driver 33 selectively drives the gate bus line n + 1. Let

As described above, the fact that the TFT-LCD 34 has a memory effect by the equivalent capacitance CLC of the liquid crystal in each pixel is utilized, and when the display of the still screen is instructed, this is detected by the liquid crystal voltage detection circuit 35. By repeatedly supplying again to the drain driver 32 through the operational amplifier 36 and the multiplexer 31, a still image whose content does not change is displayed on the TFT-LCD 34 without using a complicated and expensive circuit such as an image memory. be able to. Therefore, not only a television receiver, but also a display device of an electronic device such as a personal computer or a word processor whose display contents do not change significantly can be realized at low cost.

[0035]

As described above, according to the present invention, by utilizing the memory effect of the liquid crystal display panel itself, an active memory using a TFT (thin film transistor) by adding only a simple circuit without using an image memory or the like. A liquid crystal display device capable of displaying an image such as a still image on a matrix-driven liquid crystal display panel can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration according to an embodiment of the present invention.

FIG. 2 is a block diagram mainly illustrating the internal circuit configuration of a drain driver and a liquid crystal voltage detection circuit of FIG.

FIG. 3 is a diagram for explaining the operation according to the embodiment.

FIG. 4 is a diagram showing a structure of an active matrix drive liquid crystal display panel using a general TFT (thin film transistor).

FIG. 5 is a diagram showing an example of drive signal waveforms in FIG. 4;

[Description of reference numerals] Gate driver 11, ..., Drain driver 12, ..., TFT 13
..., antenna 21 ..., tuner 22 ..., tuning control circuit 23 ..., TV linear circuit 24 ..., 25 ... voice circuit, 26 ... speaker, 27 ... chroma circuit, 28 ... sync separation circuit, 29 ... timing control circuit, 30 ... Key input section, 31 ... Multiplexer,
32 ... Drain driver, 32a, 35d ... Shift register,
32b, 35c ... Level shifter, 32c, 35b ... Sample hold circuit, 32d, 35a ... Buffer amplifier, 33 ... Gate driver, 34 ... TFT-LCD, 35 ... Liquid crystal voltage detection circuit,
36 ... operational amplifier.

Claims (3)

[Claims] 1. An active matrix drive liquid crystal display panel using TFTs (thin film transistors), voltage detection means for detecting a voltage of each column electrode to which a display signal of the liquid crystal display panel is applied, and still image display. A liquid crystal display device, comprising: a switching selection means for applying the voltage of each column electrode obtained through the voltage detection means to the column electrode of the liquid crystal display panel as a display signal when the voltage is applied. 2. The voltage detecting means further comprises inverting means for inverting the voltage of each of the column electrodes detected corresponding to the inversion timing of the display signal of the liquid crystal display panel. Liquid crystal display device. 3. The liquid crystal display device according to claim 1, wherein the voltage detection means further comprises level shift means for level shifting the detected voltage of each column electrode.