JPH07153911A - Thershold reference voltage circuit - Google Patents

Abstract

PURPOSE:To provide a threshold reference voltage circuit by utilizing a MOS transistor, which can impart a reference voltage stable even against temperature change regardless of the temperature dependence of the MSO transistor. CONSTITUTION:A first MOS transistor 1 having a certain threshold voltage and a second MOS transistor 2, which has the same polarity as that of the first MOS transistor and has a threshold voltage that is different by the specified value from the value of the transistor 1, are combined by differentiating the concentration of the peripheral diffused layers of source/drain diffused layers. The difference between both threshold voltages is used as the reference voltage source.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION The present invention relates to a threshold reference voltage circuit. The present invention can be used as a reference voltage circuit for giving a reference voltage to a concentrating circuit or the like, and more particularly to a threshold reference voltage circuit using a MOS transistor.

[0002]

2. Description of the Related Art When a standard voltage circuit is constructed by using the threshold voltage of a MOS transistor, there are the following problems.

The threshold voltage of an n-channel MOS transistor is usually about 0.5 to 0.8 V, which is about-.
It has a large negative temperature coefficient of 2 mV / ° C (≈-3000 PPM / ° C).

Therefore, when the threshold voltage is used as the reference voltage of the integrated circuit, the temperature dependence of the threshold voltage of the n-channel MOS transistor adversely affects the circuit characteristics, and the circuit becomes unresponsive to temperature changes. May be stable.

The same problem occurs when a p-channel MOS transistor is used.

[0006]

SUMMARY OF THE INVENTION The present invention solves the problems of the prior art described above, and in spite of the temperature dependence of MOS transistors,
It is an object of the present invention to provide a threshold voltage reference circuit using a MOS transistor, which can provide a stable reference voltage even when the temperature changes.

[0007]

According to the invention of claim 1 of the present application, the first MO having a certain threshold voltage is obtained by making the peripheral diffusion layer concentration of the source / drain diffusion layers different.
By combining the S transistor and a second MOS transistor having the same polarity as the first MOS transistor and having a threshold voltage different from the first MOS transistor by a desired value, the difference between the two threshold voltages is defined as a reference voltage source. According to another aspect of the present invention, there is provided a threshold voltage reference circuit, which achieves the above object.

According to the second aspect of the present invention, the difference between the threshold values of the first and second MOS transistors is the difference between the peripheral concentrations of the source / drain diffusion layers of both MOS transistors and the channel of both MOS transistors. The threshold reference voltage circuit according to claim 1, which is obtained by the difference in length, and thereby achieves the above object.

According to the invention of claim 3 of the present application, the difference between the threshold values of the first and second MOS transistors contributes to the difference between the threshold voltages due to the reverse short channel effect of both MOS transistors. According to another aspect of the present invention, there is provided a threshold voltage reference circuit according to claim 1 or 2, which achieves the above object.

The invention according to claim 3 of the present application has an inverse short channel effect due to the impurity distribution in which the substrate concentration is increased only around the source / drain diffusion layer at the channel end portion due to halo ion implantation or the like. A pair of a MOS transistor and another normal MOS transistor having the same structure with the same polarity, in which the substrate concentration of the source / drain diffusion layer is not high, is used as a pair, and the difference between the threshold voltages thereof is used as a reference voltage source. The threshold voltage ΔVth standard voltage circuit used can be preferably implemented.

In the present invention, the term MOS is not limited to metal-oxide insulating material-semiconductor structure, but conductive material-
This is a general term for transistors having an insulating material-semiconductor structure.

[0012]

[Operation] According to the present invention, a first MOS transistor having a certain threshold voltage and a second MOS transistor having a threshold voltage which is different from the first MOS transistor by a desired value are combined to provide both transistors. Since the difference between the threshold voltages is used as the reference voltage source, even if the threshold voltage of each MOS transistor changes due to temperature dependence, the difference between the threshold voltages of both MOS transistors is kept constant (for example, they change with each other). Can be combined with each other so that the variation becomes zero), and thus a stable reference voltage can be given even with respect to the temperature variation.

The difference between the threshold values of the first and second MOS transistors is determined by the difference between the peripheral concentrations of the source / drain diffusion layers of both MOS transistors, and if necessary, the difference between the channel lengths of both MOS transistors. , Both MO
Since the difference in threshold voltage due to the reverse short channel effect of the S-transistor can be obtained by contributing, it is possible to obtain a stable reference voltage.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. However, as a matter of course, the present invention is not limited to the following examples.

Embodiment 1 FIG. 1 is a circuit diagram showing the configuration of this embodiment.

In this embodiment, as shown in FIG. 1, the first MOS having a certain threshold voltage Vth ₁ is obtained by changing the peripheral diffusion layer concentration of the source / drain diffusion layers.
The transistor 1 and a threshold voltage Vt having the same polarity as the first MOS transistor 1 and different from the first MOS transistor 1 by a desired value.
The second MOS transistor 2 having h ₂ is combined with the threshold voltage difference V ₀ = Vth ₂ −Vth ₁ as a reference voltage source.

In this embodiment, a method of controlling the threshold voltage by making the peripheral diffusion layer concentration of the source / drain diffusion layers different will be described below.

FIG. 2A shows a cross-sectional view of a normal MOS transistor. In the figure, 11 is a gate, 12a is a source, 12b is a drain, and 13 is a silicon substrate.

2B and 2C, the substrate concentration around the diffusion layer is increased in the order of FIGS. 2B and 2C based on the structure of FIG. 2A. The structure shown in FIG. 2D has the same peak concentration as the structure of FIG. 2C, but has a peak at a deeper position.

For each structure, the increased substrate concentration around the diffusion layer at that time is schematically shown by reference numeral 14 in FIG.
Reference numeral 15 in (C) and reference numeral 16 in FIG.

Curves A to D in FIG. 3 are shown in FIG.
Corresponding to each case of (B), (C), (D),
It shows the threshold voltage with respect to the gate length.

Curve A in FIG. 3 corresponds to the case of the structure in FIG. 2A, where the gate length is less than 1 μm
As shown by IIIa, the short channel effect in which the threshold voltage is lowered appears.

Curve B of FIG. 3 corresponds to the structure of FIG. As indicated by reference numeral IIIb, the decrease in the threshold voltage (short channel effect) when the gate length becomes smaller is smaller than in the case of the normal MOS transistor having the structure of FIG.

In the structure of FIG. 2C in which the substrate concentration in the peripheral portion is the highest, as can be seen from the curve C of FIG. 3, even if the gate length is sufficiently long as compared with the other structures of FIG. The voltage is the highest, and as indicated by the symbol IIc, the threshold voltage is inversely increased as the gate length is decreased. That is, the so-called reverse short channel effect is shown (for the reverse short channel effect, “Semiconductor process / device simulation technology” (Realize Co., 199).
0) See page 297 et seq.).

In the case of this curve D of FIG. 3 corresponding to the structure of FIG. 2D, the threshold voltage increases as the gate length decreases, and if the gate length further decreases, punch-through tends to occur. The threshold voltage Vth is lowered. Such an inverse short channel effect is shown. The behavior of the change in the threshold voltage when the gate length becomes short is II
As indicated by d.

This embodiment uses two thresholds by using a pair of the normal MOS transistor of FIG. 2A and a transistor in which the substrate concentration around the diffusion layer is increased and the threshold voltage Vth is changed. A threshold voltage ΔVth standard voltage circuit is formed by utilizing the difference in value voltage.

In the present embodiment, for example, halo ion implantation (a method of forming a low concentration diffusion region by ion implantation so as to surround (wrap around) the source / drain diffusion layer, particularly the drain diffusion layer). One MOS transistor (for example, a MOS transistor having the structure of FIG. 2D) having an inverse short channel effect due to the impurity distribution in which the substrate concentration is increased only around the source / drain diffusion layer at the channel end, Another normal MOS transistor having the same structure and the same structure (for example, the MOS transistor having the structure shown in FIG. 2A) in which the substrate concentration of the drain diffusion layer is not high is used as a pair, and the threshold voltage Threshold (ΔV) that uses the difference as a reference voltage source
th) It can be configured as a reference voltage circuit.

In this embodiment, the threshold voltage difference ΔVth can be arbitrarily selected within a certain range by selecting the channel length and the substrate concentration around the source / drain diffusion layer (FIG. 3). reference).

In the present embodiment, by using a pair of those having an appropriate substrate concentration around the source / drain diffusion layers, a stable threshold voltage difference ΔVth can be obtained even with variations in channel length.

In the structure of this embodiment shown in FIG.
First and second MOS transistors 1 and 2 having the same gate length l and gate width W having two different threshold voltages
A first MOS transistor 1 having (M ₁ , M ₂ )
The drain of (M ₁ ) is connected to the power supply voltage V _DD 7, the gate of the MOS transistor 1 (M ₁ ) is grounded, and the source of the MOS transistor 1 (M ₁ ) is connected to + of the current source 3 and the operational amplifier 5. It is connected.

The other side of the current source 3 has a power supply voltage V
Connected to _EE 8.

Similarly, the second MOS transistor 2
The drain of (M ₂ ) is connected to the power supply voltage V _DD 7, and the gate of this MOS transistor 2 (M ₂ ) is connected as the output 6 to the output side of the operational amplifier 5. The source of this second MOS transistor M ₂ is the operational amplifier 5
Is connected to one side of the current source 4 and the other side of the current source 4 is connected to the power supply voltage V _EE 8.

At this time, the MOS transistor 1 of FIG.
(M ₁ ) source potential 9 and MOS transistor 2
The potential 10 of the source of (M ₂ ) becomes the same potential (−Vth ₁ −ΔV) (see the reference numeral) due to the action of the operational amplifier 5. The potential difference between the gate and the source of the MOS transistor (M ₂ ) is Vth ₂ + ΔV (see reference numeral).

Therefore, the second MOS transistor 2 (M
The output voltage V _{0 at} 6 from the gate of ₂ ) is M
Since the difference between the gate potential and the source potential of the MOS transistor 2 (M ₂ ) is added to the source potential of the OS transistor (M ₂ ), V ₀ = (Vth ₂ + ΔV) + (− Vth ₁ −ΔV) = V
th ₂ -Vth ₁ becomes, the difference between the threshold voltage Vth ₂ and Vth ₁ of the MOS transistor 1, 2 (M ₂ and M _1). Therefore, FIG.
As can be seen from the above, by specifying the gate length and the impurity concentration and structure around the diffusion layer of the source and drain,
V ₀ can be arbitrarily selected up to about 1.3V.

Moreover, since the difference between the two threshold voltages is used, the temperature-dependent primary terms cancel each other out, and the temperature dependence of the output voltage is very small.

As described above, according to this embodiment, the reverse short channel effect due to the impurity distribution in which the substrate concentration is increased only around the source / drain diffusion layer at the channel end portion due to the halo ion implantation or the like is eliminated. Since one MOS transistor and another normal MOS transistor of the same structure with the same polarity where the diffusion layer of the source / drain diffusion layer is not raised are used, the difference between their threshold voltages is used for the reference voltage. , The first-order terms of temperature dependence cancel each other out, and the temperature dependence of the output voltage becomes extremely small. In this example, the temperature dependence was substantially zero.

[0037]

According to the present invention, it is possible to provide a threshold voltage reference voltage circuit using a MOS transistor capable of giving a stable reference voltage even when the temperature changes.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a first embodiment.

FIG. 2 is a diagram for explaining Example 1 and a schematic explanatory diagram of substrate concentration.

FIG. 3 is a diagram for explaining the first embodiment and is a diagram showing a relationship between a gate length and a threshold voltage.

[Explanation of symbols]

1 1st MOS transistor (M ₁ ) 2 2nd MOS transistor (M ₂ ) 14 to 16 Peripheral diffusion layer concentration of source / drain diffusion layer of substrate

Claims (3)

[Claims] 1. A first MOS transistor having a certain threshold voltage by making the peripheral diffusion layer concentration of the source / drain diffusion layer different, and the same polarity as the first MOS transistor and a desired value thereof. A threshold reference voltage circuit characterized in that a difference between the two threshold voltages is used as a reference voltage source by combining with a second MOS transistor having different threshold voltages. 2. The threshold value difference between the first and second MOS transistors is obtained by the difference between the peripheral concentrations of the source / drain diffusion layers of both MOS transistors and the channel length difference of both MOS transistors. The threshold reference voltage circuit according to claim 1. 3. The difference between the threshold values of the first and second MOS transistors is a contribution of the difference between the threshold voltages due to the reverse short channel effect of both MOS transistors. 1. The threshold voltage reference circuit according to 1 or 2.