JPH07151798A - Peak voltage detecting device - Google Patents

Abstract

PURPOSE:To provide a peak voltage detecting device which can obtain highly accurate detected values at the time of detecting the peak value of a leakage voltage, etc. CONSTITUTION:The charging section 1 of a peak voltage holding section 4 detects the voltage corresponding to the peak voltage of a voltage E (Eh.Es) to be detected having alternating or pulsating waveform based on the charged voltage e1 of a capacitor C. A comparing section 2 obtains the compared output a1 corresponding to the part having a voltage difference on a prescribed polarity side by comparing the voltages E and el with each other. A peak voltage updating section 3 holds the charged voltage e1 in the capacitor C of a peak voltage holding section 4 after updating the voltage e1 to the voltage corresponding to the peak voltage of the voltage E in accordance with the compared output a1. The comparing section 2 is constituted by using an operational amplifier circuit IC and the peak voltage updating section 3 is constituted by using a transistor.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a peak voltage measuring device used for detecting a portion of the highest voltage value in a voltage change of an AC or pulsating voltage, that is, a peak voltage.

[0002]

2. Description of the Related Art In such a device, for example, in order to prevent a deterioration in the function of the device itself due to a leakage and a personal injury due to a leakage due to a gradual progress of insulation breakdown of an electric drive part like a refrigerating device, The leakage current is constantly detected, and when the detected value exceeds a predetermined value, an alarm is issued and the leakage current is used in a detection part of a protection device that stops the operation of the refrigeration system.

Specifically, as shown in FIG. 12, the detected voltage E obtained from a ring-shaped bush type current transformer 12 fitted to a power supply line or a ground line 11 is applied to a semiconductor amplifier circuit 13.
With the output amplified by the leak breaker 14 and the alarm circuit 1,
It is well known that 5 is operated, and that an alarm or a circuit break is detected by detecting a leakage to the secondary side of the power transformer with the same configuration.

In order to carry out the above-mentioned alarm and circuit interruption, the detection circuit for detecting the detected voltage generally has a capacitor C after rectifying the detected voltage E with a diode D as shown in FIG. The peak voltage of the detected voltage is measured based on the maximum value of the charging voltage obtained by charging.

Further, as a means for measuring the peak value of the low frequency alternating current, the amplified output of the low frequency alternating current is applied to the direct current regeneration circuit by the diode to make the pulsating current waveform shifted to zero level and charge the capacitor. , AC voltage each cycle of the configuration that discharges the capacitor by the pulse obtained by detecting the zero crossing point of the AC waveform and can hold the amplified voltage proportional to the peak voltage in each cycle An apparatus for measuring the peak value voltage in JP-A-57-64669 is disclosed.

[0006]

As mentioned above, simply,
There is a disadvantage that an accurate voltage cannot be measured only by charging the capacitor and detecting it due to the leakage current of the capacitor and the leakage current to the detection input side. In addition, if the impedance on the input side is increased to reduce the leakage current to the detection input side, the capacitor remains charged with the detection voltage when the voltage to be detected decreases, and it is possible to follow the voltage to be detected. In addition to the above, since charging is performed via the diode, there is a problem that an error due to non-detection and non-linearity of a minute voltage near the "0" voltage in the rectification characteristic of the diode is largely included.

For this reason, it is considered that the detected voltage is detected by a voltage obtained by amplitude-amplifying the detected voltage. For example, in the case of the leakage detection, the leakage voltage changes from a minute value to a large value, and therefore the variation width thereof. Is large, the amplification will be saturated.

Further, in order to sufficiently reduce the error due to the leakage current, it is possible to detect the voltage after it is amplified. However, if the amplification is simply performed, the amplitude of the amplified voltage is saturated due to the saturation of the amplification. Since the peak voltage of 1 is peaked, it is necessary to switch the amplification range, and there is a disadvantage that the configuration becomes too complicated to automatically perform this range switching.

Further, in the general signal waveform detection, for example, in order to detect the negative side peak voltage such as the voltage waveform A of FIG. 13, that is, the voltage of −Ea shown by the dotted line, the detected voltage is Since detection can be performed only after the inverting amplification is once performed, the same inconvenience as that of the above-mentioned saturation due to saturation in the amplification circuit and range switching occurs.

Further, for example, in order to detect the lowest side voltage of the detected voltage that is shifted to the positive side as shown by the voltage waveform B in FIG. 13, that is, the voltage of Eb shown by the dotted line, the detected voltage, that is, , It is necessary to use a complicated circuit such as combining the voltage waveform B to the DC amplification circuit and the AC amplification circuit at the same time to obtain a differential voltage, and also to cap the range or switch the range due to saturation in the amplification circuit. The same inconvenience occurs.

Therefore, there is a problem that it is desired to provide a product that does not have such inconvenience. In the present invention, the peak voltage includes the voltages corresponding to -Ea and Eb.

[0012]

SUMMARY OF THE INVENTION The present invention is directed to obtaining a detection voltage corresponding to a peak voltage of a detected voltage having an AC waveform or a pulsating waveform based on the charging voltage charged in the capacitor as described above. In the voltage detection device, the charging means for obtaining the above-mentioned charging voltage by the voltage obtained by charging the capacitor with a predetermined DC power source is compared with the above-mentioned detected voltage and the charging voltage, and the voltage difference on the predetermined polarity side is compared. Comparing means for obtaining a comparison output corresponding to the portion having, a peak voltage updating means for updating the charging voltage to a voltage corresponding to the peak voltage by the comparison output, and the updated charging voltage The problem described above can be solved by providing a device that is provided with a peak voltage holding unit that holds the updated charging voltage as the detection voltage.

[0013]

The charging voltage obtained by charging the capacitor with a DC power source separate from the detected voltage is updated by a comparison output obtained by comparing the detected voltage, and the detected voltage is held by the voltage holding the updated charging voltage. Since the voltage equivalent to the peak voltage is obtained, the detected voltage itself is not directly used for charging or discharging the capacitor, so even if the voltage source of the detected voltage has a high impedance, the detected voltage itself Since it does not decrease, it works so that the peak voltage can always be detected with high accuracy.

Further, since no means for applying the amplified voltage to the amplitude amplifying circuit to amplify the detected voltage is used, inaccuracy due to the peaking of the peak voltage detection due to saturation of the amplifying circuit, and to avoid this peaking. It works so as to eliminate the complexity of switching the amplification range.

[0015]

EXAMPLES Examples will be described below with reference to FIGS. First, the principle configuration of FIG. 1 will be described with reference to the waveform diagram of FIG. 3. The charging unit 1 constitutes a charging unit that charges a capacitor C with a predetermined DC voltage V to obtain a charging voltage.

The comparison section 2 supplies the detected voltage E as one comparison input and the holding voltage e described later as the other comparison input.
Comparing these two inputs by giving 1,
The comparison means is configured to obtain a comparison output a1 corresponding to a portion having a voltage difference on a predetermined polarity side, for example, a positive polarity, that is, a portion of the period t1 · t2. For example, it is configured by an operational amplifier circuit including a 2-input differential amplifier circuit.

The peak voltage updating section 3 updates the charging voltage e1 charged in the capacitor C to a voltage corresponding to the peak voltage of the detected voltage E by the comparison output a1 given from the comparing section 2. It constitutes the head voltage updating means, and is, for example, an electronic switch circuit using a transistor.

The peak voltage holding unit 4 holds the updated charging voltage of the capacitor C and outputs the updated charging voltage to the output terminal F so as to correspond to the peak voltage of the detected voltage. The peak voltage holding means for obtaining the detection voltage is configured, and for example, the charging voltage of the capacitor C is held by the high impedance of the operational amplifier circuit and the electronic switch circuit.

Hereinafter, specific circuit configuration examples will be described with reference to FIGS. 2 and 3.
Explained by. In these figures, the parts indicated by the same reference numerals as those in FIG. 1 have the same functions as the parts indicated by the same reference numerals in FIG.

[First Embodiment] First, a first embodiment will be described with reference to FIGS. In this embodiment, the peak voltage on the positive side of the detected voltage E is detected, and each of the units 1 to 4 is composed of a portion indicated by a dotted line. The capacitor C is charged with a predetermined DC voltage V, and this charging is performed by the switching operation of the transistor Q1 described later.

The operational amplifier circuit IC1 supplies the detected voltage E to one comparison input (+) input terminal and the voltage e1 charged and held in the capacitor C to the other comparison input (-) terminal. The pulse-shaped comparison output a1 is output to the output terminal. The operational amplifier circuit IC1 includes
The operating power supply Vcc is supplied by a circuit (not shown).

The transistor Q1 is an npn transistor, and by applying the comparison output a1 to the base electrode to perform a switching operation, the DC power supply V applied to the collector electrode is supplied while the comparison output a1 is present. , That is,
The capacitor C connected to the emitter electrode is charged by energizing only during the period t1 and t2.

After the switching operation is completed, the transistor Q1 is cut off by the high impedance,
Further, since the + input terminal for comparison input of the operational amplifier circuit IC1 also has a high impedance, the charging voltage e1 charged in the capacitor C is reliably held, and this charging voltage e1 is output from the output terminal F to the detected voltage E. Can be obtained as a detection voltage corresponding to.

This operation will be specifically described with reference to the waveform of FIG. 3. The detected voltage E is a voltage having an AC waveform, and at the start of detection, first, both ends of the capacitor C are switched to the switch SW1.
Is closed and both ends of the capacitor C are short-circuited to set the charging voltage e1 to zero.

In this state, the (-) terminal for comparison input has a zero voltage, so that when the detected voltage E given to the (+) terminal for comparison input becomes the first positive voltage E11, the operational amplifier circuit. Due to the differential amplification and high amplification factor of IC1, the output having the value of the operating power supply Vcc appears as the comparison output a1.

Since the comparison output a1 is applied to the base of the transistor Q1, the capacitor C is charged with the DC voltage V, and the charging voltage e1 is used for comparison input (-).
Appears at the terminal.

Due to this charging, the charging voltage e1 rises, but the detected voltage E applied to the (+) terminal for comparison input is detected.
When it becomes equal to the positive voltage value of, the comparison output a1 disappears and the charging is cut off.

Therefore, from the DC voltage V to the capacitor C
By setting the time constant for charging to the value shorter than the rising time of the waveform of the detected voltage E, the charging voltage of the capacitor C is charged to the same voltage as the peak value of the first positive voltage E11, At that point, the charging ends, and when the charging ends, the charging voltage e1 continues to be maintained at the value of the positive voltage E11 due to the high impedance.

This holding state is held only until the voltage value becomes higher than the positive voltage E11, that is, until the rising of the positive voltage E12 exceeds the positive voltage E11, that is, for the period t3. Later, the operational amplifier circuit I
The comparison output a2 is output only from C1 to the positive voltage E12, that is, during the period t2, the same charging operation as the above charging is performed, and the charging voltage e1 of the capacitor C changes to the positive voltage E2.
The state in which the peak voltage of 12 is reproduced and held is continued. Therefore, the charging voltage e1 appearing at the output terminal F
Means that the detection voltage corresponding to the positive-side peak voltage of the detected voltage E is output.

Here, even if the capacitance of the capacitor C is set to a sufficiently large value, the same voltage value as the detected voltage E can be reproduced. Therefore, by increasing this capacitance, the impedance seen from the output terminal F is increased. Therefore, even if an A / D conversion circuit or a detection control circuit is connected as a load circuit, for example, an accurate voltage corresponding to the peak voltage can be obtained without affecting the detected voltage E itself. Is output to the output terminal F.

Needless to say, it is necessary to set the value of the DC voltage V to a voltage value equal to or higher than the predicted maximum value of the detected voltage E.

Next, the case where the peak voltage of the detected voltage having a pulsating flow waveform, that is, a waveform which changes like a pulse on the same polarity side is detected by the configuration of FIG. 2 will be described. Here, in order to simplify the description, the detected voltage of the pulsating current waveform has a waveform in which the detected voltage E is shifted to the positive side by the voltage E01 like the detected voltage Eh in FIG. The voltage.

In this case, the comparison output a1 is output at the moment when the detected voltage Eh is applied, the capacitor C is charged, and the charging voltage e1 rises to the voltage E01, and thereafter. , A peak voltage E11 ′ is obtained by performing the same operation as the above-described operation for detecting the detected voltage E.
Since the voltage corresponding to E12 'is charged, after all, as shown in FIG.
Of the charging voltage e1 ', and the voltage appearing at the output terminal F appears as a voltage corresponding to the peak voltage of the detected voltage Eh.

[Second Embodiment] Next, a second embodiment will be described with reference to FIGS. 4, parts having the same reference numerals as those in FIG. 2 have the same functions as the parts having the same reference numerals described in FIG.

In the second embodiment, the negative side peak voltage of the detected voltage E having an AC waveform is detected. Each of the parts 1 to 4 is composed of a part indicated by a dotted line, and a capacitor C Is charged by a predetermined negative DC voltage -V, and this charging is performed by the switching operation of the transistor Q2 described later.

In the configuration of FIG. 4, the detected voltage E is applied to the (-) input terminal for comparison input of the operational amplifier circuit IC1, and the capacitor C is charged and held at the (+) terminal for comparison input. The comparison input circuit is reversely arranged so that the voltage -e1 is applied, and the transistor Q2 is set to p-n-p.
Type transistor, the emitter electrode is connected to the (−) side of the capacitor C, the collector electrode is connected to the ground side, and the DC voltage V is further connected to the (+) side of the capacitor C. It is configured to be arranged in reverse. The operational power supply of the operational amplifier circuit IC1 is Vc so that it operates with the same polarity as the polarity of the charging DC voltage -V.
A negative voltage operation type configuration is adopted in which the c side is set to 0 potential and the ground side is set to -V.

The operation will be specifically described with reference to the waveform of FIG. 5. The detected voltage E has the same AC waveform as the detected voltage E of FIG.
By closing 2 and short-circuiting both ends of the capacitor C, the charging voltage −e1 is set to zero.

In this state, the (+) terminal for comparison input has a zero voltage. Therefore, when the detected voltage E given to the (-) terminal for comparison input becomes the first negative voltage -E21, the operational amplifier circuit. Due to the differential amplification and high amplification factor of IC1, the negative output having the amplitude value corresponding to the operating power supply Vcc appears as the comparison output a1.

Since the comparison output a1 is applied to the base of the transistor Q2, the capacitor C is charged with the DC voltage V, and the charging voltage -e1 appears at the comparison input (+) terminal.

The charging voltage −e1 drops by this charging, but when the negative voltage value of the detected voltage E given to the (−) terminal for comparison input at that time is exceeded, the comparison output a1 disappears and the charging is cut off. Will be done.

Therefore, by setting the time constant for charging the capacitor C from the DC voltage V to a value shorter than the rising time of the waveform of the detected voltage E, the charging voltage of the capacitor C becomes When the negative voltage equal to the peak value of the negative voltage -E21 is charged, the charging is completed at that time, and when the charging is completed, the charging voltage -e1 becomes the negative voltage -E2.
The state held at the value of 1 will be continued.

This holding state is held until the time when the voltage value becomes higher on the negative side than the negative voltage -E21, that is, when the fall of the negative voltage -E22 exceeds the negative voltage -E21 on the negative side. The comparison output a1 is output from the operational amplifier circuit IC1, the same charging operation as the above charging is performed, and the charging voltage −e1 of the capacitor C reproduces the negative voltage −E22 corresponding to the peak voltage on the negative side. It will continue to hold. Therefore, the charging voltage −e appearing at the output terminal F
1 outputs a voltage corresponding to the peak voltage on the negative side of the detected voltage E.

Next, the case where the peak voltage of the detected voltage having a pulsating flow waveform, that is, a waveform which changes like a pulse on the same polarity side is detected by the configuration of FIG. 4 will be described. Here, in order to simplify the explanation, the detected voltage of the pulsating flow waveform is set to the detected voltage E as the detected voltage Es of FIG.
It is assumed that the voltage has a waveform in which only E02 is shifted to the negative side.

In this case, the comparison output a1 is output at the moment when the detected voltage Es is applied, the capacitor C is charged, and the charging voltage -e1 drops to the voltage -E02. After that, the same operation as in the case of detecting the detected voltage E is performed, and the peak voltage E2
Since the voltage corresponding to 1 '/ E22' is charged, in the end,
As in the charging voltage −e1 ′ in FIG. 5, the voltage appearing at the output terminal F appears as a voltage corresponding to the peak voltage of the detected voltage Es.

[Third Embodiment] Next, a third embodiment will be described with reference to FIGS. 6 and 7. In FIG. 6, portions having the same reference numerals as those in FIGS. 2 and 4 have the same functions as the portions having the same reference numerals described in FIGS.

In the third embodiment, the peak voltage on the negative side of the detected voltage Eh having the pulsating flow waveform shifted to the positive side is detected, and each of the parts 1 to 4 is indicated by the dotted line part. The capacitor C is charged by a predetermined DC voltage V, but this charging is performed by discharging the charging voltage charged by the switch SW3 in correspondence with the peak voltage only when the detection is started as described later. The remaining voltage discharged is held as the charging voltage.

In FIG. 6, the operational amplifier circuit IC1 supplies the detected voltage Eh to the (-) input terminal for comparison input, and the voltage e1 charged and held in the capacitor C to the (+) terminal for comparison input. And the transistor Q1 is an npn transistor, and the collector electrode is on the (+) side of the capacitor C via the resistor R, and
The emitter electrode is connected to the ground side, and the capacitor C
The (+) side of is connected to the DC voltage V via the switch SW3.

The operation will be specifically described below with reference to the waveforms in FIG. Here, the detected voltage Eh has the same waveform as the detected voltage Eh in FIG. 3 for the sake of simplicity.

First, at the start of detection, the switch SW
After closing 3 and applying the DC voltage V to the capacitor C, after charging the charging voltage e1 to a voltage higher than the peak voltage on the negative side of the detected voltage Eh assumed in advance, for example, the voltage + V , Switch SW3 is opened to charge voltage e
1 is held.

In this state, the (+) terminal for comparison input is at the voltage + V, so that the first voltage E01 of the detected voltage Eh given to the (-) terminal for comparison input causes the operational amplifier circuit IC1 to output the voltage. Since the comparison output a1 is output and the transistor Q1 becomes conductive, the charging voltage e1 of the capacitor C is discharged through the resistor R, but when the remaining discharged voltage e1 becomes the voltage E01, the comparison output a1 disappears. After all, the remaining charging voltage e1 becomes the same voltage as the voltage E01 and is held.

After that, when the first negative-side peak voltage E31 falls, a negative-side polarity difference voltage is generated between this voltage and the held voltage E01 by the charging voltage e1. The comparison output a1 is output, the transistor Q1 is turned on, and the charging voltage e of the capacitor C is increased.
1 is discharged through the resistance R, and when the remaining discharged voltage e1 becomes the voltage E31, the comparison output a1 disappears and the charging voltage e1 becomes a voltage corresponding to the voltage E31 and is held.

Then, at the next fall time of the negative-side peak voltage E32, the charging voltage e1 is discharged and the remaining charging voltage e is discharged in the same manner as in the case of the above-mentioned peak voltage E31.
1 becomes a voltage corresponding to the voltage E32 and is held. Therefore, the voltage that appears at the output terminal F is the detected voltage Eh.
The detection voltage corresponds to the peak voltage on the negative side of.

[Fourth Embodiment] Next, a fourth embodiment will be described with reference to FIGS. 8, FIG. 4, FIG. 6 and FIG.
The parts having the same reference numerals as those in FIG. 4 have the same functions as the parts having the same reference numerals described in FIGS. 2, 4, and 6.

The fourth embodiment is intended to detect the positive-side peak voltage of the detected voltage Es having the pulsating flow waveform which is shifted to the negative side, and the respective parts 1 to 4 are indicated by the dotted lines. Configured.

The capacitor C is charged with a predetermined DC voltage -V. This charging is performed only when the detection is started by making the negative charging voltage obtained by charging the predetermined DC voltage by the switch SW4 correspond to the peak voltage. The discharge is performed and the remaining voltage discharged is held as the charging voltage. The difference from the third embodiment is that the portion for taking out the charging voltage -e1 is on the negative side of the capacitor C.

In FIG. 8, the operational amplifier circuit IC1 supplies the detected voltage Es to the (+) input terminal for comparison input, and the voltage (-) held by the capacitor C at the (-) terminal for comparison input. In addition to applying e1, the transistor Q2 is a p-n-p type transistor, the emitter electrode is connected to the (+) side of the capacitor C via the resistor R, that is, the ground side, and the collector electrode is connected to the capacitor C ( In addition, the (-) side of the capacitor C is connected to the DC voltage -V via the switch SW4. The operational power supply of the operational amplifier circuit IC1 has a negative voltage operation type configuration that operates with the negative operation power supply -Vcc so that it operates with the same polarity as the charging DC voltage -V.

The operation will be specifically described below with reference to the waveforms shown in FIG. Here, the detected voltage Es is assumed to be a voltage having a waveform in which the voltage having the same waveform as the detected voltage E of FIG. 3 is shifted to the negative side by the voltage −E02 for the sake of simplicity.

First, at the start of detection, the switch SW
4 is closed and a negative DC voltage -V is applied to the capacitor C, so that the charging voltage -e1 is a negative voltage lower than the peak voltage on the positive side of the detected voltage Es assumed in advance, for example, the voltage -V. After charging so as to become, the switch SW4 is opened so that the charging voltage −e1 can be held.

In this state, the comparison input (-) terminal is at the voltage -V, so the operational amplifier circuit IC1 is generated by the first voltage -E02 of the detected voltage Es given to the comparison input (+) terminal. Since the comparison output a1 is output from the transistor Q2 and the transistor Q2 becomes conductive, the charging voltage −e1 of the capacitor C is discharged through the resistor R, but when the remaining discharged voltage −e1 becomes the voltage −E02, the comparison output a1 is output. Since a1 is lost, the remaining charging voltage −e1 is eventually the voltage −E.
The voltage will be the same as 02 and will be held.

After that, when the first positive-side peak voltage -E41 rises, a difference voltage of positive polarity is generated between this voltage and the held charging voltage -e1 voltage -E41. Output a1 is output and transistor Q
2 becomes conductive, and the charging voltage of the capacitor C-e1
Is discharged via the resistor R, and when the remaining discharged voltage −e1 becomes the voltage −E41, the comparison output a1 disappears, and the charging voltage e1 becomes a voltage corresponding to the voltage −E41 and is held.

Then, at the next rise time of the positive-side peak voltage -E4, the charging voltage -e1 is discharged and the remaining charging voltage -e1 is discharged in the same manner as in the above-mentioned peak voltage -E41. Since the voltage corresponding to the voltage −E42 is held, the voltage obtained at the output terminal F eventually appears as the detection voltage corresponding to the positive-side peak voltage of the detected voltage Es. Is.

[Fifth Embodiment] Next, a fifth embodiment will be described with reference to FIG. In FIG. 10, FIG. 2, FIG. 4, FIG.
The parts having the same reference numerals as those in FIG. 8 have the same functions as the parts having the same reference numerals explained in FIGS. 2, 4, 6, and 8.

The fifth embodiment is different from the third embodiment shown in FIG. 6 by biasing the ground side of the capacitor C and the ground side of the operational amplifier circuit IC1 in the third embodiment of FIG. 6 to the voltage -V. The detection operation and the detection operation in the second embodiment of FIG. 4 are configured to be performed by one circuit configuration.

Here, the detected voltage Ehs in FIG.
In order to simplify the explanation, first, the detected voltage E of FIG.
h, the detected voltage E in FIG. 5, and then the detected voltage Es in FIG.

First, at the start of detection, the switch SW
3 is closed and a voltage between DC voltage + V · −V is applied to the capacitor C, so that the charging voltage e1 is a positive voltage higher than the presumed positive-side peak voltage of the detected voltage Eh, for example, a voltage. After charging to + V, switch SW
3 is opened so that the charging voltage e1 can be held.

In this state, when the detected voltage Ehs of FIG. 10 becomes the detected voltage Eh of FIG. 7, the charging voltage e1 drops in the order of voltages E31 and E32 like the charging voltage e1 of FIG. Then, the detected voltage Eh in FIG.
When s becomes the state of the detected voltage E in FIG. 5, the charging voltage e1
Is the voltage 0 and the voltage E2 like the charging voltage e1 in FIG.
1 and the voltage E22 in that order, and then the detected voltage Ehs of FIG. 10 becomes the detected voltage Es of FIG.
In this state, the charging voltage e1 drops in the order of voltage E02, voltage E21 ', and E22' like charging voltage e1 'in FIG.

Further, the operational amplifier circuit I at each descent point
The comparison output a1 of C1 is a voltage + with reference to the voltage −V side.
The voltage of the pulse waveform rises to the V side, and the voltage of this pulse waveform causes the transistor Q1 to be in a conductive state, and the charging voltage e1 of the capacitor C is discharged through the resistor R, and the target detection voltage is the load terminal F. Will be output to.

[Sixth Embodiment] Next, a sixth embodiment will be described with reference to FIG. In FIG. 11, FIG. 2, FIG. 4, FIG.
8 and 10 are the same as those in FIG. 2 and FIG.
This is a part having the same function as the part with the same reference numeral described in FIGS. 6, 8 and 10.

In the sixth embodiment, the ground side of the capacitor C in the fourth embodiment of FIG. 8 is set to voltage + V, the Vcc of the operational amplifier circuit IC1 is set to voltage + V, and the ground side is set to voltage −V.
By biasing to V, the detection operation in the first embodiment of FIG. 2 and the detection operation in the fourth embodiment of FIG. 8 can be performed with one circuit configuration.

Here, in order to simplify the explanation, the detected voltage Esh is first detected voltage Es in FIG. 9 and then in FIG.
The detected voltage E and the detected voltage Eh in FIG. 3 are voltages having a continuous waveform.

First, when starting the detection, the switch SW
4 is closed and a voltage between the direct current voltage −V · + V is applied to the capacitor C, so that the charging voltage e1 is a negative voltage lower than the peak voltage on the positive side of the detected voltage Es assumed in advance, for example, a voltage. After charging to -V, switch SW
4 is opened so that the charging voltage e1 can be maintained.

In this state, when the detected voltage Esh in FIG. 11 changes to the detected voltage Es in FIG. 9, the charging voltage e1 becomes the voltage E02 / voltage E42 like the charging voltage −e1 in FIG.
・ Voltage E41 will rise in that order, and then FIG.
When the detected voltage Esh of 1 becomes the detected voltage E of FIG. 3, the charging voltage e1 rises in the order of voltage 0, voltage 11 and voltage E12 like the charging voltage e1 of FIG. Next, when the detected voltage Esh in FIG. 11 becomes the detected voltage Eh in FIG. 3, the charging voltage e1 becomes the voltage E01 / voltage E11 ′ like the charging voltage e1 ′ in FIG.
-The voltage will rise in the order of E12 '.

Further, the operational amplifier circuit I at each rising time point
The comparison output a1 of C1 is a voltage − with reference to the voltage + V side.
The voltage of the pulse waveform falls to the V side, and the voltage of this pulse waveform causes the transistor Q2 to be in a conductive state, and the charging voltage e1 of the capacitor C is discharged through the resistor R to output the target detection voltage to the load terminal. It will be output to F.

[Specific Examples of Components of Each Part of Each Embodiment] In the above embodiments, specific examples of the components of each part are given below. For example, the operational amplifier circuit IC1 is commercially available from the applicant, Sanyo Electric Co., Ltd. LA6324 type high performance quad operational amplifier IC is suitable, and the transistor Q1 is
For example, a commercially available 2SC536 type transistor, and as the transistor Q2, for example, a generally commercially available 2SA608 type transistor is suitable.

As described above, the capacitance of the capacitor C is obtained by lowering the impedance viewed from the output terminal F side.
Since it is preferable to avoid the change of the detection voltage due to the influence of the load side, it is preferable to select about 1 to 10 μF,
The value of the resistor R has a time constant formed by the resistor R and the capacitor C, which is shorter than the expected rise time or fall time of the AC waveform or pulsating flow waveform of the detected voltage E · Es · Eh, For example, it is preferable to select about 1/2 of these times. In addition, FIG. 6, FIG. 8, FIG.
When it is desired to reduce the resistance R in FIG. 11, a very small resistance value for protecting the overcurrent of the transistors Q1 and Q2, for example, 0.5 to 1Ω may be used. It goes without saying that the resistor R can be removed when Q2 is sufficiently resistant to the discharge current from the capacitor C during conduction. When the transistors Q1 and Q2 in FIGS. 2 and 4 cannot withstand the charging current to the capacitor C, a resistor having a small resistance value similar to the resistor R is interposed, and if necessary, the same as the above. It goes without saying that the time constant can be selected and configured.

Although not shown in the drawings, the operation of each component is such that a power supply circuit and an accessory circuit element required to perform the intended operation in each of the above embodiments are provided. Since it is obvious that it is provided and configured, it is omitted here.

[Modified Implementation] The present invention includes the following modified implementation. (1) In each embodiment, the time constant of the circuit for charging or discharging the capacitor C by the transistor Q1 or the transistor Q2 is set to the expected detected voltage E · Es · E.
The time constant is shorter than 1/2 of the rising time or the falling time of the AC waveform or the pulsating flow waveform of h.

(2) When it is certain that the period for which each peak voltage in the expected detected voltages E · Es · Eh in each embodiment is updated is larger than the alternating or pulsating current change cycle, for example, 10 In the case of a period that is more than twice as long, the time constant of the circuit that charges or discharges the capacitor C by the transistor Q1 or the transistor Q2 is set to a time constant of about ½ of the period to change the alternating current or pulsating current cycle. It is configured so that the target detection voltage is reached by sequentially charging or discharging.

(3) Switch SW3 in the fifth embodiment of FIG. 10 or switch S in the sixth embodiment of FIG.
In place of W4, a resistor having a relatively large value is provided, and the amount of change in the detected voltage value by the time constant of the resistor and the capacitor C changes the detected voltage value during each renewal period of each peak voltage has a predetermined accuracy. Set it so that it does not affect the configuration.

(4) Each switch SW1, SW2, SW3
-SW4 is composed of an electronic switch circuit having a high impedance when the circuit is opened.

(5) The operational amplifier circuit IC1 is composed of a discrete comparison and detection circuit such as a combination of a differential amplifier circuit and a flip-flop circuit.

(6) The combination of the polarity of the charging voltage for the capacitor C and the polarity on the side of the peak voltage detected by the voltage to be detected in each embodiment is changed to detect the desired peak voltage. To do.

[0083]

According to the present invention, the peak voltage of the detected voltage is updated by the voltage held by updating the charging voltage obtained by charging the capacitor by the DC power supply independent of the detected voltage so as to correspond to the detected voltage. Since the voltage equivalent to is obtained, the detected voltage itself is not directly used for charging or discharging the capacitor, so the detected voltage itself is lowered even if the voltage source of the detected voltage has a high impedance. It is possible to always detect the peak voltage with high accuracy.

Further, since the charging is performed after passing through the comparing means, it is not necessary to apply the detected voltage to the detecting device through the diode, and by eliminating the diode,
In the rectification characteristics of the diode, it is possible to eliminate the detection error of a minute voltage near the “0” voltage and the detection error due to nonlinearity.

Further, even when the voltage to be detected is applied to the detection device through the diode, the comparison means can be configured by a device that also serves as an amplifier circuit such as an operational amplifier circuit, so that a small voltage of the diode is not detected. Since the capacitor is charged with a voltage that greatly amplifies the voltage of the part that exceeds the detection error due to non-linearity, the amplified voltage of the part that exceeds this part is far better than the non-detected or non-linear part. The ratio of the non-detection and non-linearity becomes smaller when viewed proportionally. Therefore, it is possible to provide a highly accurate peak voltage detection device by apparently reducing the error ratio. There is.

[Brief description of drawings]

1 to 11 show the configuration of an embodiment of the present invention, and FIG.
2 to 14 show the configuration of the prior art, and the contents of each figure are as follows.

[Figure 1] Principle configuration diagram

FIG. 2 is a block diagram of the first embodiment.

FIG. 3 is an operation waveform diagram of the first embodiment.

FIG. 4 is a block diagram of a second embodiment.

FIG. 5 is an operation waveform diagram of the second embodiment.

FIG. 6 is a block configuration diagram of a third embodiment.

FIG. 7 is an operation waveform diagram of the third embodiment.

FIG. 8 is a block configuration diagram of a fourth embodiment.

FIG. 9 is an operation waveform diagram of the fourth embodiment.

FIG. 10 is a block diagram of a fifth embodiment.

FIG. 11 is a block diagram of a sixth embodiment.

FIG. 12 is an overall configuration diagram of an earth leakage detection device.

FIG. 13 is a waveform diagram of a detected voltage

FIG. 14 is a circuit diagram of a main part.

[Explanation of symbols]

 11 ground line 12 current transformer 13 semiconductor amplifier circuit 14 earth leakage breaker 15 alarm circuit 1 charging unit 2 comparing unit 3 peak voltage updating unit 4 peak voltage holding unit C capacitor D diode E detected voltage Eh detected voltage Es target Detection voltage F Output terminal IC1 Operational amplifier circuit Q1 transistor Q2 transistor R resistance SW1 switch SW2 switch SW3 switch SW4 switch V DC voltage a1 Comparative output e1 Charging voltage

Claims (1)

[Claims] 1. A peak voltage detecting device for obtaining a detection voltage corresponding to a peak voltage of a detected voltage having an AC waveform or a pulsating waveform based on a charging voltage charged in a capacitor, the DC voltage being supplied by a predetermined DC power source. Charging means for obtaining the charging voltage from the voltage charged in the capacitor; and comparing means for comparing the detected voltage with the charging voltage to obtain a comparison output corresponding to a portion having a voltage difference on a predetermined polarity side. A peak voltage updating unit that updates the charging voltage to a voltage corresponding to the peak voltage by the comparison output; and a peak that holds the updated charging voltage and obtains the updated charging voltage as the detection voltage. A peak voltage measuring device comprising a voltage holding means.