JPH0715135A - Printed circuit board and its manufacture - Google Patents
Printed circuit board and its manufactureInfo
- Publication number
- JPH0715135A JPH0715135A JP15373293A JP15373293A JPH0715135A JP H0715135 A JPH0715135 A JP H0715135A JP 15373293 A JP15373293 A JP 15373293A JP 15373293 A JP15373293 A JP 15373293A JP H0715135 A JPH0715135 A JP H0715135A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- hole
- substrate
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、セラミックス基板が用
いられた回路基板及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board using a ceramic board and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】回路導体、例えば銅導体を、スルーホー
ルが設けられたセラミックス基板上に形成する場合は、
銅ペーストがセラミックス基板の表裏およびスルーホー
ルの内壁に直接印刷され、この銅金属ペーストが印刷さ
れたセラミックス基板が焼成されてセラミックス基板の
表裏およびスルーホールの内壁に銅導体が形成される。2. Description of the Related Art When a circuit conductor, for example, a copper conductor is formed on a ceramic substrate provided with through holes,
The copper paste is directly printed on the front and back surfaces of the ceramic substrate and the inner walls of the through holes, and the ceramic substrate on which the copper metal paste is printed is fired to form copper conductors on the front and back surfaces of the ceramic substrate and the inner walls of the through holes.
【０００３】[0003]
【発明が解決しようとする課題】上述したように銅ペー
ストをセラミックス基板の表裏およびスルーホールの内
壁に直接印刷して焼成すると、そのセラミックス基板の
表裏に形成された銅導体は、その基板との接着強度が弱
く、かつそのスルーホールの内壁に形成された銅導体
は、その内壁との接着強度が弱いものとなる。As described above, when the copper paste is directly printed on the front and back surfaces of the ceramic substrate and the inner walls of the through holes and fired, the copper conductors formed on the front and back surfaces of the ceramic substrate are The adhesive strength is weak, and the copper conductor formed on the inner wall of the through hole has a weak adhesive strength with the inner wall.
【０００４】図２は、従来の回路基板の一例を示す断面
図である。このセラミックス基板１１には、その表裏に
貫通したスルーホール１５が形成されており、その表裏
の表面およびそのスルーホール１５の内壁には、銅導体
１３が形成されている。銅導体１３は、セラミックス基
板１１の表裏およびその表裏に貫通したスルーホール１
５の内壁との接着強度が弱いため、その表裏とその内壁
の境界で銅導体１３に剥離が生じている。この銅導体１
３の剥離が生じるとセラミックス基板１１の表裏間の導
通不良の原因となる。FIG. 2 is a sectional view showing an example of a conventional circuit board. Through holes 15 are formed on the front and back sides of the ceramic substrate 11, and copper conductors 13 are formed on the front and back surfaces and the inner walls of the through holes 15. The copper conductors 13 are formed on the front and back of the ceramic substrate 11 and the through holes 1 penetrating the front and back.
Since the adhesive strength with the inner wall of No. 5 is weak, the copper conductor 13 is peeled at the boundary between the front and back and the inner wall. This copper conductor 1
If the peeling of No. 3 occurs, it will cause poor conduction between the front and back of the ceramic substrate 11.
【０００５】本発明は、上記事情に鑑み、セラミックス
基板の表裏と、そのセラミックス基板のスルーホールの
内壁との境界での導体回路の剥離が防止された回路基板
及びその製造方法を提供することを目的とする。In view of the above circumstances, the present invention provides a circuit board in which peeling of a conductor circuit is prevented at the boundary between the front and back surfaces of a ceramic substrate and the inner wall of the through hole of the ceramic substrate, and a method for manufacturing the same. To aim.
【０００６】[0006]
【課題を解決するための手段】上記目的を達成するため
の本発明の回路基板は、表裏に貫通したスルーホールが
設けられたセラミックス基板と、このセラミックス基板
の表裏およびこのスルーホールの内壁を覆う結晶化ガラ
ス層と、このスルーホールを経由して上記セラミックス
基板の表裏に延在する、上記結晶化ガラス層上に形成さ
れた回路導体とを備えたことを特徴とするものである。A circuit board of the present invention for achieving the above object covers a ceramics substrate having through holes penetrating through the front and back, and the front and back of the ceramics substrate and the inner wall of the through hole. It is characterized by including a crystallized glass layer and a circuit conductor formed on the crystallized glass layer and extending to the front and back of the ceramic substrate through the through hole.
【０００７】ここに、上記セラミックス基板としてはア
ルミナ基板もしくは窒化アルミニウム基板が好適に用い
られる。但し、窒化アルミニウム基板の場合には、ガラ
ス中のＰｂ成分の少ない結晶化ガラスを使用する。ま
た、上記目的を達成するための本発明の回路基板の製造
方法は、表裏に貫通したスルーホールが設けられたセラ
ミックス基板を結晶化ガラス分散液に浸漬し、このセラ
ミックス基板を焼成し、このセラミックス基板の表裏お
よび上記スルーホールの内壁に導体金属ペーストを印刷
して焼成することを特徴とするものである。Here, an alumina substrate or an aluminum nitride substrate is preferably used as the ceramic substrate. However, in the case of an aluminum nitride substrate, crystallized glass with a small Pb component in the glass is used. Further, the method for manufacturing a circuit board of the present invention to achieve the above object, a ceramic substrate having through holes penetrating the front and back is immersed in a crystallized glass dispersion liquid, the ceramic substrate is fired, The method is characterized in that a conductor metal paste is printed on the front and back surfaces of the substrate and the inner wall of the through hole and fired.
【０００８】またＡｌＮ基板に使用する際、Ｃｕ導体中
のＰｂ成分含量の少ない、もしくは含まないＣｕ導体ペ
ーストを使用する。When used for an AlN substrate, a Cu conductor paste containing a small amount or no Pb component in the Cu conductor is used.
【０００９】[0009]
【作用】本発明の回路基板及びその製造方法は、セラミ
ックス基板の表面およびそのスルーホールの内壁を覆う
結晶化ガラス層上に回路導体が形成されたものであるた
め、その結晶化ガラス層とその回路導体は接着強度が強
く、これによりそのセラミックス基板の表面に形成され
た回路導体とそのスルーホールの内壁に形成された回路
導体との剥離が防止される。In the circuit board and the method for manufacturing the same according to the present invention, since the circuit conductor is formed on the crystallized glass layer covering the surface of the ceramic substrate and the inner wall of the through hole, the crystallized glass layer and the The circuit conductor has high adhesive strength, which prevents the circuit conductor formed on the surface of the ceramic substrate from being separated from the circuit conductor formed on the inner wall of the through hole.
【００１０】[0010]
【実施例】以下、本発明の実施例について説明する。図
１は、本発明の回路基板の一実施例を示す断面図であ
る。この回路基板を構成するアルミナ基板１には、その
表裏に貫通したスルーホール５が形成されており、その
アルミナ基板１の表裏およびそのスルーホール５の内壁
には、結晶化ガラス層７が形成されている。この結晶化
ガラス層７の表面には、スルーホール５を経由してアル
ミナ基板１の表裏に延びる銅導体３が形成されている。EXAMPLES Examples of the present invention will be described below. FIG. 1 is a sectional view showing an embodiment of the circuit board of the present invention. Through holes 5 are formed on the front and back of the alumina substrate 1 that constitutes this circuit board. A crystallized glass layer 7 is formed on the front and back of the alumina substrate 1 and on the inner walls of the through holes 5. ing. On the surface of the crystallized glass layer 7, copper conductors 3 extending to the front and back of the alumina substrate 1 via the through holes 5 are formed.
【００１１】本実施例の結晶化ガラス層７は、アルミナ
基板１が表１に示す成分を有する希薄結晶化ガラス分散
液に浸漬され、この浸漬されたアルミナ基板１が焼成さ
れて形成されたものである。表１に示す結晶化ガラス分
散液は、結晶化ガラスとしてＡｌ2 Ｏ3 −ＳｉＯ−Ｃａ
Ｏ（カルシウムアノーサイト）を主成分としてＣｕＯ、
ＴｉＯ2 を微量成分として含むガラス粉末および結合剤
として有機物（エチルセルロース）が配合されたもので
ある。The crystallized glass layer 7 of this embodiment is formed by immersing the alumina substrate 1 in a dilute crystallized glass dispersion liquid having the components shown in Table 1 and firing the immersed alumina substrate 1. Is. The crystallized glass dispersion liquid shown in Table 1 is Al 2 O 3 —SiO—Ca as crystallized glass.
CuO with O (calcium anorthite) as the main component,
It is a mixture of glass powder containing TiO 2 as a trace component and an organic substance (ethyl cellulose) as a binder.
【００１２】[0012]
【表１】 [Table 1]
【００１３】銅導体３は、アルミナ基板１の表裏および
そのスルーホール５の内壁の、結晶化ガラス層７の表面
に銅ペースト（図示せず）が印刷され、この印刷の後に
そのアルミナ基板１が焼成されて形成されたものであ
る。このアルミナ基板１の強度および銅導体３の剥離の
有無を表２に示す。尚、表２には、比較のため従来のセ
ラミックス基板の強度および銅導体の剥離の有無も示さ
れている。The copper conductor 3 is printed with copper paste (not shown) on the front and back surfaces of the alumina substrate 1 and on the surface of the crystallized glass layer 7 on the inner walls of the through holes 5, and the alumina substrate 1 is printed after this printing. It is formed by firing. Table 2 shows the strength of the alumina substrate 1 and the presence or absence of peeling of the copper conductor 3. For comparison, Table 2 also shows the strength of the conventional ceramic substrate and the presence or absence of peeling of the copper conductor.
【００１４】[0014]
【表２】 [Table 2]
【００１５】表２に示すように、本実施例のアルミナ基
板１には、その銅導体３の剥離は認められなかった。こ
こに、本実施例の回路導体には銅導体３が用いられてい
るが、この回路導体は銅導体３に限定されるものではな
く金導体などであってもよいことは勿論である。As shown in Table 2, no peeling of the copper conductor 3 was observed on the alumina substrate 1 of this example. Although the copper conductor 3 is used as the circuit conductor of this embodiment, the circuit conductor is not limited to the copper conductor 3 and may be a gold conductor or the like.
【００１６】[0016]
【発明の効果】本発明の回路基板及びその製造方法は、
セラミックス基板の表面およびそのスルーホールの内壁
を覆う結晶化ガラス層上に回路導体を形成したものであ
るため、そのセラミックス基板の表面とそのスルーホー
ルの内壁の境界でその回路導体の剥離が防止され、これ
によりセラミックス基板の表裏間の導通不良が防止され
る。The circuit board and the manufacturing method thereof according to the present invention are
Since the circuit conductor is formed on the crystallized glass layer that covers the surface of the ceramic substrate and the inner wall of the through hole, peeling of the circuit conductor is prevented at the boundary between the surface of the ceramic substrate and the inner wall of the through hole. As a result, defective conduction between the front and back of the ceramic substrate is prevented.
【図１】本発明の回路基板の一実施例を示す断面図であ
る。FIG. 1 is a cross-sectional view showing an embodiment of a circuit board of the present invention.
【図２】従来の回路基板の一例を示す断面図である。FIG. 2 is a cross-sectional view showing an example of a conventional circuit board.
１ アルミナセラミックス基板 ３ 銅導体 ５ スルーホール ７ 結晶化ガラス層 1 Alumina Ceramics Substrate 3 Copper Conductor 5 Through Hole 7 Crystallized Glass Layer
Claims (3)
たセラミックス基板と、該セラミックス基板の表裏およ
び該スルーホールの内壁を覆う結晶化ガラス層と、該ス
ルーホールを経由して前記セラミックス基板の表裏に延
在する、前記結晶化ガラス層上に形成された回路導体と
を備えたことを特徴とする回路基板。1. A ceramics substrate having through holes penetrating through the front and back, a crystallized glass layer covering the front and back of the ceramics substrate and the inner wall of the through hole, and the front and back of the ceramics substrate through the through hole. And a circuit conductor formed on the crystallized glass layer, the circuit board extending over the substrate.
しくは窒化アルミニウム基板であることを特徴とする請
求項１記載の回路基板。2. The circuit board according to claim 1, wherein the ceramics substrate is an alumina substrate or an aluminum nitride substrate.
たセラミックス基板を結晶化ガラス分散液に浸漬し、該
セラミックス基板を焼成し、該セラミックス基板の表裏
および前記スルーホールの内壁に導体金属ペーストを印
刷して焼成することを特徴とする回路基板の製造方法。3. A ceramics substrate having through holes penetrating through the front and back is immersed in a crystallized glass dispersion liquid, the ceramics substrate is fired, and a conductor metal paste is applied to the front and back of the ceramics substrate and the inner wall of the through hole. A method for manufacturing a circuit board, which comprises printing and firing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15373293A JPH0715135A (en) | 1993-06-24 | 1993-06-24 | Printed circuit board and its manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15373293A JPH0715135A (en) | 1993-06-24 | 1993-06-24 | Printed circuit board and its manufacture |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0715135A true JPH0715135A (en) | 1995-01-17 |
Family
ID=15568890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15373293A Withdrawn JPH0715135A (en) | 1993-06-24 | 1993-06-24 | Printed circuit board and its manufacture |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0715135A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001044143A1 (en) * | 1999-12-16 | 2001-06-21 | Tokuyama Corporation | Joint body of glass-ceramic and aluminum nitride sintered compact and method for producing the same |
| US7346971B2 (en) | 2004-07-19 | 2008-03-25 | Newfrey Llc | Blind rivet monitoring system supply pressure compensation |
| US7503196B2 (en) | 2004-03-24 | 2009-03-17 | Newfrey Llc | Rivet monitoring system |
| US7536764B2 (en) | 2002-07-18 | 2009-05-26 | Newfrey Llc | Method and apparatus for monitoring blind fastener setting |
| US7559133B2 (en) | 2004-03-24 | 2009-07-14 | Newfrey Llc | Riveting system |
-
1993
- 1993-06-24 JP JP15373293A patent/JPH0715135A/en not_active Withdrawn
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2001044143A1 (en) * | 1999-12-16 | 2001-06-21 | Tokuyama Corporation | Joint body of glass-ceramic and aluminum nitride sintered compact and method for producing the same |
| US6818574B2 (en) | 1999-12-16 | 2004-11-16 | Tokuyama Corporation | Jointed body of glass-ceramic and aluminum nitride sintered compact and method for producing the same |
| US7536764B2 (en) | 2002-07-18 | 2009-05-26 | Newfrey Llc | Method and apparatus for monitoring blind fastener setting |
| US7503196B2 (en) | 2004-03-24 | 2009-03-17 | Newfrey Llc | Rivet monitoring system |
| US7559133B2 (en) | 2004-03-24 | 2009-07-14 | Newfrey Llc | Riveting system |
| US7346971B2 (en) | 2004-07-19 | 2008-03-25 | Newfrey Llc | Blind rivet monitoring system supply pressure compensation |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20000905 |