JPH07146729A - Device for preventing break down of computer system - Google Patents

Abstract

PURPOSE:To prevent system break down due to the heat generation of a computer system. CONSTITUTION:A frequency divider 4 can frequency-divide the frequency of a crystal oscillator 3 and generate two high and low clock frequencies. A temperature sensor 1 detects a temperature inside the computer system 5, the frequency divider 4 outputs the high clock frequency to the computer system 5 while the temperature is low, however, when the temperature inside the computer system 5 exceeds a prescribed level, the clock frequency to be supplied to the computer system 5 is switched to the low frequency. Thus, the heat generation of the logic circuit of the computer system 5 is reduced and the system break down is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for preventing system down due to heat generation of a computer system. In the drawings, the same reference numerals denote the same or corresponding parts.

[0002]

2. Description of the Related Art Conventional methods of preventing a system down of a computer system include a method of duplicating a cooling fan, an abnormal temperature in the system is detected and an alarm is issued, and the operation is automatically performed by a person in charge of maintenance. There is known a method of saving data in a computer system to stop the system in an emergency.

[0003]

However, in such a conventional method, the internal temperature of the computer system rises due to the rise of the ambient temperature and the stop of the cooling fan,
It is inconvenient because it will be down due to heat. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a computer system down prevention device capable of slowing down the rise of the internal temperature of the computer system and lengthening the time until it goes down, or continuing the operation even if the cooling fan is stopped. To provide.

[0004]

In order to solve the above-mentioned problems, a down-prevention device according to a first aspect of the present invention is provided with a means (a temperature sensor 1, etc.) for detecting the temperature inside a computer system (5, etc.), When the temperature detected by the temperature detecting means exceeds a predetermined value, clock frequency switching means (frequency divider 4 etc.) for switching the clock frequency used inside the computer system to a low frequency is provided.

A down prevention device according to a second aspect of the present invention is based on means for detecting stop of a fan for cooling a computer system (5 or the like) (cooling fan stop sensor 2 or the like) and detection by the cooling fan stop detecting means. And a clock frequency switching means (frequency divider 4 etc.) for switching the clock frequency used in the computer system to a low frequency.

A down prevention device according to a third aspect of the present invention comprises means for detecting the temperature inside the computer system (such as 5) (temperature sensor 1 etc.) and means for detecting the stop of a fan for cooling the computer system (cooling). And the clock frequency used in the computer system is switched to a low frequency when the temperature detected by the fan stop sensor 2 or the like) and the temperature detected by the temperature detection means exceeds a predetermined value, or based on the detection of the cooling fan stop detection means. Clock frequency switching means (such as a partial functional unit in the computer system 5) is provided.

Further, in the down prevention device according to claim 4, in the down prevention device according to claim 3, the clock frequency switching means detects the temperature detection means when the cooling fan stop detection means detects the cooling fan stop detection means. The clock frequency is switched to a lower frequency than when the temperature exceeds a predetermined value.

A down prevention device according to a fifth aspect is the down prevention device according to any one of the first to fourth aspects, wherein when the clock frequency switching means switches the clock frequency to a low frequency, It is assumed that means (power supply control circuit 6, etc.) for lowering the power supply voltage supplied to the logic circuit in the computer system (from the power supply device 7, etc.) is provided.

Further, the down prevention apparatus according to claim 6 outputs an operation command (to the frequency divider 4 or the like) for selectively switching the clock frequency given to the computer system (5 or the like) to either high or low. When the operation command output means (such as the switch 8) and the operation command output means outputs an operation command for selecting a low clock frequency,
Means for lowering the power supply voltage supplied to the logic circuit in the computer system (from the power supply device 7 or the like) (power supply control circuit 6)
Etc.) and.

[0010]

The down prevention apparatus for a computer system according to the present invention operates as follows. (1) When an increase in the temperature inside the computer system is detected due to an increase in the ambient temperature, the frequency of the clock used inside the computer system is switched to a low frequency to reduce the power consumption and the heat generation amount. .

(2) When the stop of the cooling fan is detected,
The frequency of the clock used in the computer system is switched to a low frequency to reduce power consumption and heat generation. (3) The frequency of the clock used inside the computer system is determined by detecting and detecting the rise of the ambient temperature and the stop of the cooling fan, etc. by the program executed at regular intervals.
Switch to a lower frequency to reduce power consumption and heat generation.

(4) A program executed at regular intervals determines and detects an increase in the ambient temperature, a stop of the cooling fan, etc., and switches the frequency of the clock used inside the computer system to a low frequency, and further logic The power supply voltage supplied to the circuit is reduced to reduce power consumption and heat generation. (5) Depending on whether it is used in natural air cooling or forced air cooling, the frequency of the clock used in the computer system and the power supply voltage supplied to the logic circuit are changed by switches etc. Use with a suitable heating value.

That is, the LS manufactured by the C-MOS process
In semiconductors such as I, the consumption current flows almost in proportion to the operation clock, so that the lower the frequency of the operation clock, the lower the power consumption and the heat generation amount. Therefore, when it is detected that the temperature inside the computer system has risen or the cooling fan has stopped due to an increase in the ambient temperature or the cooling fan has stopped, the frequency of the clock used inside the computer system should be switched to a lower frequency. This makes it possible to moderate the rise in internal temperature, lengthen the time until the system goes down, or continue operation even if the cooling fan stops.

Further, depending on the type of semiconductor, it is possible to operate even if the power supply voltage is lowered when the frequency is lowered. Therefore, the heat generation amount can be further reduced by lowering both the frequency and the power supply voltage. Furthermore, by switching the clock frequency of one type of computer system and the voltage supplied to the logic circuit with a switch, it is possible to adapt to the cooling method of the computer system.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of an embodiment of the invention according to claim 1. In the figure, the clock signal of the crystal oscillator 3 is frequency-divided by a frequency divider (or a frequency switcher, which will be simply referred to as a frequency divider hereinafter) 4 and supplied to a computer system 5. The frequency divider 4 can change the frequency division ratio according to the signal from the temperature sensor 1 and output a clock signal having two types of frequencies, high and low.

The computer system 5 is normally supplied with a high frequency clock signal from the frequency divider 4. When the temperature sensor 1 detects an abnormality in the internal temperature of the computer system 5, the frequency divider 4 changes the frequency division ratio according to the output signal of the temperature sensor 1, and supplies the clock signal of a low frequency to the computer system 5. .

FIG. 2 shows a configuration as an embodiment of the invention according to claim 2. In the figure, the clock signal of the crystal oscillator 3 is frequency-divided by the frequency divider 4 and supplied to the computer system 5. The frequency divider 4 changes the frequency division ratio according to the signal from the cooling fan stop sensor 2 to adjust the high and low values to 2
It is possible to output clock signals of various frequencies.

The computer system 5 is usually supplied with a high frequency clock signal from the frequency divider 4. When the cooling fan stop sensor 2 detects the stop of the cooling fan (not shown) of the computer system 5, the frequency divider 4 changes the frequency division ratio according to the output signal of the cooling fan stop sensor 2 so that the computer system 5 has a low frequency. Provides a clock signal of frequency.

FIG. 3 shows a configuration as an embodiment of the invention according to claims 3 and 4. In the figure, the clock signal of the crystal oscillator 3 is frequency-divided by the frequency divider 4 and supplied to the computer system 5. The frequency divider 4 can set an arbitrary frequency division ratio by a program of the computer system 5, divides the clock signal of the crystal oscillator 3 in accordance with the set frequency division ratio, and the computer system 5
Supply to.

A temperature sensor 1 and a cooling fan stop sensor 2 are connected to the computer system 5. When only the internal temperature abnormality is detected by the temperature sensor 1, the computer system 5 controls the frequency divider 4 so as to decrease the clock frequency by about 10% depending on the degree of temperature rise.

Every time the clock frequency is reduced by 10%,
The heat generation amount (in the case of C-MOS semiconductor) is also reduced by about 10%. Further, when the cooling fan stop sensor 2 detects the stop of the cooling fan (not shown), the computer system 5 causes the frequency divider 4 to detect a frequency of a frequency at which the cooling fan can operate for a certain period of time or continuously. Switch to clock.

When the cooling fan is stopped and the internal temperature reaches the limit (that is, when the above-mentioned detection of the sensors 1 and 2 is performed together), the computer system 5 is controlled to stop itself. To do. FIG. 4 shows a flow chart of a control program of the computer system of FIG. 3, and S1 to S16 show the steps.

Since this program does not need to be executed all the time, it may be added to the program executed at regular intervals. In the present embodiment, it is assumed that the time count TC is set to be once per second, and the initial value of the time count TC for determining the time interval from changing the clock frequency to checking the temperature is 3
It is set to 00 (5 minutes).

The initial value of the coefficient n is 10, and when n is decreased by 1, the clock frequency is lowered by 10% as in steps S7 and S8. When a fan abnormality is detected (S1 → S2, branch Y), if n is larger than 5 (S15, branch Y), n = 5 is set (S1).
6) The clock frequency LF at the time of abnormality is obtained (S7), and the frequency division ratio is set in the frequency divider 4 of FIG. 3 (S8).

When a temperature abnormality is detected (S1 to S4, branch Y), if n is larger than 5 (S5, branch Y), 1 is subtracted from n (S6) to obtain the clock frequency LF at the time of abnormality ( S7), and set the frequency division ratio in the frequency divider 4 of FIG.
8) and time count TC = 0 (S9). Each time the program is executed, the time count TC is incremented by 1 (S1 to S3, branch Y → S12), and the TC is 300 (5
Minutes) (S3, branch N), the presence or absence of temperature abnormality is checked (S4), and if there is a temperature abnormality (S4, branch Y → S5,
Branch Y), 1 is subtracted from n (S6), the clock frequency LF at the time of abnormality is obtained (S7), and the frequency division ratio is set in the frequency divider 4 of FIG. 3 (S8).

This operation is repeated until n becomes 5, and n
When the value becomes 5 (S5, branch Y), the value of n is kept as it is, the taum count TC is set to 0 (S9), and the processing of FIG. If the temperature rises even when the clock frequency is lowered and the operating limit temperature of the computer system is reached (S1, branch Y), system stop processing is executed (S
11).

As described above, when the fan abnormality and the temperature abnormality are eliminated during the operation at the abnormal clock frequency of n = 5 (S1 to S4, branch N), the temperature is increased every 5 minutes until n = 10. While checking the abnormality, the clock frequency is increased by 10% (S13 → S14 → S7 to S9). FIG. 5 shows a configuration as an embodiment of the invention according to claim 5. In the figure, the clock signal of the crystal oscillator 3 is
The frequency is divided by the frequency divider 4 and supplied to the computer system 5.

The frequency divider 4 can change the frequency division ratio according to the signal from the temperature sensor 1 or the cooling fan stop sensor 2 and output clock signals of two types of frequencies, high and low. The power supply control circuit 6 outputs a signal for changing the output voltage of the power supply device 7 by monitoring the output voltage of the power supply device 7 and the signal of the temperature sensor 1 or the cooling fan stop sensor 2.

The power supply device 7 is a power supply device for supplying power to the logic circuit of the computer system 5 and is capable of changing the output voltage according to the signal of the power supply control circuit 6. The computer system 5 includes
Normally, a high frequency clock signal is supplied from the frequency divider 4.

The temperature sensor 1 has a computer system 5
When an abnormality in the internal temperature of the cooling fan is detected, or when the cooling fan stop sensor 2 detects the stop of the cooling fan, the frequency divider 4 changes the division ratio according to the output signal of the temperature sensor 1 or the cooling fan stop sensor 2. Then, the computer system 5 is supplied with a low-frequency clock signal. Further, when the frequency switching is completed, the power supply control circuit 6 outputs a signal to the power supply device 7 so as to lower the output voltage, and lowers the power supply voltage supplied from the power supply device 7 to the computer system 5. To do.

FIG. 6 shows a configuration as an embodiment of the invention according to claim 6. In the figure, the clock signal of the crystal oscillator 3 is frequency-divided by the frequency divider 4 and supplied to the computer system 5. The frequency divider 4 can output clock signals of two types of frequencies, high and low, depending on the state of the switch 8.

The power supply control circuit 6 outputs a signal for changing the output voltage of the power supply device 7 by monitoring the output voltage of the power supply device 7 and the state of the switch 8. The power supply 7 is
It is a power supply device for supplying power to the logic circuit of the computer system 5, and is a power supply device capable of varying the output voltage according to the signal of the power supply control circuit 6.

When the computer system 5 is forcedly cooled by a cooling fan or the like, a high frequency clock is supplied from the frequency divider 4 with the switch 8 set to the "H" side, and the computer system 5 operates at a high frequency from the power supply device 7. Supply enough voltage to operate with the clock. When the computer system 5 is used with natural air cooling, for example, the switch 8 is switched to the “L” side, and a low frequency clock is supplied from the frequency divider 4 so that the amount of heat generated can be continuously operated with natural air cooling. However, the power supply device 7 supplies a voltage (a voltage lower than the voltage in the case of a high frequency clock) sufficient for the computer system 5 to operate with a low frequency clock.

If it is possible to cope with natural air cooling simply by switching to a low frequency clock, the power supply voltage does not have to be lowered. FIG. 7 shows a configuration as a different embodiment of the invention according to claim 5. In the figure, the crystal oscillator 3
The clock signal is divided by the frequency divider 4 and supplied to the computer system 5.

The frequency divider 4 can set an arbitrary frequency division ratio by a program of the computer system 5,
The clock signal of the crystal oscillator 3 is frequency-divided according to the set frequency division ratio and supplied to the computer system 5. The power supply control circuit 6 monitors the output voltage of the power supply device 7, and outputs a signal for changing the output voltage of the power supply device 7 according to an instruction from the computer system 5.

The power supply device 7 is a power supply device for supplying power to the logic circuit of the computer system 5 and is capable of changing the output voltage according to the signal of the power supply control circuit 6. A temperature sensor 1 and a cooling fan stop sensor 2 are connected to the computer system 5.

When only the internal temperature abnormality is detected by the temperature sensor 1, the computer system 5 controls the frequency divider 4 so as to decrease the clock frequency by about 10% depending on the degree of temperature rise. Every time the clock frequency is reduced by 10% (in the case of C-MOS semiconductor)
The calorific value also decreases by about 10%.

When the cooling fan stop sensor 2 detects the stop of the cooling fan, the computer system 5 can operate via the frequency divider 4 and the power supply control circuit 6 for a fixed time or continuously without the cooling fan. Switch to frequency clock and low power supply voltage. When the cooling fan stops and the internal temperature reaches the limit, the computer system 5 controls itself to stop.

FIG. 8 shows a flow chart of the control method of the computer system of FIG. 7, and S1 to S35 show the steps in the figure. The flow chart of FIG. 8 is obtained by adding power supply voltage control to the flow chart of FIG. 4, and steps with the same reference numerals as those in FIG. 4 indicate the same operations as in FIG. Since this program does not need to be executed all the time, it may be added to the program executed at regular intervals.

In this embodiment, it is assumed that the processing is executed once per second, and the initial value of the time count TC for determining the time interval from changing the clock frequency to checking the temperature is 300 (5 minutes). ). Moreover, the initial value of the coefficient n is 10, and when n is reduced by 1, step S6 is performed.
The clock frequency is reduced by 10% as in S7.

When an abnormality of the fan is detected (S1 → S
2, branch Y), if the power supply voltage is not lowered (S31, branch N), n = 5 is set (S32), the clock frequency LF at the time of abnormality is obtained (S33), and the frequency divider 4 of FIG. The frequency division ratio is set (S34), and the instruction to lower the power supply voltage is given in FIG.
To the power supply control circuit 6 (S35). When a temperature abnormality is detected (S1 to S4, branch Y), when n is larger than 5 (S5A, branch N), 1 is subtracted from n (S6) to obtain the clock frequency LF at the time of abnormality (S7). , The frequency division ratio is set in the frequency divider 4 in FIG. 7 (S8), and the time count TC
= 0 (S9).

Until the time count TC reaches 300, TC is incremented by 1 each time the program is executed (S1
~ S3, branch Y → S12), when TC reaches 300 (5 minutes) (S3, branch N), the presence or absence of a temperature abnormality is confirmed (S
4) If the temperature is abnormal (S4, branch Y), subtract 1 from n (S5A, branch N → S6) to obtain the clock frequency LF at the time of abnormality (S7), and use the frequency divider 4 in FIG. The frequency division ratio is set (S8).

This operation is repeated until n becomes 5, and n
Is 5 (S5A, branch Y), the power supply control circuit 6 of FIG. 7 is instructed to lower the power supply voltage (S23, branch N, S).
35). If the temperature rises even when the clock frequency and the power supply voltage are lowered and the operating limit temperature of the computer system is reached (S1, branch Y), system stop processing is executed (S11).

When the fan abnormality and the temperature abnormality have disappeared (S1 to S4, branch N), the power supply voltage is returned to the original value (S21, branch Y → S22) until n = 10.
While checking the temperature abnormality every minute, increase the clock frequency by 10% (S4 → S21 → S13 → S14 →
S7-S9).

[0045]

According to the present invention, when the temperature rise in the computer system or the stop of the cooling fan is detected, the frequency of the clock used in the computer system is switched to a low frequency.
It is possible to slow down the internal temperature of the computer system and increase the time until the internal temperature goes down, or it is possible to continue the operation even if the cooling fan is stopped.

Further, in this case, the heat generation amount can be further reduced by lowering both the clock frequency and the power supply voltage. Further, by switching the switch, one type of computer system can be used by forced air cooling so that processing can be executed at high speed, or by natural air cooling although the processing speed may be slow.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration as an embodiment of the invention according to claim 1.

FIG. 2 is a block diagram showing a configuration as an embodiment of the invention according to claim 2;

FIG. 3 is a block diagram showing a configuration as an embodiment of the invention according to claims 3 and 4.

4 is a flowchart showing the control operation of FIG.

FIG. 5 is a block diagram showing a configuration as an embodiment of the invention according to claim 5;

FIG. 6 is a block diagram showing a configuration as an embodiment of the invention according to claim 6;

FIG. 7 is a block diagram showing the configuration of another embodiment of the invention according to claim 5;

FIG. 8 is a flowchart showing the control operation of FIG.

[Explanation of symbols]

 1 Temperature Sensor 2 Cooling Fan Stop Sensor 3 Crystal Oscillator 4 Frequency Divider 5 Computer System 6 Power Supply Control Circuit 7 Power Supply Device 8 Switch

Claims (6)

[Claims] 1. A means for detecting a temperature inside a computer system, and a clock frequency switching means for switching a clock frequency used inside the computer system to a low frequency when the temperature detected by the temperature detecting means exceeds a predetermined value. A down prevention device for a computer system, comprising: 2. A means for detecting a stop of a fan for cooling a computer system, and a clock frequency switching means for switching a clock frequency used inside the computer system to a low frequency based on the detection of the cooling fan stop detecting means. A computer system down prevention device characterized by the above. 3. A means for detecting the temperature inside the computer system, a means for detecting a stop of a fan for cooling the computer system, and a temperature when the temperature detected by the temperature detecting means exceeds a predetermined value, or the cooling. A down prevention device for a computer system, comprising: a clock frequency switching unit that switches a clock frequency used inside the computer system to a low frequency based on detection by a fan stop detection unit. 4. The down prevention device according to claim 3, wherein the clock frequency switching means only detects a temperature detected by the temperature detecting means when the cooling fan stop detecting means detects the temperature. A down prevention device for a computer system, wherein the clock frequency is switched to a lower frequency than in the case. 5. The down prevention device according to claim 1, wherein when the clock frequency switching means switches the clock frequency to a low frequency, power is supplied to a logic circuit in the computer system. A down prevention device for a computer system, which is provided with means for lowering a voltage. 6. An operation command output means for outputting an operation command for selectively switching a clock frequency to be supplied to a computer system to either high or low, and an operation command for the operation command output means to select a low clock frequency. A down prevention apparatus for a computer system, comprising means for lowering a power supply voltage supplied to a logic circuit in the computer system when output is performed.