JPH0714500A - Field emission cathode - Google Patents

Abstract

PURPOSE:To prepare a field emission cathode allowing to provide an independent resistance region immediately below emitters and to provide the emitters with uniform height and distance to a gate. CONSTITUTION:A cathode 2 is formed on a substrate such as glass by deposition. A first insulating layer 3 and a second insulating layer 4 are laminated on the cathode 2. In addition, a gate 5 is formed on the second insulating layer 4. Emitters 7 are formed by deposition in holes opened in the gate 5 and the second insulating layer 4. In addition, directly under the formed emitters 7 are used as a resistance region 5 formed into resistance by applying laser annealing to the first insulating layer. The cathode 2 is formed by sputtering by using a high m.p. metal having no deterioration in its quality even under high temp. caused by laser annealing as a material.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission cathode known as a cold cathode, and more particularly to a field emission cathode having a novel structure and a method for manufacturing the same.

[0002]

2. Description of the Related Art The applied electric field on the surface of a metal or semiconductor is reduced to 10
^{At a} voltage of about ⁹ [V / m], the tunnel effect causes electrons to pass through the barrier so that electrons are emitted in a vacuum even at room temperature. This is called field emission.
A cathode that emits electrons based on this principle is called a field emission cathode. In recent years, it has been possible to make a surface emission type field emission cathode composed of a micron size field emission cathode by making full use of semiconductor processing technology. The field emission cathode can be used as a fluorescent display device, a CRT, an electron microscope or an electron microscope. It is about to be used in beam devices.

FIG. 3 is a perspective view of an example of a field emission cathode (hereinafter referred to as FEC) called a Spindt type having a resistance between the emitter and the cathode. In this figure, a cathode line 112 is formed on a substrate 111.
An emitter 119 on the cone is formed thereabove via a resistance region 117. Further, a gate 114 is provided on the cathode line 112 via an insulating layer 113,
A cone-shaped emitter 119 is formed in a round opening provided in the gate 114, and a tip portion of the emitter 119 faces the opening formed in the gate. The pitch between the emitters 119 can be 10 μm or less, and tens of thousands to hundreds of thousands of such emitters can be provided on one substrate 111.

The reason why the resistance region 117 is provided below the emitter 119 is as follows. General FEC
In the above, the distance between the tip of the emitter on the cone and the gate is set to an extremely short distance of sub-micron, and tens of thousands of emitters are provided on one substrate. And the gate may be short-circuited. As described above, if even one of the gate and the emitter is short-circuited, the cathode and the gate are short-circuited, so that no voltage is applied to all the emitters, resulting in an inoperable FEC. In addition, local degassing may occur during the initial operation of the FEC, and this gas may cause a discharge between the emitter and the gate or the anode, which causes a large current to flow into the cathode and destroy the cathode. there were.

Further, among many emitters, electrons are likely to be concentrated and emitted from the ones from which electrons are likely to be emitted, so that current is concentrated on the emitters, which may cause an abnormally bright spot on the screen. there were. In order to prevent such operational defects, conventionally, a resistance region is provided between the cathode and the emitter.

That is, as shown in FIG.
When the emitter 119 is formed on the cathode 17, the cathode current is suppressed by the resistance region 117, so that the cathode 112 is not destroyed. Further, when the current is concentrated on a certain emitter, the voltage drop of the resistance region 117 provided in the emitter becomes large, so that the emitter potential rises, so that the voltage between the gate and the cathode drops, and the current concentrates. Will be able to prevent. Therefore, by providing the resistance region 117,
The FEC manufacturing yield can be improved, and stable operation can be performed.

Next, the manufacturing process of the FEC shown in FIG. 3 will be described with reference to FIG.
Shown in. First, as shown in FIG. 4A, a cathode line 112 is formed on a substrate 111 made of glass or the like by vapor deposition, and an insulating layer 113, which is SiO, is formed on the cathode line 112.
_Two layers 113 are formed. Further, niobium (Nb) to be the gate 114 is vapor-deposited on the gate 114,
After applying a photoresist thereon, patterning and etching are performed to make holes in the gate 114 and the insulating layer 113.

Next, as shown in FIG.
While rotating 1, the vapor deposition of aluminum to be the peeling layer 115 is performed in an oblique direction. When the oblique deposition is performed in this manner, the peeling layer 115 is not deposited in the opened hole but is selectively deposited only on the surface of the gate 113.

Further, as shown in FIG. 1C, the release layer 1
A resistive material layer 116 made of a mixture of molybdenum or the like is deposited on the layer 15. Then, this resistance material is also deposited in the punched holes, and the resistance region 117 formed of a trapezoidal trapezoid is formed on the cathode line 112. Next, when molybdenum which is an emitter material is deposited on the resistance material layer 116 from above the resistance material layer 116, molybdenum is deposited on the trapezoidal resistance region 117 as shown in FIG. Deposit in the shape of cone 119. After that, the peeling layer 115 on the gate 113 and the resistance material layer 11 are formed.
6 and the emitter material layer 118 are removed by etching, an FEC having a shape as shown in FIG.

In the FEC shown in FIG. 4E, the distance between the emitter 119 on the cone and the gate electrode 113 can be made submicron, so that the emitter 119 and the gate 11 can be separated.
It becomes possible to emit electrons from the emitter 119 by applying a voltage of only several tens of volts between the three.

[0011]

However, the FEC shown in FIG. 3 has the following problems. (1) The tip of the emitter has a uniform height with respect to the gate,
In addition, it is desirable that the distance from the gate is substantially constant, but the emitter is formed by vapor deposition of the resistance region and vapor deposition of the emitter metal twice, and it is difficult to make the vapor deposition thickness uniform. Therefore, it becomes extremely difficult to make the heights of the individual emitters formed by two vapor depositions uniform. Therefore, there is a problem in that the height of the emitter varies. Further, if the thickness of the resistance region varies, the resistance value also varies.

(2) Since the peeling layer is formed by oblique vapor deposition, the opening of the peeling layer is smaller than the opening of the gate. Since the resistance layer is formed by normal vapor deposition, the diameter of the trapezoidal resistance region is smaller than the diameter of the bottom of the opening. Then, if the emitter metal is vapor-deposited on this resistance region, the metal may be vapor deposited not only on the trapezoidal resistance region but also on the periphery of the trapezoidal region. However, there is a problem in that it is not electrically connected to the cathode conductor through the emitter-deposited metal and the resistance region is meaningless.

(3) Since the diameter of the trapezoidal resistance region is small as described in (2), a large current cannot be taken to the resistance region, that is, the emitter, and the output of the FEC cannot be increased. There is a point. (4) Since the emitter metal is vapor-deposited on the trapezoidal low resistance layer, the emitter metal may peel off.
There is a problem that the mechanical strength of the EC cone is low.

In order to avoid the above problems, a field emission cathode has been proposed in which a resistance layer is deposited on the entire surface of a cathode conductor to form a resistance between the emitter and the cathode. The cross section of this FEC is shown in FIG. In this figure, the conductor of the cathode 52 is formed on the substrate 51 by vapor deposition or the like, and the resistance layer 53 is provided on the entire surface of the cathode 52. This resistance layer 5
An insulating layer 54 and a conductor of the gate 55 are formed on the third layer 3 by vapor deposition or the like via the insulating layer 54. further,
A cone-shaped emitter 56 is formed in the opening provided in the gate 55 and the insulating layer 54.

In the FEC formed in this way,
Since the resistance R of the resistance layer 53 is not provided just below the emitter 56 but is provided commonly to each emitter, the resistance value of each emitter depends on the film thickness distribution, and during the electron emission. When the emitter and the gate are short-circuited due to the explosion of the emitter and the gate, the current concentrates on the emitter and affects the other emitters through the common resistance layer. . Further, in the case of a graphic display or the like, there is a problem that leakage between cathode lines is impaired by the resistance layer.

FIG. 6 shows still another conventional FEC which has tried to solve the problems of the FEC shown in FIG. In the FEC in this figure, the cathode lines are formed in a grid pattern, and a resistance layer is formed on the entire surface of the grid cathode lines. Then, an emitter array including a plurality of emitters is formed on the resistance layer in the lattice frame. With this configuration, when the emitter and gate in the lattice frame are short-circuited, only the emitter in the lattice frame is adversely affected.

However, in this FEC, it is difficult to manufacture the FEC because it is necessary to accurately form a cathode line at an accurate position and to accurately align a mask for forming a hole for opening to a gate. Becomes Further, among the emitters in the lattice frame, the emission current increases from the peripheral emitters that are close to the cathode line, and conversely the emission current decreases from the central emitter, so that there is an imbalance in the emitter currents. Occurs, and the emitter current cannot be made uniform. Further, since no emitter is formed on the cathode line, and in order to make the emitter current uniform, in principle, only four or one emitter can be provided in the lattice frame. There has been a problem that the fine processing of formation is required and the areal density of the emitter is lowered.

Therefore, the present invention provides a field emission cathode in which an independent resistance region can be easily formed immediately below the emitter and the emitter can be formed with a uniform height and distance with respect to the gate. It is an object.

[0019]

In order to achieve the above object, the present invention provides a first insulating layer doped with impurities on a cathode, and an emitter and a second insulating layer are provided on the first insulating layer. The gate is formed through this.
Then, before forming the emitter, the opening provided in the gate is used as a photomask to locally anneal the first insulating layer using a laser, a lamp, or the like, so that the first insulating layer in which the emitter is formed is formed. The part of is made to be resistant.

[0020]

According to the field emission cathode of the present invention, since the resistance region can be independently provided only just under the emitter without forming the emitter by vapor deposition twice, the height of the emitter and the gate are The distance can be made uniform, and the diameter of the resistance region does not become small, so that a large output can be obtained. Further, the resistance value of the resistance region can be set to an arbitrary value by controlling the power of the laser or the like. In addition, the mechanical strength of FEC does not decrease.

[0021]

1 is a perspective view of a field emission cathode according to the present invention. In this figure, a cathode 2 is formed by vapor deposition on a substrate 1 such as glass, and a first insulating layer 3 and a second insulating layer 4 are laminated on the cathode 2. Further, a gate 5 is formed on the second insulating layer 4,
An emitter 7 is formed by vapor deposition in a hole opened in the gate 5 and the second insulating layer 4.

Further, directly below the emitter 7, a resistance region 6 is formed which is made resistant by annealing the first insulating layer 3. Since the cathode 2 is heated to a high temperature by annealing, its material does not change even when the temperature is high.
The gate 5 is formed of a refractory metal such as b, Ta or W by a sputtering method, and the gate 5 is made of Ti, Cr, Nb or M.
It is formed by a sputtering method using a metal such as o or W as a material.

Since the FEC can be manufactured by a semiconductor manufacturing technique, it can be manufactured with the interval between the emitters 7 being 10 microns or less. Therefore, the voltage V _GE of only several tens of volts is applied between the gate and the cathode.
Electrons can be emitted from the emitter 7 by applying. The electron emitted from the emitter 7 is the gate 5
If the anode 8 to which the positive voltage V _A is applied is provided separately above, it can be collected by this anode 8.

Next, the manufacturing process of the FEC shown in FIG. 1 will be described with reference to FIG.
Shown in. In FIG. 1A, a thin film conductor of a cathode 2 formed by sputtering a refractory metal material is provided on a substrate 1 such as glass.
A first insulating layer and a second insulating layer are laminated on the above.
The first insulating layer 3 has a pH of, for example, Si ₂ H ₆ as a gas species.
Low pressure CVD (LPCVD) using ₃ as a doping gas
It is formed by depositing amorphous silicon by the method. The resistance value of the first insulating layer 3 is about 10 ⁷ to
It is 10 ¹² Ωcm. The second insulating layer 4 is made of silicon dioxide (SiO ₂ ) by plasma CVD method or sputtering method using SiH ₄ and N ₂ O, N ₂ as gas species.
Is formed by forming a film of about 1 micron.

Further, the conductor of the gate 5 is formed on the second insulating layer 4. The gate 5 is made of Ti, Cr, Nb,
A metal selected from metal materials such as Mo and W is used to form a film with a thickness of about 0.4 μm by a sputtering method. A resist layer 11 is applied on the gate 5 and an opening is formed in the resist layer 11 and the gate 5 by a photolithography method or an etching method. The diameter of this opening is about 1 micron. Further, the etching of the conductor of the gate 5 is preferably a dry etching method using SF ₆ or the like.

Further etching is performed from this opening,
An opening is provided in the second insulating layer 4 as shown in FIG.
This etching is wet etching with BHF,
Alternatively, it may be performed by reactive ion etching (RIE) using a gas such as CHF ₃ .

By this selective etching, the first insulating layer having a predetermined area is exposed at the bottom of the opening. Therefore, when the gate 5 is used as a mask pattern and, for example, a laser is irradiated, the exposed portion of the first insulating layer 3 is irradiated with the laser, and the temperature of that portion is instantly raised to a high temperature. As a result, laser annealing of the exposed portion of the first insulating layer 3 is performed. As this laser, for example, a XeCl excimer laser (wavelength λ = 308 nm) can be used.

The portion 6 of the first insulating layer 3 which has been subjected to the laser annealing is made to have a resistance by being annealed, so that the portion 1 ×
A resistivity of 10 to 1 × 10 ⁶ Ωcm can be obtained. This resistivity adjustment can be performed by adjusting the laser power, and can be adjusted to an arbitrary resistance value. Further, lamp annealing may be performed instead of laser. After annealing, as shown in FIG. 3C, a peeling layer 12 made of aluminum is formed on the gate 5 by an oblique rotary evaporation method so as not to be evaporated in the opening provided in the gate 5. . An electron beam (EB) vapor deposition method can be used as the vapor deposition method used for this.

Next, as shown in FIG. 3D, the release layer 1
A metal material such as molybdenum (Mo) is positively vapor-deposited from the direction perpendicular to the substrate 1 on the substrate 1 on which the cone 2 is formed by EB vapor deposition or the like, and the cone-shaped emitter 7 is placed on the resistance region 6 in the opening. Form. Then, the substrate 1 on which the emitter 7 is formed is removed in phosphoric acid to remove the emitter material layer 13 such as Mo together with the peeling layer 12 to obtain a field emission cathode as shown in FIG.

Although amorphous silicon is used as the first insulating layer in the above description, polysilicon may be used instead. Further, as a material of impurities to be doped in the first insulating layer 3, boron (B), bismuth (Bi), gallium (Ga), indium (In), thallium (Tl), or the like is used instead of phosphorus (P). You can

It should be noted that the resistance value of the resistance region can be made uniform even by annealing performed for each substrate.
An insulating layer for monitoring is formed at the same time as the formation process of the first insulating layer in the peripheral portion of the substrate, and annealing is performed while detecting the resistance value of the insulating layer for monitoring to obtain a desired insulating value If the annealing is terminated when obtained from the above, it is possible to manufacture a field emission cathode having a resistance region having a uniform resistance value.

[0032]

Since the present invention is configured as described above, the predetermined resistance region can be accurately provided just below each emitter cone by self-alignment using the opening provided in the gate as a photomask. Therefore, it is not necessary to prepare an additional photomask. Further, compared with the conventional FEC in which the emitter is provided in the lattice frame of the cathode line, the size and position of the cathode line do not need to be so precise, the resistance region can be easily manufactured, and the lattice frame can be formed. Since it is not necessary to provide it, the density of the emitter does not decrease, and the in-plane electron uniformity is improved.

Further, since the first insulating layer is locally annealed to form the resistance region, the required predetermined resistance value can be accurately controlled by changing the power density of the laser or the like. . Therefore, it is possible to form a resistance region having excellent uniformity, reproducibility, and positional accuracy.

[Brief description of drawings]

FIG. 1 is a perspective view of a field emission cathode of the present invention.

FIG. 2 is a diagram showing a manufacturing process of the field emission cathode of the present invention.

FIG. 3 is a perspective view of a conventional field emission cathode.

FIG. 4 is a diagram showing a manufacturing process of a conventional field emission cathode.

FIG. 5 is a view showing a cross section of another conventional field emission cathode.

FIG. 6 is a view showing the arrangement of cathode lines and emitters of still another conventional field emission cathode.

[Explanation of symbols]

 1, 51, 111 Substrate 2, 52, 112 Cathode 3 First insulating layer 4 Second insulating layer 5, 55, 114 Gate 6, 117 Resistance region 7, 56, 62, 119 Emitter 8, 120 Anode 11 Resist 12, 115 Release layer 13,118 Emitter material layer 53 Resistance layer 54,113 Insulation layer 61 Cathode line 116 Resistance material layer

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Takehiro Niiyama 629 Oshiba, Mobara-shi, Chiba Futaba Electronics Co., Ltd.

Claims (4)

[Claims] 1. A cathode formed on a substrate, a first insulating layer formed on the cathode, and a gate formed on the first insulating layer via a second insulating layer. A cone-shaped emitter formed in the opening formed in the gate and the second insulating layer and on the first insulating layer; A field emission cathode, characterized in that only underneath the cone-shaped emitter of the layer is resistiveised. 2. The field emission cathode according to claim 1, wherein the second insulating layer is made of impurity-doped amorphous silicon or polysilicon. 3. The field emission cathode according to claim 1, wherein the first insulating layer is made to have resistance by irradiating a light beam such as a laser or a lamp using the gate as a photomask. 4. The resistivity of the resistance region that has been made resistance is 1 ×
4. The field emission cathode according to claim 1, wherein the field emission cathode has a density of 10 ¹ to 1 × 10 ⁶ Ωcm.