JPH07141074A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To stop the supply of a power source to an unused functional block by providing a power source control part which branches the power source supplied to a main power source terminal to branch power source lines to each functional block based on a power source distribution control signal, and a power source control register which sets the power source distribution control signal. CONSTITUTION:The power source control part 4 branches the power source supplied to the main power source terminal 21 to prescribed branch power source lines 31-38 according to the power source distribution control signal in which all bits 1 are set on the power source control register, and supplies the power source to all designated first to eighth functional blocks 11-18. In such a way, it is possible to disconnect the power source from the unused functional block for which no power source is required to supply by setting the power source distribution control signal only whose bit in accordance with the one used at that time in the functional blocks 11-18 at 1, which enables wasteful power consumption to be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit having a plurality of function blocks each having a predetermined processing function, and more particularly to supplying power to each function block.

[0002]

2. Description of the Related Art FIG. 10 is a block diagram showing a conventional semiconductor integrated circuit. In the figure, 1 is the semiconductor integrated circuit, and 11 to 18 are first to eighth functional blocks each having a predetermined processing function and incorporated in the semiconductor integrated circuit 1. In the example of FIG. 10, the first functional block 11 is the timer A, the functional block 12 of 12 is the timer B, the third functional block 13 is the IO controller, the fourth functional block 14 is the display controller, and the fifth functional block 14 is the display controller. Function block 15 is a universal asynchronous receiver and transmitter (hereinafter referred to as UART), a sixth function block 16 is a direct memory access (DMA) controller, a seventh function block 17 is an interrupt controller, and an eighth controller The function blocks 18 of FIG. 1 have the processing functions of the floppy disk controller. Further, 21 is the semiconductor integrated circuit 1
Is a main power supply terminal for receiving power supplied to the functional blocks 11 to 22.
18 is an internal power supply line.

Next, the operation will be described. When the power of the system is turned on, the main power supply terminal 2 of the semiconductor integrated circuit 1 concerned
1 is supplied with power. The first to eighth functional blocks 11 to 18, which are internal logic parts, are supplied with power from the internal power supply line 22 and execute operations for realizing predetermined functions. Power is constantly supplied to the first to eighth functional blocks 11 to 18 via the internal power supply line 22, and even if the functional blocks 11 to 18 are
The power supply will be continued even when is not used.

[0004]

Since the conventional semiconductor integrated circuit is configured as described above, it is said that each of the first to eighth functional blocks 11 to 18 does not use it. Regardless of that, power is always supplied,
There is a problem that power is wasted by the functional blocks that are not used.

The present invention has been made to solve the above problems, and provides a semiconductor integrated circuit capable of suppressing unnecessary power consumption by stopping supply of power to unused functional blocks. The purpose is to get.

[0006]

According to a first aspect of the present invention, there is provided a semiconductor integrated circuit in which a power source supplied to a main power source terminal is branched into a branch power source line to each functional block based on a power source distribution control signal. The power supply control unit is provided with a power supply control register to which a power supply distribution control signal is set.

Further, in the semiconductor integrated circuit according to the second aspect of the present invention, each branch power supply line is connected to an external terminal.

In the semiconductor integrated circuit according to the third aspect of the present invention, a timer is added to the power supply control unit to execute branching of the power supply to the branch power supply line corresponding to the power supply distribution control signal.
The timer is used for timed control.

According to a fourth aspect of the semiconductor integrated circuit of the present invention, a UART is added to the power supply control unit to execute the branching of the power supply to the branch power supply line corresponding to the power supply distribution control signal. It can be controlled by the received data.

Further, in the semiconductor integrated circuit according to the fifth aspect of the present invention, power is directly supplied to the internal register of each functional block from the main power supply terminal.

Further, in the semiconductor integrated circuit according to the invention described in claim 6, a plurality of power supply control registers are provided to set different power supply distribution control signals, and the power supply control unit has an interrupt terminal to which an interrupt signal is input. A timer for the time management is added, and one of the power supply control registers is selected according to the presence or absence of an interrupt signal for a certain period of time, and the branching of the power supply to the branch power supply line is performed by the power supply distribution control signal set there. It is what you do.

[0012]

The power supply control section in the invention according to claim 1 is
According to the power distribution control signal set in the power control register, the power supplied to the main power supply terminal is branched to the branch power line to each functional block to stop the power supply to the unused functional blocks. Then, it is possible to suppress wasteful consumption of electric power.

In the semiconductor integrated circuit according to the second aspect of the present invention, the branch power supply lines to the respective functional blocks are connected to the external terminals respectively, so that the power supply to the external semiconductor integrated circuits subordinate to the respective functional blocks is supplied. Supply also enables the same control as that of the functional block.

Further, the power supply control unit according to the third aspect of the present invention adds the timer for the timed control to execute the branching of the power supply to the branch power supply line corresponding to the power supply distribution control signal. Timed control by a timer.

Further, the power supply control unit in the invention according to claim 4 adds a UART for receiving and collating data from the outside to branch the power supply to the branch power supply line corresponding to the power supply distribution control signal. It is executed when predetermined data is received.

Further, each functional block according to the invention of claim 5 retains the contents of the internal register even when the power supply is cut off by directly receiving the power supply to the internal register from the main power supply terminal. To do.

Further, the power supply control unit in the invention described in claim 6 manages the time of the interrupt signal input to the interrupt terminal with the timer added, and plural power supply control units are prepared in accordance with the presence or absence of the interrupt signal within a fixed time. Power control register 1
Power supply to each functional block by selecting one of them and executing the branching of the power supply to the branch power supply line according to the power distribution control signal set there. It is possible to do in.

[0018]

【Example】

Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the invention described in claim 1. In the figure, 1 is a semiconductor integrated circuit, 1
Reference numerals 1 to 18 denote first to eighth functional blocks, and 21 denotes a main power supply terminal, which are the same as or equivalent to those of the conventional one denoted by the same reference numeral in FIG. Further, 31 to 38 are first to eighth functional blocks 11
It is a branch power supply line for individually supplying power to each of ~ 18. Reference numeral 4 denotes a power supply control unit that branches the power supply received at the main power supply terminal 21 into predetermined branch power supply lines 31 to 38 according to a power supply distribution control signal and distributes the power supply to the corresponding functional blocks 11 to 18. Reference numeral 5 denotes the power supply. It is a power supply control register in which a distribution control signal is set.

Next, the operation will be described. Power control unit 4
Divides the power supplied to the main power supply terminal 21 into predetermined branch power supply lines 31 to 38 according to the power supply distribution control signal set in the power supply control register 5, and distributes the power to the designated functional blocks 11 to 18. Here, FIG. 2 is an explanatory diagram showing an example of setting the power supply distribution control signal to the power supply control register 5, in which “1” corresponds to power supply to the corresponding functional block and “0” corresponds to it. No power is supplied to each functional block.

Here, when the power supply distribution control signal shown in FIG. 2A is set in the power supply control register 5, all the bits of the power supply distribution control signal are "1". The section 4 branches the power received by the main power terminal 21 into all the branch power lines 31 to 38. Therefore,
Power is supplied to all of the eighth functional blocks 11-18. When the power distribution control signal shown in FIG. 2B is set in the power control register 5, the bits associated with the first, third, fifth and seventh functional blocks are Since it is “1”, the power supply control unit 4 receives the power received by the main power supply terminal 21 from the branch power supply lines 31, 3
Branch to 3, 35 and 37. Therefore, the power supply is the first, third, fifth and seventh functional blocks 11, 13,
15 and 17, and the supply to the second, fourth, sixth and eighth functional blocks 12, 14, 16 and 18 is stopped. Further, when the power distribution control signal shown in FIG. 2A is set in the power control register 5, all the bits are “0”,
The power supply controller 4 does not branch the power received by the main power supply terminal 21 to any of the branch power supply lines 31 to 38. Therefore,
All the power supplies of the eighth functional blocks 11-18 are shut off.

In this way, the functional blocks 11-18
By setting the power distribution control signal in which only the bit corresponding to the one used at that time is set to “1” in the power control register 5, it is possible to supply the unused functional power block. It is possible to cut off the power supply of, and it is possible to suppress unnecessary power consumption.

Example 2. Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 3 is a block diagram showing an embodiment of the invention described in claim 2, wherein 61 to 68 are first to first parts.
Each of the eighth function blocks 11 to 18 is an external terminal to which each branch power supply line 31 to 38 supplying power individually is connected, and the other parts are the same as the corresponding parts of FIG. The reference numerals are given and the description thereof is omitted.

FIG. 4 is a block diagram showing an example of the configuration of a system using the semiconductor integrated circuit 1 thus constructed. In the figure, 71 is the semiconductor integrated circuit 1
Is an external power supply line connected to the external terminal 64 connected to the branch power supply line 34 supplying power to the fourth functional block 14 of FIG. Reference numeral 72 denotes a semiconductor integrated circuit A which is supplied with power from the external power supply line 71 and operates subordinate to the fourth functional block 14, and 73 is also supplied with power from the external power supply line 71. Functional block 1 of 4
4 is a semiconductor integrated circuit B that operates in a subordinate manner. Also,
Reference numeral 74 denotes an external power supply line connected to the external terminal 68 connected to the branch power supply line 38 that supplies power to the eighth functional block 18. Reference numeral 75 denotes a semiconductor integrated circuit C which is supplied with power from the external power supply line 74 and operates subordinate to the eighth functional block 18, and 76 is also supplied with power from the external power supply line 74. 8 is a semiconductor integrated circuit D that operates depending on eight functional blocks 18.

Next, the operation will be described. Here, each of the first to eighth functional blocks 11 to 1 in the semiconductor integrated circuit 1
Power is supplied to 8 in the same manner as described in the first embodiment, and the function blocks 11 to 18 that are not used at that time are stopped from being supplied with power. The branch power supply lines 31 to 38 for individually supplying power to the functional blocks 11 to 18 are connected to the corresponding external terminals 61 to 68 and led to the outside, as shown in FIG. Semiconductor integrated circuit A72 and semiconductor integrated circuit B73
From the external power supply line 71 connected to the external terminal 64,
The semiconductor integrated circuit C75 and the semiconductor integrated circuit D76 are each supplied with power from the external power supply line 74 connected to the external terminal 68.

Therefore, when the fourth functional block 14 is in the dormant state, the power supply control register 5 is set with the power distribution control signal for stopping the supply of power to the fourth functional block 14, so that The power supply to the function block 14 of No. 4 is cut off. At that time, the semiconductor integrated circuit A72 and the semiconductor integrated circuit B, which are inactive because they are operating under the control of the fourth functional block 14, are inactive.
The power supply to 73 and its supply are stopped. In addition, since the power supply distribution control signal for supplying power to the fourth function block 14 is set in the power supply control register 5 while the fourth function block 14 is operating, the fourth function block 14 Power is supplied to the semiconductor integrated circuit A72 and the semiconductor integrated circuit B73 which operate under the control of the fourth functional block 14.

The same applies to the semiconductor integrated circuit C75 and the semiconductor integrated circuit D76 which are supplied with power from the external power supply line 74 connected to the external terminal 68. That is, when the power supply distribution control signal for stopping the power supply to the eighth functional block 18 is set in the power supply control register 5, the semiconductor integrated circuit C75 and the semiconductor integrated circuit C75 are integrated together with the eighth functional block 18. The power supply to the circuit D76 is also stopped. When the power distribution control signal for supplying power to the eighth functional block 18 is set, power is also supplied to the semiconductor integrated circuit C75 and the semiconductor integrated circuit D76 together with the eighth functional block 18. It

Example 3. Next, a third embodiment of the present invention will be described with reference to the drawings. FIG. 5 is a block diagram showing an embodiment of the invention described in claim 3. Corresponding parts are designated by the same reference numerals as in FIG. 1 and their explanations are omitted. In the figure, reference numeral 41 denotes each branch power supply line 31 to 31 which is built in the power supply control unit 4 and corresponds to the power supply distribution control signal set in the power supply control register 5.
It is a timer for timely controlling the branch of the power supply to 38.

Next, the operation will be described. Here, the power supply to each of the functional blocks 11 to 18 is basically performed by the same method as that described in the first embodiment.
In the third embodiment, the power supply control unit 4 has a timer 41 built therein, and a timer is used to distribute the power supply to the branch power supply lines 31 to 38 based on the power supply distribution control signal written in the power supply control register 5. This is different from the case of the first embodiment in that it is executed after the time set in 41 has elapsed. As a result, for example, when a power distribution control signal for stopping the power supply to the third functional block 13 and the fourth functional block 14 is set in the power control register 5, the third and fourth functional blocks 13 and The power supply controller 4 shuts off the power supplied to the power supply 14 after the time set in the timer 41 has elapsed. Therefore, the third and fourth functional blocks 13 and 14 can save the contents of the internal register to an external memory or the like during that time.

Example 4. Next, a fourth embodiment of the present invention will be described with reference to the drawings. FIG. 6 is a block diagram showing an embodiment of the invention described in claim 4. Corresponding parts are designated by the same reference numerals as those in FIG. 1 and their explanations are omitted. In the figure, 42 is built in the power supply control unit 4, and when predetermined data is received, each branch power supply line 31 corresponding to the power supply distribution control signal set in the power supply control register 5 in the power supply control unit 4 ~ 3
UART to execute the branch of the power supply to 8
Reference numeral 43 is a data receiving terminal of the UART 42.

Next, the operation will be described. Here, the power supply to each of the functional blocks 11 to 18 is basically performed by the same method as that described in the first embodiment.
In the fourth embodiment, the power control unit 4 uses the UART 42.
The power supply distribution to the branch power supply lines 31 to 38 based on the power supply distribution control signal written in the power supply control register 5 is set in the compare circuit of the UART 42 at the data receiving terminal 43. This is different from the first embodiment in that it is executed when the same data as the data is received.

The semiconductor integrated circuit 1 according to the fourth embodiment is applied to, for example, a mobile phone. In this mobile phone, for example, the functions of the fifth to eighth function blocks 15 to 18 are not used while waiting for reception, and all the function blocks 11 to 18 are used during reception. Therefore, during reception standby, all the functional blocks 11 to 11 are stored in the power control register 5.
A power distribution control signal for supplying power to 18 is set. When the same data as the data set in the compare circuit of the UART 42 is received at the beginning of the telephone reception data, the power supply control unit 4 determines each branch power supply according to the contents of the power supply distribution control signal set in the power supply control register 5. Line 3
Control distribution of power to 1-38. Therefore, when the reception is started, power is supplied to all the functional blocks 11 to 18 and the communication state is established. Further, during reception, a power distribution control signal is set in the power control register 5 so that power is supplied only to the first to fourth functional blocks 11 to 14.
If the same data set in the compare circuit of the UART42 is received at the end of the telephone reception data,
The power supply controller 4 controls distribution of power to the branch power supply lines 31 to 38 according to the contents of the power supply distribution control signal set in the power supply control register 5. Therefore, the 5th
The supply of power to the eighth function blocks 15 to 18 is stopped, and the mobile phone is in the standby state for reception again.

Example 5. Next, a fifth embodiment of the present invention will be described with reference to the drawings. FIG. 7 is a block diagram showing an embodiment of the invention described in claim 5. Corresponding parts are designated by the same reference numerals as those in FIG. 1 and their explanations are omitted. In the figure, 81 to 8
Reference numeral 8 is an internal register incorporated in each of the first to eighth functional blocks 11 to 18, and 23 is a main power source terminal 2 for supplying power to the internal registers 81 to 88 of each of the functional blocks 11 to 18. It is a power supply line for direct supply from. A floppy disk drive 91 is connected to the eighth functional block 18 functioning as a floppy disk controller.

Next, the operation will be described. Here, the power supply to each of the functional blocks 11 to 18 is basically performed by the same method as that described in the first embodiment.
The semiconductor integrated circuit 1 according to the fifth embodiment is applied to, for example, a portable personal computer. In a portable personal computer, when writing data to the floppy disk drive 91 or reading data from the floppy disk drive 91, a seventh function block 17 that functions as an interrupt controller and an eighth function that functions as a floppy disk controller. Only block 18 is used. In such a case, the power supply control register 5 supplies power only to the seventh and eighth functional blocks 17 and 18, and stops power supply to the other functional blocks 11 to 16. Set the signal. When the power distribution by such a power distribution control signal is executed, the first to sixth functional blocks 11 to 16 are cut off from the power supply and stop operating. 81-
Power is directly supplied to 86 from the main power supply terminal 21 through the power supply line 23, so that the state at that time is maintained without being lost.

Example 6. Next, a sixth embodiment of the present invention will be described with reference to the drawings. FIG. 8 is a block diagram showing an embodiment of the invention described in claim 6. Corresponding parts are designated by the same reference numerals as those in FIG. 1 and their explanations are omitted. In the figure, 51,5
Reference numerals 2 are first and second power supply control registers to which power supply distribution control signals used when the power supply control unit 4 executes branching of the power supply to the branch power supply lines 31 to 38 are set.
Reference numeral 92 is a display device such as a CRT display connected to the fourth function block 14 functioning as a display controller, and 93 is connected to the seventh function block 17 functioning as an interrupt controller to generate an interrupt. The keyboard is used for inputting signals.

Reference numeral 44 denotes the seventh functional block 17
Is an interrupt terminal of the power supply control unit 4 to which an interrupt signal from is input, and 45 is built in the power supply control unit 4 and is used by the power supply control unit 4 to perform time management of the interrupt signal input to the interrupt terminal 44. It is a timer. That is, the power supply control unit 4 selects one of the first and second power supply control registers 51 and 52 according to the presence or absence of an interrupt signal for a fixed time, and sets the selected power supply control register 51 or 52. The branching of the power source to each branch power source line 31 to 38 is controlled according to the power source distribution control signal.

Here, FIG. 9 shows the first power supply control register 5
2A is an explanatory diagram showing an example of a power supply distribution control signal set in the first and second power supply control registers 52, and FIG.
(B) of the power supply control register 51 is an example of the setting contents of the second power supply control register 52. As in the case of FIG. 2, “1” in the figure indicates power supply to the corresponding functional block, and “0” indicates no power supply to the corresponding functional block.

Next, the operation will be described. Here, the power supplies to the functional blocks 11 to 18 of the semiconductor integrated circuit 1 are
Power is supplied by the branch power supply lines 31 to 38 branched by the power supply control unit 4. In addition, the power supply control unit 4 includes the first power supply control register 51 or the second power supply control register 5
One of the two branch power lines 31 to 31 is selected from the main power terminal 21 based on the power distribution control signal set therein.
It controls the branch to 38. The selection of the first and second power supply control registers 51 and 52 is performed by time management by a built-in timer 45.

For example, in a portable personal computer or the like, the power supply control unit 4 sends an interrupt signal by operating the keyboard 93 to the interrupt terminal 44 during the time set in the timer 45 via the seventh functional block 17. If not input, the first power supply control register 51 is selected. Then, based on the power supply distribution control signal shown in FIG. 9A set therein, each branch power supply line 31
Perform power distribution to ~ 38. That is, the fourth functional block 1 functioning as a display controller
Power is supplied to each of the functional blocks 11 to 13 and 15 to 18 except for 4. As a result, the fourth functional block 1
No. 4 stops its operation and nothing is displayed on the screen of the display device 92. On the other hand, from the keyboard 93 to the 7th
When an interrupt signal is input to the interrupt terminal 44 through the function block 17 of No. 3, the power supply controller 4 selects the second power supply control register 52. Therefore, the power is supplied to all the functional blocks 11 to 18 by distributing the power to the branch power supply lines 31 to 38 based on the power supply distribution control signal set in FIG. 9B. Is done.
As a result, the fourth functional block 14 operates and a predetermined display is performed on the screen of the display device 92.

[0039]

As described above, according to the first aspect of the present invention, the power supplied to the main power supply terminal is supplied to a predetermined functional block according to the power supply distribution control signal set in the power supply control register. Since it is configured to branch to the branch power supply line, it is possible to cut off the power supply to the functional blocks that are not used, and it is possible to prevent wasteful consumption of power inside the semiconductor integrated circuit. .

Further, according to the invention described in claim 2, since the branch power supply lines to the respective functional blocks are connected to the external terminals, respectively, the semiconductor integrated circuit operating dependently on the respective functional blocks can be realized. By receiving the power supply from the corresponding external terminal, it is possible to prevent wasteful power consumption of the system.

According to the third aspect of the present invention, a timer is added to the power supply control unit, and the execution of branching of the power supply to the branch power supply line corresponding to the power supply distribution control signal is controlled by the timer. Since it is configured so that there is a margin for the time set in the timer before the power is cut off,
In the meantime, it is possible to save necessary data in an external memory or the like.

Further, according to the invention described in claim 4, a UART for receiving and collating data from the outside is added to the power supply control unit, and the branching of the power supply to the branch power supply line corresponding to the power supply distribution control signal is executed. Is configured to be controlled by receiving predetermined data, it is possible to distribute power to different functional blocks between different modes such as a mobile phone receiving standby and receiving. There is an effect.

Further, according to the invention described in claim 5, since the power is supplied directly from the main power supply terminal to the internal register of each function block, the function in which the power supply is cut off by the power supply controller Even in a block, the content of the internal register can be held securely.

According to the invention described in claim 6, the timer manages the interrupt signal input to the interrupt terminal for a limited period of time, and a plurality of power control registers are prepared depending on the presence or absence of the interrupt signal within a fixed time. Since one is selected and the power supply is branched to the branch power supply line according to the power distribution control signal set therein, the power supply to each functional block depends on the interrupt status. Therefore, there is an effect that it can be performed with different supply patterns.

[Brief description of drawings]

FIG. 1 is a block diagram showing a semiconductor integrated circuit according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram showing a setting example of a power supply control register in the above embodiment.

FIG. 3 is a block diagram showing a semiconductor integrated circuit according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration example of a system using the semiconductor integrated circuit according to the above embodiment.

FIG. 5 is a block diagram showing a semiconductor integrated circuit according to a third embodiment of the present invention.

FIG. 6 is a block diagram showing a semiconductor integrated circuit according to a fourth embodiment of the present invention.

FIG. 7 is a block diagram showing a semiconductor integrated circuit according to a fifth embodiment of the present invention.

FIG. 8 is a block diagram showing a semiconductor integrated circuit according to a sixth embodiment of the present invention.

FIG. 9 is an explanatory diagram showing a setting example of each power supply control register in the above embodiment.

FIG. 10 is a block diagram showing a conventional semiconductor integrated circuit.

[Explanation of symbols]

 1 Semiconductor Integrated Circuit 11-18 Functional Block 21 Main Power Supply Terminal 31-38 Branch Power Supply Line 4 Power Supply Control Section 41 Timer 42 UART 44 Interrupt Terminal 45 Timer 5 Power Supply Control Register 51, 52 Power Supply Control Register 61-68 External Terminal 81-88 Internal register

Claims (6)

[Claims] 1. A plurality of function blocks each having a predetermined processing function, a branch power supply line for individually supplying power to each of the function blocks, and a power supply to each of the function blocks collectively. A main power supply terminal for receiving, a power supply control unit for branching the power supply received at the main power supply terminal to the predetermined branch power supply line according to a power supply distribution control signal, and distributing to the corresponding functional block, and the power supply distribution control signal A semiconductor integrated circuit having a power control register to be set. 2. The semiconductor integrated circuit according to claim 1, wherein each of the branch power supply lines is connected to an external terminal. 3. The power supply control unit includes a timer for timely controlling execution of branching of a power supply to the branch power supply line corresponding to a power supply distribution control signal set in the power supply control register. The semiconductor integrated circuit according to claim 1, wherein: 4. The power control unit includes a universal asynchronous receiver and transmitter, and when the universal asynchronous receiver and transmitter receives predetermined data,
2. The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit has a function of branching a power source to the branch power source line in accordance with a power source distribution control signal set in the power source control register. 5. The semiconductor integrated circuit according to claim 1, wherein in each of the functional blocks, power is directly supplied to each internal register from the main power supply terminal. 6. An interrupt terminal comprising a plurality of power supply control registers, each of which sets a different power supply distribution control signal, wherein the power supply control section receives an interrupt signal from the functional block, and the interrupt terminal. A timer for managing a time limit of an interrupt signal input to the power supply control register, and selects one of the power supply control registers according to the presence or absence of the interrupt signal for a certain period of time. 2. The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit has a function of branching a power supply to the branch power supply line according to a set power supply distribution control signal.