JPH07135319A - Thin film transistor and its fabrication - Google Patents

Abstract

PURPOSE:To prevent the characteristics from deteriorating while increasing the film deposition rate by constituting an active layer, i.e., an amorphous silicon layer, of a film deposited at low rate and a film deposited at high rate. CONSTITUTION:A Cr electrode is formed entirely on the surface of a glass substrate 1 and then a gate electrode is formed by wet etching. SiH4 and NH3 are fed into a plasma CVD chamber where silicon nitride 3 is deposited at high rate and then a vacuum state is sustained. Subsequently, the substrate 1 is transferred into another plasma CVD chamber into which SiH4 and H2 are fed in order to deposit first and second layers 9, 4 at low rate. The substrate 1 is further transferred into another plasma CVD chamber into which SiH4 and H2 are fed along with a doping gas of PH3 thus depositing an a-Si(n<+>) 5. This structure improve the interface characteristics with respect to the gate insulating film and prevents the characteristics from deteriorating while increasing the film deposition rate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor having amorphous silicon (a-Si) as an active layer and a method for manufacturing the same.

[0002]

2. Description of the Related Art FIG. 6 shows a conventional thin film transistor (TFT: Thin Film) using amorphous silicon.
Transistor) structure is shown. The thin film transistor is manufactured as follows.

First, a refractory metal is formed on the entire surface of the glass substrate 1.
For example, after forming chromium Cr into a film thickness of 1000 to 2000 angstrom by vacuum vapor deposition or sputter vapor deposition, the gate electrode 2 is patterned using a photomask. Next, an insulating film, for example, a silicon nitride (SiN) film 3 is formed on the entire surface of the glass substrate 1 by plasma CVD (Chemi).
A film thickness of 3000 to 4000 angstrom is formed by cal vapor deposition. Amorphous silicon (a-
A Si: amorphous silicon) film 4 is formed by plasma CVD to a film thickness of 1000 to 2000 angstroms, and then phosphine (PH ₃ ) is continuously formed.
Are mixed in to form an a-Si (n ⁺ ) film 5 having a film thickness of 300 to
1000 angstrom film is formed.

Further, patterning with a photomask is carried out a
After wet-etching or dry-etching the -Si (n ⁺ ) film 5 and the a-Si film 4, for example, aluminum Al having a film thickness of 20 is used as a source and drain electrode film.
A film is formed by vacuum deposition or sputter deposition to a thickness of 00 to 4000 angstrom. After film formation, patterning is performed by wet etching or dry etching to form the source electrode 6 and the drain electrode 7. Finally, a passivation film (SiN or SiO ₂ ) 8 is formed to manufacture a thin film transistor.

Here, the manufacturing process of the thin film transistor in the channel etching method of the reverse stagger structure has been described, but in addition to this, there is a positive stagger structure, and in the process method there is an etching stopper system.

Further, plasma CVD is used for film formation of a-Si and SiN, but at present, a batch type of charging a large number of substrates is the mainstream. However, recently, single-wafer CVD apparatuses have been attracting attention because of the generation of dust, the time required for maintenance, the low yield, and the like.

[0007]

In the conventional thin film transistor structure, the film forming speed is slow (for example, 60% for a-Si).
˜100 angstrom / min), it is difficult to achieve high film formation throughput because the film formation time is long. Therefore, it is difficult to reduce the cost of the liquid crystal panel using the thin film transistor.

In order to realize high-speed film formation by plasma CVD, it is conceivable to increase the discharge power, increase the concentration of the reaction gas, and shorten the discharge interval. However, in the case of film formation by plasma CVD, by changing the above conditions, the composition ratio in the film, the denseness, etc. change, which greatly affects the thin film transistor characteristics. Therefore, simply increasing the film formation rate deteriorates the thin film transistor characteristics. For example, FIG. 7 (conventional diagram) shows a field effect mobility (mobility) of a thin film transistor formed by high-speed deposition of a-Si.
Shows the change of. From this, it is clear that high speed deposition of the a-Si film deteriorates the thin film transistor characteristics. Therefore, even if the film forming rate can be increased by improving the film forming apparatus, there is a problem that the thin film transistor characteristics are significantly deteriorated.

The present invention is intended to provide a thin film transistor which does not deteriorate the thin film transistor characteristics even in a thin film transistor manufactured by high-speed film formation, and a manufacturing method thereof.

[0010]

SUMMARY OF THE INVENTION The present invention relates to a thin film transistor in which an amorphous silicon layer which is an active layer includes a low speed generation film and a high speed generation film.

[0011]

[Function] By forming the amorphous silicon layer in contact with the gate insulating film with a multi-layer structure of a low-speed generation film and a high-speed generation film, the interface characteristics with the gate insulation film are improved, and the film formation speed is increased and the thin film transistor characteristics are deteriorated. To prevent.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

First, an insulating film (for example, SiN), a-
As described above, the thin film transistor characteristics are deteriorated in the high-speed film formation of the Si film. The present inventor causes the thin film transistor characteristics to be deteriorated in the high-speed film formation due to the interface between the SiN film and the a-Si film. Focusing on this, the following thin film transistor is proposed.

That is, a low-speed a-Si film is formed thinly on a high-speed SiN film, and then a high-speed a-Si film is continuously formed, followed by ohmic contact. By forming an a-Si (n ⁺ ) film for removing, a reverse stagger type channel-etch type thin film transistor is manufactured. By adopting such a structure, it is possible to prevent deterioration at the interface (SiN / a-Si) which is important for thin film transistor characteristics, and thus it is possible to prevent deterioration of thin film transistor characteristics (especially field effect mobility mobility). .

Further, in order to maintain the thin film transistor characteristics, it suffices to sandwich a thin a-Si film layer, and high-speed film formation of both the SiN film and the a-Si film becomes possible.

A thin film transistor according to this embodiment will be described with reference to FIG.

In FIG. 1, the same parts as those shown in FIG. 6 are designated by the same reference numerals.

After a Cr electrode having a film thickness of 1,000 angstrom is formed on the entire surface of the glass substrate 1 by sputtering, patterning is performed with a photoresist, and a gate electrode 2 is formed by wet etching. Plasma CVD
SiH ₄ and NH ₃ are supplied to the chamber to form a silicon nitride film 3 at a substrate temperature of 350 ° C. at a high film forming speed of 900 angstrom / min and a film thickness of 4,000 angstrom, and then maintain a vacuum state for another film. The substrate is transferred to the plasma CVD chamber. After the transfer, SiH ₄ and H ₂ are supplied, the substrate temperature is 250 ° C., and the low film formation rate is 80 Å / min.
To form a film having a thickness of 80 angstroms (first layer 9) at a film forming rate of 80 to 430 angstroms / min (second layer 4).

Further maintaining the vacuum state, another plasma C
After the substrate is transferred to the VD chamber, SiH ₄ and H ₂ are supplied by using PH ₃ as a doping gas to form a-Si (n ⁺ ) 5 having a film thickness of 500 Å at the substrate temperature of 250 ° C. Next, an Al film having a film thickness of 4,000 angstroms is formed on the entire surface by vacuum vapor deposition, and after applying a photoresist, patterning is performed to form a source electrode 6 and a drain electrode 7.

In this embodiment, as shown in FIG. 2, a-Si
The mobility does not decrease with the increase of the film formation speed of
Its mobility is also 1.1 cm ² / V · s, which is a good result. The mobility was as high as 0.9 even when the a-Si film forming rate of the first layer was 200 angstrom / min.
When the film formation speed reaches 300 angstrom / min,
It was significantly reduced to 0.5. That is, the deposition rate between SiN and a-Si is 80 to 200 angstrom / min.
By sandwiching the a-Si film having a low film forming speed of
Also, even in high-speed film formation of a-Si, there is no deterioration of thin film transistor characteristics as in the conventional case.

This means that the thin film transistor characteristic is Si.
It shows that the interface characteristics between N and a-Si are important. Figure 3 shows low-speed film formation (80 Å / min) and high-speed film formation (430 Å / min) on SiN.
) S is the profile of interfacial nitrogen atoms when the films are stacked.
IMS (Secondary Ion Mass Sp)
shows the results of analysis by
The profile of nitrogen atoms at the interface between SiN and a-Si exceeds 50 angstroms in the high-speed film formation, whereas it is 50 angstroms or less in the low-speed film formation. This proves that the interfacial properties are improved by the polymerization with.

Next, another embodiment will be described.

In order to perform low-speed film formation when forming the first and second layered a-Si films, it is possible to control the film formation rate by changing the reaction gas concentration and the interval between electrodes. However, in the former case, it takes time to stabilize the flow rate, and in the latter case, it takes time to set the desired interval. Therefore, the low-speed film formation and the high-speed film formation are performed by changing the discharge power that is the most controllable.

In the same manner as in Example 1, after high-speed SiN film formation, SiH ₄ and H ₂ were supplied so that the film formation rate was 80 Å / min and the discharge power was 20 W, and the a-Si of the first layer was formed. Form a film. Next, a second-layer a-Si film is formed at a discharge power of 350 W so that the film formation rate is 430 Å / min. Total film thickness of a-Si 2,
After forming a 000 angstrom film, a thin film transistor is manufactured by the same steps as in Example 1. Also in this embodiment, the mobility of the thin film transistor is 0.9 to
A value as high as 1.2 was obtained.

FIG. 4 is a block diagram of a semiconductor manufacturing apparatus for manufacturing this thin film transistor.

In the figure, 11 is a cassette stand for accommodating glass substrates, 12 is a first atmospheric transfer robot operating in the atmosphere, 13 is a load lock chamber, 14 is a substrate preheating chamber,
Reference numeral 15 is a first vacuum transfer robot operating in vacuum, 16 is a first plasma CVD chamber, 17 is a second vacuum transfer robot operating in vacuum, 18 is a second plasma CVD chamber, 19 is a third vacuum transfer robot, 20 is the third plasma CVD chamber,
21 is an unload lock chamber, 22 is a second atmospheric transfer robot that operates in the atmosphere, 23 is a cassette stand, 24,
25, 26, 27, 28, 29, 30, 31, 32, 3
Reference numeral 3 is a gate valve that hermetically connects the units.

A glass substrate on which the gate electrode 2 is formed is loaded in the cassette stand 11 as in the above embodiment. The glass substrate is taken out of the cassette stand 11 by the first atmospheric transfer robot 12 and loaded into the load lock chamber 13 via the gate valve 24. After loading the glass substrate, the load lock chamber 13 is evacuated.

Next, the first vacuum transfer robot 15 transfers the glass substrate from the load lock chamber 13 to the substrate preheating chamber 14 via the gate valves 25 and 26. In the substrate preheating chamber 14, there are 3 glass substrates.
The glass substrate preheated to about 50 ° C. and further heated is transferred to the first plasma CVD chamber 16 by the first vacuum transfer robot 15 via the gate valve 27.

Plasma is generated in the first plasma CVD chamber 16, and SiH ₄ and NH ₃ are supplied. The silicon nitride film 3 is formed in a thickness of 4,000 angstroms under the conditions of a glass substrate temperature of 350 ° C. and a high-speed film formation rate of 900 angstrom / min. Further, the glass substrate is transferred from the first plasma CVD chamber 16 to the second plasma CVD chamber 18 via the gate valve 29 while the vacuum state is maintained by the second vacuum transfer robot 17.

SiH ₄ and H ₂ are supplied while plasma is being generated in the second plasma CVD chamber 18, and the glass substrate temperature 25
A first layer 9 having a predetermined film thickness is formed under the conditions of 0 ° C. and a low film forming speed of 80 Å / min, and further, a second layer 4 is formed at a film forming speed of 430 Å / min.
The total a-Si film thickness of the first layer 9 and the second layer 4 is 2,000.
Try to be Angstrom.

After forming the a-Si film, a vacuum state is maintained, and the glass substrate is moved by the third vacuum transfer robot 19 through the gate valves 30 and 32 to the third plasma CVD chamber 2.
Transport to 0. In the third plasma CVD chamber 20, under plasma generation, PH ₃ is used as a doping gas, and SH ₄ and H ₂ are supplied to form an a-Si (n ⁺ ) film 5 having a film thickness of 500 Å at a glass substrate temperature of 250 ° C. To generate.

When the film formation is completed, the glass substrate is transferred from the third plasma CVD chamber 20 to the unload lock chamber 21 by the third vacuum transfer robot 19 via the gate valves 32 and 31, and further via the gate valve 33. And is carried out to the cassette stand 23 by the second atmospheric transfer robot 22.

The glass substrate was further vacuum-deposited with Al.
A film having a film thickness of 4,000 is formed, and after applying a photoresist, patterning is performed to form a source electrode 6 and a drain electrode 7.

This apparatus enables high-speed film formation of a silicon nitride film and an amorphous silicon film, and can manufacture a thin film transistor having a thin low-speed film formed at the interface.

Next, the film thickness of the low-speed generation film (first layer) 9 (deposition rate 80 Å / min) is 0, 20,
Thin film transistor characteristics at 40, 80, 150 and 300 angstroms (field effect mobility)
Is shown in FIG. As shown in FIG. 5, the film thickness of the low-speed generation film is 5
When it is 0 angstrom or more, a high value of 0.7 or more is obtained for the field effect mobility.

In the above-mentioned embodiment, the channel etch type having the inverted stagger structure is described, but it goes without saying that the invention can also be applied to the positive stagger structure and the etching stopper type. Needless to say, the same effect can be obtained by using a multiple structure other than the double structure.

[0037]

As described above, according to the present invention, the film formation time can be shortened without deteriorating the thin film transistor characteristics (for example, the film thickness of the a-Si film of the first layer is 80 angstrom / min. Angstrom, second layer a
-If the film thickness of the Si film is 1,920 angstrom at the film forming speed of 430 angstrom / min,
-Si film 2,000 angstrom with low film formation rate 8
1/6 of the film formation time required at 0 angstrom / min
It becomes possible and the film forming throughput is remarkably improved. Thus, high throughput of film formation and improvement of yield can be achieved, which greatly contributes to reduction of product prices of various products using thin film transistors, for example, liquid crystal display panels.

[Brief description of drawings]

FIG. 1 is a structural diagram of a thin film transistor according to an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a film forming rate and field effect mobility mobility in the present invention.

FIG. 3 is a profile of nitrogen atoms at an interface between a low speed generation film and a high speed generation film.

FIG. 4 is a configuration diagram showing an example of a semiconductor manufacturing apparatus for manufacturing the thin film transistor according to the present embodiment.

FIG. 5 is a diagram showing a relationship between an amorphous silicon film thickness and field effect mobility mobility.

FIG. 6 is a structural diagram showing a conventional thin film transistor.

FIG. 7 is a diagram showing a relationship between a film formation rate and a field effect mobility mobility in a conventional thin film transistor.

[Explanation of symbols]

1 glass substrate 2 gate electrode 3 silicon nitride film 4 amorphous silicon film 5 amorphous silicon film (n ⁺ ) 6 source electrode 7 drain electrode 8 passivation film 9 first layer film (amorphous silicon film)

Front page continued (72) Inventor Juichi Horii 3300 Hayano, Mobara-shi, Chiba Hitachi, Ltd. (72) Inventor Fumio Muramatsu 2-3-3 Toranomon, Minato-ku, Tokyo Kokusai Electric Co., Ltd. (72) Inventor Tomohiko Takeda 2-13-13 Toranomon, Minato-ku, Tokyo International Electric Co., Ltd. (72) Inventor Kenji Kameda 2-3-13 Toranomon, Minato-ku, Tokyo International Electric Co., Ltd.

Claims (7)

[Claims] 1. A thin film transistor, wherein an amorphous silicon layer which is an active layer includes a low speed generation film and a high speed generation film. 2. An amorphous silicon layer, which is an active layer in contact with a gate insulating film, has a structure in which a low-rate generation film with a film formation rate of 200 Å / min or less is superposed with a high-speed generation film with a film formation rate of 200 Å / min or more. The thin film transistor according to claim 1. 3. The thin film transistor according to claim 1, wherein the low-speed generation film thickness is 50 angstroms or more. 4. The thin film transistor according to claim 1, wherein a profile of nitrogen atoms at an interface between the gate insulating film and amorphous silicon has a boundary region of 50 angstroms or less. 5. In a thin film transistor in which an amorphous silicon layer, which is an active layer in contact with a gate insulating film, includes a low speed generation film and a high speed generation film, the low speed formation and the high speed formation of the amorphous silicon after the high speed formation of the gate insulation film. 2. The method of manufacturing a thin film transistor according to claim 1, wherein the vacuum state is continued in a film forming chamber separate from the gate insulating film formation. 6. In a thin film transistor in which an amorphous silicon layer, which is an active layer in contact with a gate insulating film, includes a low-speed generation film and a high-speed generation film, low-speed film formation and high-speed film formation of amorphous silicon are applied in the same film formation chamber. A method of manufacturing a thin film transistor, characterized in that continuous film formation is performed by changing the above. 7. In a thin film transistor in which an amorphous silicon layer, which is an active layer in contact with a gate insulating film, includes a low-speed generation film and a high-speed generation film, a gate insulation film and an amorphous silicon layer are formed at a low speed and a high speed. A method of manufacturing a thin film transistor, characterized in that a film of amorphous silicon a-Si (n ⁺ ) is formed in an independent film forming chamber while maintaining a vacuum state.