JPH07134952A - Built-in element of electron tube and manufacture of element thereof - Google Patents

Built-in element of electron tube and manufacture of element thereof

Info

Publication number
JPH07134952A
JPH07134952A JP27815393A JP27815393A JPH07134952A JP H07134952 A JPH07134952 A JP H07134952A JP 27815393 A JP27815393 A JP 27815393A JP 27815393 A JP27815393 A JP 27815393A JP H07134952 A JPH07134952 A JP H07134952A
Authority
JP
Japan
Prior art keywords
layer
insulating substrate
built
metal oxide
coating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27815393A
Other languages
Japanese (ja)
Inventor
Yoshinori Hayakawa
義則 早川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Development and Engineering Corp
Original Assignee
Toshiba Corp
Toshiba Electronic Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Electronic Engineering Co Ltd filed Critical Toshiba Corp
Priority to JP27815393A priority Critical patent/JPH07134952A/en
Publication of JPH07134952A publication Critical patent/JPH07134952A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To suppress discharge due to secondary electrons and improve manufacturing efficiency and prevent the convergence of an electric field by covering an exposed face of an insulating substrate and a metal terminal with a metal oxide coating having a small secondary electron emitting ratio. CONSTITUTION:A resistor layer 12 is formed as an electric circuit part on an insulating substrate 11. A conductor layer 13 electrically integrated with the resistor layer 12 is formed for joining and a plate-like metal terminal 16 is so caulked to the substrate 11 as to be connected electrically to the conductive layer 13. An insulation coating layer 14 is also formed on both sides of the substrate 11, so that the resistor layer 12 is covered. Further, a metal oxide coating 18 consisting of, for example, a mixture of silica methoxide and aluminum isopropoxide is so formed as to cover ceramic exposed faces of the side faces of the substrate 11 and the insulation coating layer 14. The coating 18 is formed uniformly at once on the whole part of a resistor element by sol-gel reaction and dehydration and condensation reaction of organometallic compounds without leaving any uncoated parts.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、例えばカラーブラウ
ン管等に使用して好適な電子管の内蔵素子及びその製造
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron tube built-in element suitable for use in, for example, a color cathode ray tube and a manufacturing method thereof.

【0002】[0002]

【従来の技術】従来、電子管例えばカラ−テレビジョン
受像機に用いられるカラ−ブラウン管は、図2及び図3
に示すように構成され、図2は全体を示し、図3は電子
銃付近を示している。即ち、ガラス製真空外囲器21の
パネル内面に、蛍光面22が形成されている。一方、ネ
ック23の内部には電子ビ−ムを放出する電子銃24が
配設され、コ−ン部に装着された偏向ヨ−ク28により
電子ビ−ムを偏向走査して、蛍光面22に所望の画像を
表示している。電子銃24は、電子ビ−ムを発生する陰
極と、低電圧が印加され陰極からの電子ビ−ムの発生を
抑制する電極と、陰極から放出された電子ビ−ムを集束
し加速する電極などからなる複数の電極が、蛍光面22
方向に順次所定間隔で配設されている。
2. Description of the Related Art Conventionally, an electron tube, for example, a color cathode ray tube used in a color television receiver is shown in FIGS.
2 shows the whole, and FIG. 3 shows the vicinity of the electron gun. That is, the fluorescent surface 22 is formed on the inner surface of the panel of the glass vacuum envelope 21. On the other hand, an electron gun 24 which emits an electron beam is arranged inside the neck 23, and the electron beam is deflected and scanned by a deflection yoke 28 attached to the cone portion to obtain a fluorescent screen 22. The desired image is displayed on. The electron gun 24 includes a cathode that generates an electron beam, an electrode that applies a low voltage to suppress the generation of the electron beam from the cathode, and an electrode that focuses and accelerates the electron beam emitted from the cathode. A plurality of electrodes composed of
Are arranged at predetermined intervals in the direction.

【0003】一般に、電子ビ−ムを加速する電極には、
真空外囲器21のコ−ン部に設けられた高電圧供給ボタ
ン(陽極ボタン)25から内部導電膜26を介して高圧
の陽極電圧が印加されている。特にカラ−ブラウン管で
は、20〜35KV程度の高電圧が印加される。更に、
図3から明らかなように、ネック23内の電子銃24に
は内蔵素子例えば抵抗素子29が設けられているが、こ
の抵抗素子29は電圧分圧素子である。電子銃24に
は、電子ビ−ムの集束度を向上させるために、陽極電圧
以外にコンバ−ジェンス電極やフォ−カス電極等に高電
圧を供給する必要のあるものがある。このような場合、
カラ−ブラウン管のステム部27から高電圧を供給する
と、耐電圧の面から問題が生じるので、抵抗素子29に
より陽極電圧を分圧し、コンバ−ジェンス電極やフォ−
カス電極等に所定の高電圧を供給している。
Generally, an electrode for accelerating an electron beam is
A high-voltage anode voltage is applied from a high-voltage supply button (anode button) 25 provided in the cone portion of the vacuum envelope 21 through the internal conductive film 26. Particularly in a color cathode ray tube, a high voltage of about 20 to 35 KV is applied. Furthermore,
As is clear from FIG. 3, the electron gun 24 in the neck 23 is provided with a built-in element such as a resistance element 29, which is a voltage dividing element. In some electron guns 24, it is necessary to supply a high voltage to the convergence electrode, the focus electrode, etc. in addition to the anode voltage in order to improve the focusing degree of the electron beam. In such cases,
When a high voltage is supplied from the stem portion 27 of the color cathode ray tube, a problem occurs in terms of withstand voltage. Therefore, the anode voltage is divided by the resistance element 29, and the convergence electrode and the convergence electrode are divided.
A predetermined high voltage is supplied to the dust electrode and the like.

【0004】このようなカラ−ブラウン管に内蔵される
抵抗素子29は、従来、例えば図4の(a)、(b)、
(c)に示すように構成され、(a)は外表部を形成す
る絶縁被覆層上から透視した状態を示す平面図、(b)
は(a)のB−B′線に沿って切断し矢印方向に見た断
面図、(c)は(b)の要部を拡大して示す断面図であ
る。
A resistance element 29 built in such a color cathode ray tube has been conventionally used, for example, as shown in FIGS.
FIG. 2B is a plan view showing a state of being configured as shown in FIG. 3C, in which FIG. 3A is seen through from the insulating coating layer forming the outer surface portion.
6A is a cross-sectional view taken along line BB ′ of FIG. 7A and seen in the direction of the arrow, and FIG. 7C is a cross-sectional view showing an enlarged main part of FIG.

【0005】即ち、酸化アルミニウムを主成分とするセ
ラミックス製の絶縁基板31上には、所定のシ−ト抵抗
値を有するルテニウム酸鉛を含む金属酸化物と硼硅酸鉛
系のガラスよりなる抵抗材料をジグザグパタ−ンに印
刷,乾燥,焼成した抵抗層33が形成され、この抵抗層
33と電気的に一体の接合用導体層32と、この接合用
導体層32に接合するように絶縁基板31にかしめられ
た金属端子36とが設けられている。更に、抵抗層33
を覆うように絶縁被覆層34が形成され、絶縁基板31
の側面のセラミックス露出面などに絶縁被覆ガラス35
が形成されている。 このような抵抗素子29の製造工
程では、絶縁被覆層34を形成する工程までを複数の分
割用溝を有する単一絶縁基板上に複数組実施し、その
後、分割用溝に沿って複数組の抵抗素子29に分割して
いる。そのため、分割後、絶縁基板31の側面にはセラ
ミックスの部分が露出する。又、金属端子36をかしめ
により接合する際、ガラスの欠けを防止するため、絶縁
基板31の裏面のスル−ホ−ル部37周辺もセラミック
スの部分が露出している。更に、かしめた金属端子36
が絶縁基板31の裏面側に露出している。
That is, on a ceramic insulating substrate 31 whose main component is aluminum oxide, a resistor made of lead ruthenate oxide having a predetermined sheet resistance and lead borosilicate glass is used. A resistance layer 33 is formed by printing the material in a zigzag pattern, drying and firing, and a bonding conductor layer 32 electrically integrated with the resistance layer 33 and an insulating substrate 31 so as to be bonded to the bonding conductor layer 32. And a metal terminal 36 crimped thereto. Further, the resistance layer 33
An insulating coating layer 34 is formed so as to cover the insulating substrate 31.
Insulation-coated glass 35
Are formed. In the manufacturing process of such a resistance element 29, a plurality of sets up to the step of forming the insulating coating layer 34 are carried out on a single insulating substrate having a plurality of dividing grooves, and then a plurality of sets are formed along the dividing grooves. It is divided into resistance elements 29. Therefore, after the division, the ceramic portion is exposed on the side surface of the insulating substrate 31. In addition, when the metal terminals 36 are joined by caulking, the ceramic portion is exposed around the through-hole portion 37 on the back surface of the insulating substrate 31 in order to prevent the glass from chipping. Furthermore, the crimped metal terminal 36
Are exposed on the back surface side of the insulating substrate 31.

【0006】一般に、抵抗素子29はカラ−ブラウン管
に内蔵した際、抵抗素子29の裏面側がネック内壁と対
向している。従って、陰極より発生し正規の軌道を外れ
た電子が抵抗素子29に衝突するが、その際、抵抗素子
29から2次電子が放出される。この時、2次電子放出
比の小さいガラス系材料では、2次電子の放出量が僅か
で大きな問題とはならない。しかし、2次電子放出比の
大きなセラミックスの露出部では2次電子放出量が大き
く、放電を誘発する。これにより、カラ−ブラウン管の
ネック内壁と抵抗素子29との間で、連続的に不要な放
電が発生する。又、金属端子36が露出していると、そ
こに電子銃24の高電圧電極部からの放電が単発的に発
生する。
Generally, when the resistance element 29 is built in a color cathode ray tube, the back surface side of the resistance element 29 faces the inner wall of the neck. Therefore, the electrons generated from the cathode and deviating from the regular orbit collide with the resistance element 29, and at that time, secondary electrons are emitted from the resistance element 29. At this time, in a glass-based material having a small secondary electron emission ratio, the amount of secondary electron emission is small, which is not a big problem. However, in the exposed portion of the ceramic having a large secondary electron emission ratio, the amount of secondary electron emission is large and discharge is induced. As a result, unnecessary discharge is continuously generated between the inner wall of the neck of the color cathode ray tube and the resistance element 29. Further, when the metal terminal 36 is exposed, a discharge from the high voltage electrode portion of the electron gun 24 is sporadically generated there.

【0007】このように連続的又は単発的な放電が発生
した場合、各部分での電位が不安定になり、電子銃の電
極に対して所定の電圧を供給することが困難となり、カ
ラ−ブラウン管として高画質の映像を提供することが困
難となる。
When a continuous or single discharge is generated in this way, the potential at each part becomes unstable, making it difficult to supply a predetermined voltage to the electrodes of the electron gun, and a color cathode ray tube. As a result, it becomes difficult to provide high-quality images.

【0008】そのため、絶縁基板31の側面とスル−ホ
−ル部37周辺のセラミックス露出部分及び金属端子3
6の裏面かしめ部36aを、2次電子放出比の小さい絶
縁被覆ガラス35でコ−ティングし、絶縁基板31のセ
ラミックス露出部分からの2次電子放出比に伴なう連続
放電、かしめ部36aを絶縁して電子銃の高電圧電極部
からの単発的な放電を防止している。
Therefore, the side surface of the insulating substrate 31, the exposed ceramics portion around the through-hole portion 37 and the metal terminal 3 are provided.
The back surface caulked portion 36a of No. 6 is coated with the insulating coated glass 35 having a small secondary electron emission ratio, and the continuous discharge due to the secondary electron emission ratio from the ceramic exposed portion of the insulating substrate 31 and the caulked portion 36a are coated. It is insulated to prevent a single discharge from the high voltage electrode part of the electron gun.

【0009】この絶縁被覆ガラス35は絶縁被覆層34
と同一の硼硅酸鉛系のガラス材料によりなっている。こ
れは同一の材料を使用することにより、誘電率を同一と
し電界の分布の不均一化を防止するためである。尚、絶
縁被覆ガラス35のコ−ティングはペ−スト状のガラス
材料を更に溶剤で希釈、液状にして、ディスペンサ−に
より塗布している。尚、図4の(c)では、絶縁被覆ガ
ラス35の図示を省略してある。
The insulating coating glass 35 is an insulating coating layer 34.
It is made of the same lead borosilicate glass material. This is because by using the same material, the dielectric constants are made the same and nonuniformity of the electric field distribution is prevented. The insulating coated glass 35 is coated with a dispenser by further diluting a pasty glass material with a solvent to form a liquid. In addition, in FIG. 4C, the insulating coated glass 35 is not shown.

【0010】[0010]

【発明が解決しようとする課題】既述のように、従来の
抵抗素子29においては、絶縁基板31及び金属端子3
6の露出部分を絶縁被覆ガラス35でコ−ティングする
際、ディスペンサ−による塗布のため、作業が複雑で抵
抗素子29一つ当たりの塗布時間が長く、生産性に欠け
る。又、塗布むら、塗り残しが多発するので、これらを
修正するための検査・修正工程を必要とし、生産性に問
題があり、これらの諸問題を解決するための手段が望ま
れていた。
As described above, in the conventional resistance element 29, the insulating substrate 31 and the metal terminal 3 are used.
When the exposed portion of 6 is coated with the insulating coated glass 35, the work is complicated due to the application by the dispenser, and the application time per one resistance element 29 is long and the productivity is low. In addition, uneven coating and unpainted portions frequently occur, so that an inspection / correction process is required to correct them, and there is a problem in productivity, and means for solving these problems have been desired.

【0011】この発明は、上記事情に鑑みなされたもの
で、2次電子による放電を抑制することが出来、更に製
造能率が向上すると共に電界の集中を防止することが出
来る高品質な電子管の内蔵素子及びその製造方法を提供
することを目的とする。
The present invention has been made in view of the above circumstances, and has a built-in high-quality electron tube capable of suppressing discharge due to secondary electrons, further improving manufacturing efficiency, and preventing electric field concentration. An object is to provide an element and a manufacturing method thereof.

【0012】[0012]

【課題を解決する手段】この発明は、絶縁基板上に電気
回路部が形成され、この電気回路部を覆うように絶縁被
覆層が形成され、更に電気回路部に直接又は接合用導体
層を介して金属端子が電気的に接続されてなる電子管の
内蔵素子において、絶縁基板の露出面,絶縁被覆層,及
び金属端子を覆うように金属酸化物被膜が付着されてな
る電子管の内蔵素子である。そして、金属酸化物被膜の
厚さは、100乃至5000オングストロ−ムの範囲に
設定されている。
According to the present invention, an electric circuit portion is formed on an insulating substrate, an insulating coating layer is formed so as to cover the electric circuit portion, and the electric circuit portion is directly or via a bonding conductor layer. In a built-in element of an electron tube in which metal terminals are electrically connected to each other, a metal oxide film is attached so as to cover the exposed surface of the insulating substrate, the insulating coating layer, and the metal terminal. The thickness of the metal oxide film is set in the range of 100 to 5000 angstrom.

【0013】又、この発明は、絶縁基板上に電気回路部
を形成し、この電気回路部を覆うように絶縁被覆層を形
成すると共に電気回路部に直接又は接合用導体層を介し
て金属端子を電気的に接続する電子管の内蔵素子の製造
方法において、内蔵素子全体を有機金属化合物溶液中に
浸漬し、その後、加熱処理して絶縁基板の露出面,絶縁
被覆層,及び金属端子を覆う金属酸化物被膜を形成する
電子管の内蔵素子の製造方法である。そして、絶縁被覆
層を形成する工程までを複数の分割用溝を有する単一絶
縁基板上に複数組実施し、その後、分割用溝に沿って複
数組の素子に分割する場合にも、上記と同様に各素子の
それぞれに金属酸化物被膜を形成する。
Further, according to the present invention, an electric circuit portion is formed on an insulating substrate, an insulating coating layer is formed so as to cover the electric circuit portion, and a metal terminal is directly or electrically connected to the electric circuit portion via a bonding conductor layer. In a method of manufacturing a built-in element of an electron tube for electrically connecting the above, the whole built-in element is immersed in an organometallic compound solution, and then heat treated to cover the exposed surface of the insulating substrate, the insulating coating layer, and the metal terminal. It is a method of manufacturing a built-in element of an electron tube for forming an oxide film. Then, even when performing a plurality of sets up to the step of forming the insulating coating layer on a single insulating substrate having a plurality of dividing grooves, and then dividing into a plurality of sets of elements along the dividing grooves, Similarly, a metal oxide film is formed on each of the elements.

【0014】[0014]

【作用】この発明によれば、内蔵素子全体を有機金属化
合物溶液中に浸漬し、その塗布膜を空気中の水分等で加
水分解を行ない、更に加熱し、脱水・縮合反応すること
により、内蔵素子全体に緻密な金属酸化物被膜が付着さ
れる。従って、2次電子による放電を抑制することが出
来る。又、塗布むらや塗り残し等の不良が低減するた
め、製造能率を高めることが出来る。こうして誘電率が
均一で、電界の集中を防止することが出来、高品質な電
子管の内蔵素子を得ることが出来る。
According to the present invention, the entire built-in element is dipped in the organic metal compound solution, the coating film is hydrolyzed by moisture in the air, and further heated to cause dehydration / condensation reaction. A dense metal oxide film is deposited on the entire device. Therefore, discharge due to secondary electrons can be suppressed. Further, defects such as coating unevenness and uncoated portions are reduced, so that manufacturing efficiency can be improved. In this way, it is possible to prevent the concentration of an electric field with a uniform dielectric constant and to obtain a high quality built-in electron tube element.

【0015】[0015]

【実施例】以下、図面を参照して、この発明の一実施例
を詳細に説明する。この発明による電子管の内蔵素子例
えば抵抗素子は、図1の(a),(b),(c)に示す
ように構成され、(a)は外表部を形成する金属酸化物
被膜上から透視した状態を示す平面図、(b)はA−
A′線に沿って切断し矢印方向に見た断面図、(c)は
(b)の要部を拡大して示す断面図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below with reference to the drawings. A built-in element such as a resistance element of the electron tube according to the present invention is configured as shown in FIGS. 1A, 1B and 1C, and FIG. 1A is seen through from the metal oxide film forming the outer surface portion. A plan view showing the state, (b) is A-
FIG. 3C is a cross-sectional view taken along the line A ′ and viewed in the direction of the arrow, and FIG. 6C is a cross-sectional view showing an enlarged main part of FIG.

【0016】即ち、酸化アルミニウムを主成分とするセ
ラミックス製の絶縁基板11上には、電気回路部である
抵抗層12が形成されている。具体的には、所定のシ−
ト抵抗値を有するルテニウム酸鉛を含む金属酸化物と硼
硅酸鉛系のガラスよりなる抵抗材料をジグザグパタ−ン
に印刷,乾燥,焼成した抵抗層12が形成されている。
更に、この抵抗層12と電気的に一体の接合用導体層1
3が形成され、この接合用導体層13に電気的に接続す
るように板状金属端子16が絶縁基板11にかしめられ
ている。図中の符号17はスル−ホ−ル部であり、16
aは金属端子16のかしめ部である。又、抵抗層12を
覆うように絶縁基板11の表面と裏面に絶縁被覆層14
が形成されている。尚、この実施例では、従来技術のよ
うに絶縁基板11の側面のセラミックス露出面には、絶
縁被覆ガラスは形成されていない。 この場合、接合用
導体層13は、例えばニッケル−アルミニウム合金,ガ
ラス質金属酸化物,及び水素化チタンを含む混合焼結層
からなる。又、金属端子16は、ニッケルからなる。
That is, a resistance layer 12 which is an electric circuit portion is formed on an insulating substrate 11 made of ceramics containing aluminum oxide as a main component. Specifically, the predetermined sea
The resistance layer 12 is formed by printing, drying, and firing a resistance material composed of lead oxide ruthenate and a lead borosilicate glass having a high resistance value in a zigzag pattern.
Furthermore, the conductor layer 1 for joining electrically integrated with the resistance layer 12
3 is formed, and the plate-shaped metal terminal 16 is crimped to the insulating substrate 11 so as to be electrically connected to the joining conductor layer 13. Reference numeral 17 in the drawing is a through hole portion, and 16
Reference numeral a is a crimped portion of the metal terminal 16. Further, an insulating coating layer 14 is formed on the front and back surfaces of the insulating substrate 11 so as to cover the resistance layer 12.
Are formed. In this embodiment, the insulating coated glass is not formed on the exposed ceramic surface of the side surface of the insulating substrate 11 as in the prior art. In this case, the bonding conductor layer 13 is composed of a mixed sintered layer containing, for example, a nickel-aluminum alloy, a glassy metal oxide, and titanium hydride. The metal terminal 16 is made of nickel.

【0017】更に、金属端子16,絶縁基板11の側面
のセラミックス露出面及び絶縁被覆層14を覆うよう
に、例えばメトキシドシリカ{Si(OCH3n }と
イソプロポキシドアルミニウム{Al(O・i−C3
7n }の混合物からなる金属酸化物被膜18が付着さ
れており、この発明の特徴となっている。この金属酸化
物被膜18は、有機金属化合物のゾル−ゲル反応及び脱
水・縮合反応により、抵抗素子全体に一度に、均一に、
而も塗り残しなどの欠陥のないように形成され(詳細は
後述)、高品質にして安価である。又、この金属酸化物
被膜18の厚さは100乃至5000オングストロ−ム
の範囲に設定され、この実施例では約1000オングス
トロ−ムである。
Further, for example, methoxide silica {Si (OCH 3 ) n } and isopropoxide aluminum {Al (O.multidot.O.multidot.n) so as to cover the metal terminals 16, the exposed ceramics surface of the insulating substrate 11 and the insulating coating layer 14. i-C 3 H
7 ) n } is attached to the metal oxide film 18, which is a feature of the present invention. The metal oxide film 18 is uniformly and simultaneously formed on the entire resistance element at once by the sol-gel reaction and the dehydration / condensation reaction of the organometallic compound.
Moreover, it is formed so that there are no defects such as unpainted portions (details will be described later), and it is of high quality and inexpensive. The thickness of the metal oxide film 18 is set in the range of 100 to 5000 angstroms, and is about 1000 angstroms in this embodiment.

【0018】尚、有機金属化合物としては、例えば下記
の式中のMの部分にSi,Ti,Mg,Sr,Al,B
a等の金属を含むメトキシド{M(OCH3n }、エ
トキシド{M(OC25n }、n−プロポキシド
{M(O・n−C37n }、イソプロポキシド{M
(O・i−C37n }の少なくとも1つを用いてい
る。 さて次に、上記の抵抗素子の製造方法について述
べる。先ず、酸化アルミニウムを主成分とするセラミッ
クス製の絶縁基板11上の一方の面に、抵抗ペーストを
用いスクリーン印刷法により抵抗パターンを印刷する。
その後、120〜150℃で10〜20分間乾燥してペ
ースト中の溶剤を除去し、抵抗層12を形成する。この
時、抵抗ペーストはルテニウム酸鉛を含む金属酸化物と
硼硅酸鉛系のガラスよりなる抵抗材料で、シート抵抗値
が106 〜107Ω/□程度を有する。又、印刷パター
ンは各金属端子16で所定の分圧比率が得られるような
所定のジグザグ状パターンである。
Examples of the organometallic compound include Si, Ti, Mg, Sr, Al, and B in the portion of M in the following formula.
methoxide containing a metal such as a {M (OCH 3 ) n }, ethoxide {M (OC 2 H 5 ) n }, n-propoxide {M (O · n-C 3 H 7 ) n }, isopropoxide {M
(O · i-C 3 H 7) n} is used at least one of. Next, a method of manufacturing the above resistance element will be described. First, a resistance pattern is printed by a screen printing method using a resistance paste on one surface of an insulating substrate 11 made of ceramics containing aluminum oxide as a main component.
Then, the solvent in the paste is removed by drying at 120 to 150 ° C. for 10 to 20 minutes to form the resistance layer 12. At this time, the resistance paste is a resistance material composed of a metal oxide containing lead ruthenate and lead borosilicate glass, and has a sheet resistance value of about 10 6 to 10 7 Ω / □. Further, the print pattern is a predetermined zigzag pattern so that a predetermined voltage division ratio can be obtained at each metal terminal 16.

【0019】次いで、絶縁基板11上の抵抗層12と同
一の面に、導体ペーストからなる接合用導体層13を印
刷する。その後、120〜150℃で10〜20分間乾
燥してペースト中の溶剤を除去し、複数の接合用導体層
13を形成する。そのためのシート抵抗値が104 Ω/
□以下を有する。
Next, a bonding conductor layer 13 made of a conductor paste is printed on the same surface as the resistance layer 12 on the insulating substrate 11. Then, the solvent in the paste is removed by drying at 120 to 150 ° C. for 10 to 20 minutes to form a plurality of bonding conductor layers 13. The sheet resistance for that is 10 4 Ω /
□ Have the following:

【0020】次いで、840〜860C゜、空気雰囲気
中で約8〜10分間加熱して抵抗層12及び接合用導体
層13を焼成する。こうして得られた抵抗層12は全抵
抗値で2×109 〜3×109 Ωの抵抗値を有する。こ
の時、各金属端子16での分圧比率が所定の範囲内では
ない時には、抵抗層12の各抵抗部に設けられている抵
抗値修正用の抵抗層をサンドブラスト法等により削り、
各分圧比率が所定の範囲内となるように修正する。
Then, the resistance layer 12 and the bonding conductor layer 13 are fired by heating at 840 to 860 ° C. in an air atmosphere for about 8 to 10 minutes. The resistance layer 12 thus obtained has a total resistance value of 2 × 10 9 to 3 × 10 9 Ω. At this time, when the voltage division ratio at each metal terminal 16 is not within the predetermined range, the resistance layer for resistance value correction provided in each resistance portion of the resistance layer 12 is ground by a sandblast method or the like,
It is corrected so that each partial pressure ratio is within a predetermined range.

【0021】次いで、絶縁基板11の両面の所定の部分
に絶縁被覆用のガラスペーストを印刷する。その後、1
20〜150℃で10〜20分間乾燥してペースト中の
溶剤を除去し、絶縁被覆層14を形成する。この時、ガ
ラスペーストは硼硅酸鉛ガラスを主成分とし酸化鉄,酸
化クロム,酸化ニッケル等の遷移金属酸化物と有機ビヒ
クルの混合材料よりなるペーストである。又、絶縁被覆
層14として所定の耐電圧特性を得るために、所定の膜
厚となるように印刷されている。焼成後の膜厚で抵抗層
12のある表面側は200〜500μm、もう一方の裏
面側は50〜200μmとしている。
Next, a glass paste for insulation coating is printed on predetermined portions of both surfaces of the insulating substrate 11. Then 1
The solvent in the paste is removed by drying at 20 to 150 ° C. for 10 to 20 minutes to form the insulating coating layer 14. At this time, the glass paste is a paste containing lead borosilicate glass as a main component and a mixed material of a transition metal oxide such as iron oxide, chromium oxide and nickel oxide and an organic vehicle. Further, the insulating coating layer 14 is printed so as to have a predetermined film thickness in order to obtain a predetermined withstand voltage characteristic. The film thickness after firing is 200 to 500 μm on the front surface side having the resistance layer 12, and 50 to 200 μm on the other back surface side.

【0022】次いで、590〜620C゜、空気雰囲気
中で約8〜10分間加熱して絶縁被覆層14を焼成す
る。通常、ここまでの工程を、複数の分割用溝を有する
単一絶縁基板上に複数組実施し、その後、上記分割用溝
に沿って複数個の素子に分割する。
Next, the insulating coating layer 14 is baked by heating at 590 to 620 ° C. in an air atmosphere for about 8 to 10 minutes. Usually, a plurality of sets of the steps up to this point are carried out on a single insulating substrate having a plurality of dividing grooves, and then a plurality of elements are divided along the dividing grooves.

【0023】次いで、分割された各素子の接合用導体層
13及び絶縁基板11のスル−ホ−ル部17に金属端子
16をかしめにより固着する。次いで、メトキシドシリ
カ{Si(OCH3n }とイソプロポキシドアルミニ
ウム{Al(O・i−C37n }を1:3で混合し
た有機金属化合物溶液中に、各抵抗素子全体を浸漬す
る。この時、溶液の粘度は10〜100poise とし、引
上げ速度は100mm/sec以下とする。
Next, the metal terminals 16 are fixed to the divided conductor layers 13 of the respective elements and the through-hole portions 17 of the insulating substrate 11 by caulking. Then, each of the resistive elements was placed in a metalorganic compound solution in which methoxide silica {Si (OCH 3 ) n } and isopropoxide aluminum {Al (O.i-C 3 H 7 ) n } were mixed at a ratio of 1: 3. Soak. At this time, the viscosity of the solution is 10 to 100 poise, and the pulling rate is 100 mm / sec or less.

【0024】その後、空気中に10〜15分間放置す
る。これによって塗布膜は空気中に含まれる水分により
加水分解反応が生じる。この加水分解反応によりゾル−
ゲル化して多孔質金属酸化物膜を形成する。
Then, it is left to stand in the air for 10 to 15 minutes. As a result, the coating film undergoes a hydrolysis reaction due to the moisture contained in the air. This hydrolysis reaction causes sol-
It is gelled to form a porous metal oxide film.

【0025】次いで、450〜550C゜、空気雰囲気
中で約10〜30分間加熱することによって脱水・縮合
反応が起こり、多孔質金属酸化物膜から無孔質金属酸化
物膜へ変質し、金属酸化物被膜18を形成する。この金
属酸化物被膜18の厚さは、約1000オングストロ−
ムに設定しているが、一般に、この金属酸化物被膜18
の厚さは、100〜5000オングストロ−ムの範囲に
あれば良い。尚、金属端子16と電子銃電極への接続リ
−ドとをレ−ザ溶接で接続すれば、金属酸化物被膜18
は何等溶接の障害にならない。
Next, by heating at 450 to 550 ° C. in an air atmosphere for about 10 to 30 minutes, a dehydration / condensation reaction occurs, and the porous metal oxide film is transformed into a non-porous metal oxide film, and the metal oxide is oxidized. The physical film 18 is formed. The thickness of the metal oxide film 18 is about 1000 angstroms.
However, in general, this metal oxide film 18
The thickness may be in the range of 100 to 5000 angstroms. If the metal terminal 16 and the connection lead to the electron gun electrode are connected by laser welding, the metal oxide film 18 is formed.
Does not hinder welding.

【0026】その後は、従来の抵抗素子の製造工程と同
一である。以上のようにして作られた抵抗素子は、抵抗
値分割比率が±0.7%と高精度であり、実使用条件の
3〜4倍の電圧を50時間印加して高負荷試験を実施し
たところ、抵抗値及び分割比の変化は±0.2%以内と
極めて良好な結果が得られた。又、10000時間に及
ぶ実動作試験後においても、2次電子放出によって誘発
された放電等は全く見られなかった。
After that, the manufacturing process of the conventional resistance element is the same. The resistance element manufactured as described above has a high resistance division ratio of ± 0.7%, and is subjected to a high load test by applying a voltage that is 3 to 4 times the actual use condition for 50 hours. However, the resistance value and the change in the division ratio were within ± 0.2%, which was a very good result. In addition, no discharge or the like induced by secondary electron emission was observed even after the actual operation test for 10,000 hours.

【0027】このような結果、従来生じていた抵抗層一
つ当たりの塗布時間が長く煩雑で生産性に欠ける工程が
不要となる。又、塗布むらや塗り残し等の不良が低減す
るため、これらを修正するための検査・修正工程が不要
となる。更に、抵抗層の全面に均一な膜を形成すること
が出来るため、誘電率を均一とし、電界の集中を防止す
ることが出来、電界集中による放電も抑制することが出
来る。
As a result, the coating process for each resistance layer, which is conventionally required, is long, complicated, and lacking in productivity becomes unnecessary. Further, defects such as coating unevenness and unpainted portions are reduced, so that an inspection / correction process for correcting them is unnecessary. Further, since a uniform film can be formed on the entire surface of the resistance layer, the dielectric constant can be made uniform, the concentration of the electric field can be prevented, and the discharge due to the concentration of the electric field can be suppressed.

【0028】尚、有機金属化合物としては上記に限定さ
れず、例えば下記の式中のMの部分にSi,Ti,M
g,Sr,Al,Ba等の金属を含むメトキシド{M
(OCH3n }、エトキシド{M(OC25
n }、n−プロポキシド{M(O・n−C37
n }、イソプロポキシド{M(O・i−C37n
の少なくとも1つを用いれば良い。
The organometallic compound is not limited to the above, and for example, Si, Ti, M may be added to the portion of M in the following formula.
Methoxides containing metals such as g, Sr, Al, Ba {M
(OCH 3 ) n }, ethoxide {M (OC 2 H 5 ).
n}, n-propoxide {M (O · n-C 3 H 7)
n}, isopropoxide {M (O · i-C 3 H 7) n}
It suffices to use at least one of the above.

【0029】又、上記実施例では、電気回路部として抵
抗層を例に挙げたが、電気回路部は抵抗に限定されず、
コンデンサでも良いし、抵抗とコンデンサと又は他の半
導体を組合わせた場合にも、この発明は適用される。
In the above embodiment, the resistance layer is used as an example of the electric circuit section, but the electric circuit section is not limited to a resistor.
The present invention can be applied to a case of using a capacitor, or a combination of a resistor and a capacitor or another semiconductor.

【0030】更に、上記実施例では、抵抗層12と金属
端子16との間に接合用導体層13が介在されていた
が、抵抗層12と金属端子16とを電気的に直接接続す
るようにしても良い。
Further, in the above embodiment, the conductor layer 13 for joining is interposed between the resistance layer 12 and the metal terminal 16, but the resistance layer 12 and the metal terminal 16 are electrically connected directly. May be.

【0031】[0031]

【発明の効果】この発明によれば、絶縁基板の露出面や
金属端子が、2次電子放出比の小さい金属酸化物被膜で
覆われている。それ故、2次電子による放電を抑制する
ことが出来る。又、塗布むらや塗り残し等の不良が低減
するため、製造能率を高めることが出来る。こうして誘
電率が均一で、電界の集中を防止することが出来、高品
質な電子管の内蔵素子を得ることが出来る。
According to the present invention, the exposed surface of the insulating substrate and the metal terminal are covered with the metal oxide film having a small secondary electron emission ratio. Therefore, it is possible to suppress discharge due to secondary electrons. Further, defects such as coating unevenness and uncoated portions are reduced, so that manufacturing efficiency can be improved. In this way, it is possible to prevent the concentration of an electric field with a uniform dielectric constant and to obtain a high quality built-in electron tube element.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)、(b)、(c)はこの発明の一実施例
に係る電子管の内蔵素子を示し、(a)は外表部を形成
する絶縁被覆層上から透視した状態を示す平面図、
(b)は(a)のA−A′線に沿って切断し矢印方向に
見た断面図、(c)は(b)の要部を拡大して示す断面
図。
1 (a), (b) and (c) show a built-in element of an electron tube according to an embodiment of the present invention, and (a) shows a state seen through from an insulating coating layer forming an outer surface portion. Plan view,
(B) is a cross-sectional view taken along the line AA 'of (a) and viewed in the direction of the arrow, and (c) is a cross-sectional view showing an enlarged main part of (b).

【図2】一般的なカラ−ブラウン管の全体を示す概略断
面図。
FIG. 2 is a schematic cross-sectional view showing the whole of a general color CRT.

【図3】図2のカラ−ブラウン管の要部(電子銃構体付
近)を拡大して示す断面図。
FIG. 3 is an enlarged cross-sectional view showing a main part (near the electron gun structure) of the color cathode ray tube in FIG.

【図4】(a)、(b)、(c)は従来の電子管の内蔵
素子を示し、(a)は外表部を形成する絶縁被覆層上か
ら透視した状態を示す平面図、(b)は(a)のB−
B′線に沿って切断し矢印方向に見た断面図、(c)は
(b)の要部を拡大して示す断面図。
4 (a), (b), (c) show a built-in element of a conventional electron tube, (a) is a plan view showing a state seen through from an insulating coating layer forming an outer surface portion, (b). Is B- in (a)
Sectional drawing which cut | disconnected along the B'line and was seen in the arrow direction, (c) is sectional drawing which expands and shows the principal part of (b).

【符号の説明】[Explanation of symbols]

11…絶縁基板、12…抵抗層(電気回路部)、13…
接合用導体層、14…絶縁被覆層、16…金属端子、1
8…金属酸化物被膜。
11 ... Insulating substrate, 12 ... Resistance layer (electrical circuit part), 13 ...
Bonding conductor layer, 14 ... Insulating coating layer, 16 ... Metal terminal, 1
8 ... Metal oxide coating.

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板上に電気回路部が形成され、こ
の電気回路部を覆うように絶縁被覆層が形成され、更に
上記電気回路部に直接又は接合用導体層を介して金属端
子が電気的に接続されてなる電子管の内蔵素子におい
て、 上記絶縁基板の露出面,上記絶縁被覆層,及び上記金属
端子を覆うように金属酸化物被膜が付着されてなること
を特徴とする電子管の内蔵素子。
1. An electric circuit section is formed on an insulating substrate, an insulating coating layer is formed so as to cover the electric circuit section, and a metal terminal is electrically connected to the electric circuit section directly or through a bonding conductor layer. In a built-in element of an electron tube, which is electrically connected, a metal oxide film is attached so as to cover the exposed surface of the insulating substrate, the insulating coating layer, and the metal terminal. .
【請求項2】 上記金属酸化物被膜の厚さは、100乃
至5000オングストロ−ムの範囲に設定されてなる請
求項1記載の電子管の内蔵素子。
2. The electron tube built-in element according to claim 1, wherein the thickness of the metal oxide film is set in a range of 100 to 5000 angstroms.
【請求項3】 絶縁基板上に電気回路部を形成し、この
電気回路部を覆うように絶縁被覆層を形成すると共に上
記電気回路部に直接又は接合用導体層を介して金属端子
を電気的に接続する電子管の内蔵素子の製造方法におい
て、 上記内蔵素子全体を有機金属化合物溶液中に浸漬し、そ
の後、加熱処理して上記絶縁基板の露出面,上記絶縁被
覆層,及び上記金属端子を覆う金属酸化物被膜を形成す
ることを特徴とする電子管の内蔵素子の製造方法。
3. An electric circuit section is formed on an insulating substrate, an insulating coating layer is formed so as to cover the electric circuit section, and a metal terminal is electrically connected to the electric circuit section directly or through a bonding conductor layer. In the method for manufacturing a built-in element of an electron tube connected to, the whole built-in element is immersed in an organometallic compound solution, and then heat-treated to cover the exposed surface of the insulating substrate, the insulating coating layer, and the metal terminal. A method for manufacturing a device with a built-in electron tube, comprising forming a metal oxide film.
【請求項4】 上記絶縁被覆層を形成する工程までを複
数の分割用溝を有する単一絶縁基板上に複数組実施し、
その後、上記分割用溝に沿って複数個の素子に分割し、
各素子のそれぞれに上記金属酸化物被膜を形成する請求
項3記載の電子管の内蔵素子の製造方法。
4. A plurality of sets up to the step of forming the insulating coating layer are carried out on a single insulating substrate having a plurality of dividing grooves,
Then, divided into a plurality of elements along the dividing groove,
The method for manufacturing an element with a built-in electron tube according to claim 3, wherein the metal oxide film is formed on each element.
JP27815393A 1993-11-08 1993-11-08 Built-in element of electron tube and manufacture of element thereof Pending JPH07134952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27815393A JPH07134952A (en) 1993-11-08 1993-11-08 Built-in element of electron tube and manufacture of element thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27815393A JPH07134952A (en) 1993-11-08 1993-11-08 Built-in element of electron tube and manufacture of element thereof

Publications (1)

Publication Number Publication Date
JPH07134952A true JPH07134952A (en) 1995-05-23

Family

ID=17593331

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27815393A Pending JPH07134952A (en) 1993-11-08 1993-11-08 Built-in element of electron tube and manufacture of element thereof

Country Status (1)

Country Link
JP (1) JPH07134952A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000079559A1 (en) * 1999-06-18 2000-12-28 Kabushiki Kaisha Toshiba Internal resistor of cathode-ray tube
US6624561B2 (en) 2000-09-19 2003-09-23 Hitachi, Ltd. Color cathode ray tube having an internal voltage-dividing resistor
WO2004057641A1 (en) * 2002-12-20 2004-07-08 Kabushiki Kaisha Toshiba Resistor for electron gun structure, electron gun structure and cathode ray tube

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000079559A1 (en) * 1999-06-18 2000-12-28 Kabushiki Kaisha Toshiba Internal resistor of cathode-ray tube
US6356021B2 (en) 1999-06-18 2002-03-12 Kabushiki Kaisha Toshiba Built-in resistor for cathode-ray tube
US6624561B2 (en) 2000-09-19 2003-09-23 Hitachi, Ltd. Color cathode ray tube having an internal voltage-dividing resistor
WO2004057641A1 (en) * 2002-12-20 2004-07-08 Kabushiki Kaisha Toshiba Resistor for electron gun structure, electron gun structure and cathode ray tube
US6917151B2 (en) 2002-12-20 2005-07-12 Kabushiki Kaisha Toshiba Resistor for electron gun assembly, electron gun assembly, and cathode-ray tube

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