JPH07131678A - Vertical edge detecting circuit - Google Patents

Abstract

PURPOSE:To produce a stable vertical edge signal by using one of both inter-line difference signals that has larger absolute value between the present field and the precedent or next field as a vertical edge signal. CONSTITUTION:The output signal f0 of a 263H-delay circuit 1 is supplied to a 1H-delay circuit 7 and a subtractor 8 respectively and a single inter-line difference signal is produced in a field and supplied to an ABS (absolute value) circuit 11 where the absolute value is calculated. This absolute value is used as one of both input signals of a MAX detecting circuit 13. Meanwhile a 1H- delay circuit 9, a subtractor 10 and an ABS circuit 12 calculate the absolute value of the inter-line difference signal respectively in the same way from the precedent field signal f-1. Then the output signal of the circuit 12 is used as another input signal of the circuit 13. The circuit 13 calculates the largest absolute value out of those two supplied absolute value. Then the largest absolute value is supplied to a MAX detecting circuit 15 as a vertical edge signal corresponding to the vertical edge (horizontal line edge) of an image.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical edge detecting circuit for inputting a 2: 1 interlaced image signal and detecting an edge of an image in a direction perpendicular to a scanning line.

More specifically, the present invention relates to a vertical edge detection circuit for accurately detecting an edge signal in the vertical direction of an image when extracting an edge signal necessary for performing motion adaptive signal processing. is there.

[0003]

2. Description of the Related Art FIG. 5 shows a motion adaptive signal processing circuit including a conventionally known vertical edge detecting circuit.
In the figure, the conventional vertical edge detection circuit is indicated by reference numeral 53, and a 1H delay circuit (1H = 1 scanning line period) 5
It is composed of 0, a subtracter 51 and an absolute value circuit 52.
That is, the illustrated vertical edge detection circuit 53 outputs the absolute value of the line difference signal in each field as a vertical edge signal (line = scan line).

In the motion adaptive signal processing circuit shown in FIG. 5, a horizontal edge signal representing an edge in the horizontal direction (scanning line direction) is detected in order to detect the motion area of the image based on the inter-frame difference signal. The signal having the larger absolute value among the vertical edge signals is extracted as the edge signal.

In order to avoid erroneous determination that the image is a moving area even when a slight movement occurs between frames, an image having a particularly high contrast is processed by the movement determining circuit 57 as shown in FIG. The difference signal is divided by the edge signal before the motion area is determined (see Japanese Patent Application Laid-Open No. 1-91586 “Motion Detection Circuit”).

[0006]

However, as shown in FIG. 5, in the conventional vertical edge detection circuit 53, the absolute value of the line difference signal is directly used as the vertical edge signal. "Horizontal stripes" with a difference
In images and the like, the line difference signal becomes zero in a specific field depending on the frequency of the stripes (that is, the vertical edge signal is missing), and there is the disadvantage that motion detection cannot be performed stably. Was there.

Therefore, in view of the above points, it is an object of the present invention to provide a vertical edge detection circuit capable of always detecting a stable vertical edge signal regardless of the content of an image.

[0008]

In order to achieve the above object, the present invention provides a vertical edge detection circuit for inputting a 2: 1 interlaced image signal and detecting an edge of an image in a direction perpendicular to a scanning line. A first means for detecting an inter-line difference signal of the current field, a second means for detecting an inter-line difference signal of an adjacent line in the previous field or the subsequent field of the current field, and the first and second Third means for obtaining the absolute value of the line-to-line difference signal obtained from each means and outputting the larger absolute value of these absolute values as a vertical edge signal or the sum of these absolute values as a vertical edge signal It is equipped with and.

Here, it is also possible to input a motion-compensated image signal of the front field or the rear field to the second means.

[0010]

According to the above configuration of the present invention, when the vertical edge signal is detected from the image signal of 2: 1 interlace, the absolute value of the line difference signal of the current field and the line difference of the preceding or following field are detected. Since the larger absolute value (or the sum) of the absolute values of the signals is used as the vertical edge signal,
By eliminating the loss of the vertical edge signal, stable detection can always be performed.

[0011]

EXAMPLES Examples of the present invention will be described in detail below.

Embodiment 1 FIG. 1 shows an embodiment of the present invention. The illustrated circuit is applicable to a motion adaptive signal processing device for an image signal of 525 scanning lines / 2: 1 interlaced scanning. An example of this type of device is a motion adaptive progressive scan conversion device that converts interlaced scanning into progressive scanning. However, since the content of the motion adaptation process and the format of the output signal of the device are not directly related to the present invention, detailed description will be omitted.

In the present embodiment, the input signal of 525 lines / 2: 1 interlace (hereinafter referred to as f ₁ ) is 263H.
(H is one line (scanning line) scanning period in the field) is input to the delay circuit 1. The output signal f ₀ of the 263H delay circuit 1 is next input to the 262H delay circuit 2 to obtain an output signal f _-1 . All of these signals f ₁ , f ₀ and f _-1 are input to the motion adaptive signal processing circuit 3.

Here, the motion adaptive signal processing circuit 3 is f _0.
It is assumed that an output signal corresponding to the time point (field) of is formed. Thus, in the present embodiment shown in FIG. 1, f ₀
Becomes the signal of the current field for the output signal, and the motion detection processing of the image described below is performed mainly at the time point of f ₀ . Therefore, for f ₀ , f ₋₁ is the signal in the previous field and f ₁ is the signal in the subsequent field.

The subtracter 4 creates an interframe difference signal by _obtaining the difference between f ₁ and f _-1 , and supplies this to the motion determination circuit 5. The motion determination circuit 5 creates a motion signal by dividing the inter-frame difference signal by an edge signal described below and then applying an appropriate threshold value. The motion signal controls the signal processing content of the motion adaptive signal processing circuit 3.

The output signal f ₀ of the 263H delay circuit 1 is also input to the horizontal edge detection circuit 6. The horizontal edge detection circuit 6 detects the horizontal edge (vertical line edge) of the image by processing such as obtaining an absolute difference between pixels in the horizontal direction of the screen. Then, the output signal of the horizontal edge detection circuit 6 is set as the horizontal edge signal.

The horizontal edge signal is compared with the vertical edge signal described below, the maximum value is obtained in the maximum value (MAX) detection circuit 15, and this is used as the edge signal given to the motion determination circuit 5.

The signal f ₀ is also input to the 1H delay circuit 7 and the subtractor 8. The 1H delay circuit 7 and the subtractor 8 create a 1-line difference signal in the field. This signal is input to the absolute value (ABS) circuit 11 to obtain the absolute value, which becomes one input signal of the MAX detection circuit 13.

The 1H delay circuit 9, the subtracter 10 and the ABS circuit 12 similarly obtain the absolute value of the line difference signal from the previous field signal f _-1 . Then, the output signal of the ABS circuit 12 becomes the other input signal of the MAX detection circuit 13.

The MAX detection circuit 13 obtains the maximum absolute value from the two input absolute values. This becomes a vertical edge signal corresponding to an edge (horizontal edge) in the vertical direction of the image and is input to the MAX detection circuit 15. The respective circuits shown by 7 to 13 constitute the vertical edge detection circuit 14 as a whole.

The vertical edge detection circuits 14 to 9, 1
The circuits other than the circuits indicated by 0, 12, and 13 (that is, the circuit for directly inputting the output of the ABS circuit 11 to the MAX detection circuit 15 as a vertical edge signal) are conventional vertical edge detection circuits (shown in FIG. 5). 53 ).

Next, the operation of the circuit shown in FIG. 1 will be described with reference to FIG. Two image signals are shown in FIG. 2, but the vertical direction of this figure shows the position of the scanning line on the screen, and the horizontal direction of this figure shows the signal level of each signal. ing. In addition, m-3, m-2, ...
m + 1, ... Denote scanning line numbers (m is a positive integer), which are numbers sequentially assigned from the top of the screen to all scanning lines in one frame. The signal of the m-th scanning line will be represented as "X _m ".

2A is an example of an input image signal of the vertical edge detection circuit 14. This is a vertical spatial frequency of 525/4 cph (cycles per
The horizontal stripe image of the sine wave shape of picture height is shown. This image is assumed to be a still image.

Here, the (m ± 2n) th (n is an integer) scanning line is scanned in the first field, (m ± 2n +).
The 1) th scan line is scanned in the second field.

Therefore, the ABS circuit 11 shown in FIG.
In the first field, at scanning line m, | (X _m −X
_m-2 ) |, at scanning line m + 2 | (X _{m + 2} −X _m ).
By obtaining |, ..., A value of 100% is always output as shown in FIG.

However, in the second field, the scanning line m-
, | (X _m-1 -X _m-3 ) |, and | (X _{m + 1} -X _m-1 ) | in scan m + 1. Since these are all zero for the input image shown in FIG. 2A, the output signal of the ABS circuit 11 is always zero in the second field as shown in FIG. 2C. .

Since the output signal of the ABS circuit 11 is a conventional vertical edge signal (see FIG. 5) itself,
It can be seen that for the image as shown in (a), the conventional vertical edge signal is missing every other field and flicker occurs for each field. For this reason, conventionally, the motion signal also becomes flicker, and the output image of the device may lack stability.

On the other hand, since the ABS circuit 12 shown in FIG. 1 creates the line difference signal from the signal f _-1 , the scan line m at f ₀ in the first field (at this time, f _-1 is the scan line m + 1). Scanning)) | (X _{m + 1-Xm-1} )
│, in scanning line m + 2 (f ₋₁ scans m + 3) |
(X _{m + 3} −X _{m + 1} ) | ... will be obtained. These results are all zero (FIG. 2 (d)).

In the second field, a 100% signal is always output by the same calculation (FIG. 2 (d)).

Next, as is apparent by comparing (b), (c) with (d), (e) shown in FIG. 2, the output signal of the ABS circuit 11 and the output signal of the ABS circuit 12 are both Flicker occurs for each field, but the phase is inverted. Therefore, if the maximum value of both is taken in the MAX detection circuit 15 shown in FIG. 1, the output is always 100% in both the first field and the second field.

As described above, according to this embodiment, it is possible to always obtain a stable vertical edge signal even for an image as shown in FIG.

FIG. 3 shows the operation of the circuit of FIG. 1 for a vertical impulse image (one horizontal line on the screen). Since the notation of FIG. 3 is the same as that of FIG. 2, detailed description will be omitted.

As shown in FIG. 3, as in the conventional case, only the output signal of the ABS circuit 11 causes the vertical edge signal to be lost as in the case of FIG. 2, and the output of the ABS circuits 11 and 12 becomes maximum until stable. It can be seen that the obtained vertical edge signal is obtained.

In the above operation, even if the delay amounts of the delay circuits 1 and 2 in FIG. 1 are reversed, or the inputs of the 1H delay circuit 9 and the subtractor 10 are f ₁ ,
Further, even if an adder (not shown) is used instead of the MAX detection circuit 13, the same is true.

Embodiment 2 FIG. 4 is a block diagram showing another embodiment. In the circuit of FIG. 4, instead of the delay circuits 1 and 2 shown in FIG. 1, (263H-V) and (262H + V) motion compensation field delay circuits 21 and 22 (V is a motion vector, that is, an image between 1 fields). Motion distance) is the same as in FIG.

As described above, in the present embodiment, the inter-field motion adaptive process in which motion compensation is applied is performed instead of the mere inter-field motion adaptive process. Therefore, image processing for a moving image (for example, Japanese Patent Application No. The image quality of No. 4-283120 “scan conversion device for image signals”) can be greatly improved.

The reason why the present invention can be applied to such a motion compensation image type image processing apparatus is as follows.

That is, the positional relationship of the image with respect to the moving image between the motion-compensated front and rear field signals and the current field signal is basically the same as the positional relationship with the still image in the normal case. The operation of the circuit shown in FIG. 4 is the same as that in FIGS. 2 and 3 for a moving image. Thus, a stable vertical edge signal can be obtained even for moving images. In this case, the motion determination circuit 5 determines whether or not the motion compensation is accurate, not the presence / absence of motion.

Of course, the present invention can be applied to signals of scanning lines other than 525 lines.

[0040]

As described above, in the present invention, the larger absolute value (or the sum) of the absolute value of the line difference signal of the current field and the absolute value of the line difference signal of the preceding or succeeding field. Since the vertical edge signal is used as a vertical edge signal, it is possible to create a stable vertical edge signal that is not lost for each field even if the vertical edge signal is lost in a certain field depending on the image conventionally.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram showing an operation example of the circuit shown in FIG.

FIG. 3 is a diagram showing another operation example of the circuit shown in FIG.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of a conventional technique.

[Explanation of symbols]

 1 263H delay circuit 2 262H delay circuit 3 motion adaptive signal processing circuit 4 subtractor 5 motion determination circuit 6 horizontal direction edge detection circuit 7 1H delay circuit 8 subtractor 9 1H delay circuit 10 subtractor 11, 12 absolute value (ABS) Circuit 13 Maximum value (MAX) detection circuit 14 Vertical edge detection circuit 15 Maximum value (MAX) detection circuit

Claims (2)

[Claims] 1. Inputting a 2: 1 interlaced image signal,
In a vertical edge detection circuit for detecting an edge of an image in a direction perpendicular to a scanning line, first means for detecting a line difference signal of a current field, and a line interval between adjacent lines in a previous field or a subsequent field of the current field. A second means for detecting a difference signal, and an absolute value of the line difference signal obtained from each of the first and second means is obtained, and a larger absolute value of the absolute values is used as a vertical edge signal, Alternatively, the vertical edge detection circuit is provided with a third means for outputting the sum of the absolute values as a vertical edge signal. 2. The vertical edge detection circuit according to claim 1, wherein a motion-compensated image signal of a front field or a rear field is input to the second means.