JP3138374B2 - Vertical edge detection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical edge detecting circuit which receives a 2: 1 interlaced image signal and detects an edge of an image in a direction perpendicular to a scanning line.

More specifically, the present invention relates to a vertical edge detection circuit for accurately detecting a vertical edge signal of an image when extracting an edge signal necessary for performing a motion adaptive signal processing. is there.

[0003]

2. Description of the Related Art FIG. 5 shows a motion adaptive signal processing circuit provided with a conventionally known vertical edge detecting circuit.
In the figure, the conventional vertical edge detection circuit is indicated by reference numeral 53, and includes a 1H delay circuit (1H = 1 scanning line period).
It comprises a zero, a subtractor 51, and an absolute value circuit 52.
That is, the illustrated vertical edge detection circuit 53 outputs the absolute value of the difference signal between lines in each field as a vertical edge signal (line = scanning line).

In the motion-adaptive signal processing circuit shown in FIG. 5, a horizontal edge signal representing a horizontal edge (scan line direction) is detected in order to detect a motion area of an image based on an inter-frame difference signal. And the signal having the larger absolute value among the vertical edge signals is extracted as an edge signal.

In an image having a particularly high contrast, even if a slight movement occurs between frames, the motion judging circuit 57 as shown in FIG. The motion area is determined after dividing the difference signal by the edge signal (refer to Japanese Patent Application Laid-Open No. 1-91586 “Motion detection circuit”).

[0006]

However, as shown in FIG. 5, in the conventional vertical edge detection circuit 53, since the absolute value of the difference signal between lines is used as the vertical edge signal as it is, for example, the density in the vertical direction of the screen is reduced. "Horizontal stripes" with differences
In an image or the like, depending on the frequency of a stripe, a line difference signal becomes zero in a specific field (that is, a vertical edge signal is lost), so that a defect that motion detection cannot be performed stably occurs. I was

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a vertical edge detection circuit which can always detect a vertical edge signal stably regardless of the contents of an image.

[0008]

In order to achieve the above object, the present invention provides a vertical edge detecting circuit which receives a 2: 1 interlaced image signal and detects an edge of an image in a direction perpendicular to a scanning line. First means for detecting an inter-line difference signal of a current field, second means for detecting an inter-line difference signal of an adjacent line in a previous field or a subsequent field of the current field, and the first and second signals. A third means for obtaining the absolute values of the line difference signals obtained from the respective means and outputting the larger one of the absolute values as a vertical edge signal, or outputting the sum of the absolute values as a vertical edge signal Is provided.

Here, it is also possible to input the image signal of the previous field or the next field which has been subjected to the motion compensation to the second means.

[0010]

According to the above construction of the present invention, when detecting a vertical edge signal from a 2: 1 interlaced image signal, the absolute value of the line difference signal of the current field and the line difference of the previous or next field are detected. Since the larger absolute value (or the sum) of the absolute values of the signals is used as the vertical edge signal,
Eliminating the lack of the vertical edge signal enables stable detection at all times.

[0011]

Embodiments of the present invention will be described below in detail.

Embodiment 1 FIG. 1 shows an embodiment of the present invention. The illustrated circuit is applicable to a motion adaptive signal processing apparatus for an image signal of 525 scanning lines / 2: 1 interlaced scanning. As this type of device, for example, there is a motion-adaptive progressive scanning converter that converts interlaced scanning into progressive scanning. However, the content of the motion adaptation process and the format of the output signal of the device do not directly relate to the present invention, and thus detailed description is omitted.

[0013] In this example, 525/2: 1 interlaced input signal (hereinafter, referred to as f ₁₎ is 263H
(H is the scanning period of one line (scanning line) in the field). The output signal f ₀ of the 263H delay circuit 1 is next input to the 262H delay circuit 2 to obtain an output signal f ₋₁ . All of these signals f ₁ , f ₀ , f ₋₁ are input to the motion adaptive signal processing circuit 3.

Here, the motion adaptive signal processing circuit 3 outputs f ₀
It is assumed that an output signal corresponding to the time point (field) is formed. In the embodiment shown this way in Fig. 1, f ₀
There becomes a signal of the current field for output signal, the motion detection processing of an image to be described below is assumed to perform around the time of f _0. Therefore f _-1 is a signal of the previous field relative to f _0, f ₁ is the signal of the succeeding field.

The subtracter 4 generates an inter-frame difference signal by _obtaining the difference between f ₁ and f ₋₁ , and supplies this signal to the motion judgment circuit 5. The motion determining circuit 5 creates a motion signal by processing such as dividing an inter-frame difference signal by an edge signal described below and applying an appropriate threshold value. The signal processing content of the motion adaptive signal processing circuit 3 is controlled by the motion signal.

The output signal f ₀ of the 263H delay circuit 1 is also input to the horizontal edge detection circuit 6. The horizontal edge detection circuit 6 detects a horizontal edge (vertical line edge) of an image by processing such as obtaining an absolute difference between pixels in the horizontal direction of the screen. Then, the output signal of the horizontal edge detection circuit 6 is set as a horizontal edge signal.

The horizontal edge signal is compared with a vertical edge signal described below, and the maximum value is obtained by a maximum value (MAX) detection circuit 15, which is used as an edge signal to be given to the motion judgment circuit 5.

The signal f ₀ is input to a 1H delay circuit 7 and a subtractor 8. The 1H delay circuit 7 and the subtractor 8 create a difference signal between one line in the field. This signal is input to an absolute value (ABS) circuit 11 to obtain an absolute value, which is one input signal of the MAX detection circuit 13.

The 1H delay circuit 9, subtractor 10, and ABS circuit 12 similarly determine the absolute value of the inter-line difference signal from the previous field signal f _-1 . Then, the output signal of the ABS circuit 12 becomes the other input signal of the MAX detection circuit 13.

The MAX detection circuit 13 calculates the maximum absolute value from the two input absolute values. This becomes a vertical edge signal corresponding to a vertical edge (horizontal line edge) of the image, and is input to the MAX detection circuit 15. The respective circuits indicated by 7 to 13 constitute the vertical edge detection circuit 14 as a whole.

Note that the vertical edge detection circuits 14 to 9, 1
A circuit excluding circuits indicated by 0, 12, and 13 (that is, a circuit that directly inputs the output of the ABS circuit 11 to the MAX detection circuit 15 as a vertical edge signal) is a conventional vertical edge detection circuit (shown in FIG. 5). 53 ).

Next, the operation of the circuit shown in FIG. 1 will be described with reference to FIG. FIG. 2 shows five image signals. The vertical direction in FIG. 2 indicates the position of the scanning line on the screen, and the horizontal direction in FIG. 2 indicates the signal level of each signal. ing. Also, m-3, m-2,...
.., m + 1,... indicate the numbers of the scanning lines (m is a positive integer), which are numbers sequentially assigned from the top of the screen to all the scanning lines in one frame. The signal of the m-th scanning line is represented by “X _m ”.

FIG. 2A shows an example of an input image signal of the vertical edge detection circuit 14 at the left end of FIG. This is a vertical spatial frequency of 525/4 cph (cycles per
5 shows a sine-wave horizontal stripe image of the image height. This image is assumed to be a still image.

Here, the (m ± 2n) th (n is an integer) scanning line is scanned in the first field, (m ± 2n +
1) The scan of the first scan line is defined as a second field.

Therefore, the ABS circuit 11 shown in FIG.
In the first field, | (X _m −X
_m−2 ) |, at the scanning line m + 2 | (X _{m + 2} −X _m )
By calculating |,..., A value of 100% is always output as shown in FIG.

However, in the second field, the scanning line m-
| (X _m-1 -X _m-3 ) | in scan m + 1, | (X _{m + 1} -X _m-1 ) |... In scan m + 1. Since these are all zero for the input image shown in FIG. 2A, the output signal of the ABS circuit 11 is always zero in the second field as shown in FIG. 2C. .

Since the output signal of the ABS circuit 11 is the conventional vertical edge signal itself (see FIG. 5), the output signal shown in FIG.
It can be seen that, for an image as shown in (a), the conventional vertical edge signal loses every other field and flickers every field. For this reason, in the related art, the motion signal becomes flicker-like, and the output image of the apparatus sometimes lacks stability.

On the other hand, ABS circuit 12 shown in FIG. 1 because it creates a line between difference signal from the signal f _-1, scan lines in f ₀ is the first field m (this time f _-1 scanning line m + 1 Is being scanned) | (X _{m + 1-Xm-1} )
| On a scanning line m + 2 (f- ₁ scans m + 3) |
(X _{m + 3} −X _{m + 1} ) |. These results are all zero (FIG. 2 (d)).

In the second field, a signal of 100% is always output by the same operation (FIG. 2D).

Next, as apparent from comparison of (b) and (c) with (d) and (e) shown in FIG. 2, both the output signal of the ABS circuit 11 and the output signal of the ABS circuit 12 Flicker occurs for each field, but its phase is inverted. Therefore, if the maximum value of both is obtained in the MAX detection circuit 15 shown in FIG. 1, the output is always 100% in both the first field and the second field.

As described above, according to the present embodiment, a stable vertical edge signal can be always obtained even for an image as shown in FIG.

FIG. 3 shows the operation of the circuit of FIG. 1 for a vertical impulse image (one horizontal line on the screen). The notation in FIG. 3 is the same as that in FIG.

As can be seen from FIG. 3, as in the conventional case, only the output signal of the ABS circuit 11 causes a lack of the vertical edge signal as in the case of FIG. 2, and it becomes stable only by taking the maximum value of the outputs of the ABS circuits 11 and 12. It can be seen that a vertical edge signal is obtained.

The above operation is performed even if the delay amounts of the delay circuits 1 and 2 are reversed in FIG. 1 or the inputs of the 1H delay circuit 9 and the subtractor 10 are set to f ₁ .
Further, the same applies even when an adder (not shown) is used instead of the MAX detection circuit 13.

Embodiment 2 FIG. 4 is a block diagram showing another embodiment. The circuit shown in FIG. 4 includes (263H-V) and (262H + V) motion compensation field delay circuits 21 and 22 (V is a motion vector, that is, an image between one field) instead of the delay circuits 1 and 2 shown in FIG. This is the same as FIG.

As described above, in this embodiment, since the inter-field motion adaptive processing with motion compensation is performed in place of the mere inter-field motion adaptive processing, image processing for a moving image (for example, Japanese Patent Application No. 4-283120, "Image Signal Scan Converter") can greatly improve the image quality.

The reason why the present invention can be applied to such a motion-compensated image type image processing apparatus is as follows.

That is, the positional relationship of the image with respect to the moving image between the signal of the preceding and succeeding fields subjected to the motion compensation and the signal of the current field is basically the same as the positional relationship with respect to the normal still image. The operation of the circuit shown in FIG. 4 is the same as that of FIGS. Thus, a stable vertical edge signal can be obtained even for a moving image. In this case, the motion determining circuit 5 determines whether or not the motion compensation is accurate, not whether or not there is a motion.

The present invention can of course be applied to signals of other than 525 scanning lines.

[0040]

As described above, according to the present invention, the larger absolute value (or the sum thereof) of the absolute value of the line difference signal of the current field and the absolute value of the line difference signal of the previous or next field is used. Is used as a vertical edge signal, so that even if the vertical edge signal is lost in a certain field in some images in the past, it is possible to create a stable vertical edge signal that is not lost for each field.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram illustrating an operation example of the circuit illustrated in FIG. 1;

FIG. 3 is a diagram showing another operation example of the circuit shown in FIG. 1;

FIG. 4 is a block diagram showing a second embodiment of the present invention.

FIG. 5 is an explanatory diagram of a conventional technique.

[Explanation of symbols]

 1 263H delay circuit 2 262H delay circuit 3 Motion adaptive signal processing circuit 4 Subtractor 5 Motion determination circuit 6 Horizontal edge detection circuit 7 1H delay circuit 8 Subtractor 9 1H delay circuit 10 Subtractor 11, 12 Absolute value (ABS) Circuit 13 Maximum value (MAX) detection circuit 14 Vertical edge detection circuit 15 Maximum value (MAX) detection circuit

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H04N 5/14-5/217

Claims (2)

(57) [Claims] 1. A 2: 1 interlaced image signal is input,
A vertical edge detection circuit for detecting an edge of an image in a direction perpendicular to a scanning line; a first means for detecting a difference signal between lines of a current field; and a line between adjacent lines in a field before or after the current field. A second means for detecting a difference signal; and obtaining an absolute value of an inter-line difference signal obtained from each of the first and second means, and using a larger absolute value of the absolute values as a vertical edge signal, Or a third means for outputting a sum of the absolute values as a vertical edge signal. 2. The vertical edge detection circuit according to claim 1, wherein the second means receives a motion-compensated image signal of a previous field or a subsequent field.