JP3314961B2 - Interlace interference removal device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interlace interference removing apparatus for improving the quality of an interlaced scanning image signal.

[0002]

2. Description of the Related Art Conventionally, various interlaced / sequential scan conversion devices have been proposed as means for removing interlace interference in images caused by interlaced scanning and improving image quality.

[0003] In addition, for a complete still image such as a weather forecast telop, a device for removing interlace interference by a vertical filter has already been put to practical use.

[0004]

However, in order to achieve high image quality by progressive scan conversion, a double-speed scanning progressive scan display must be used, and this display has the disadvantage of being expensive.

[0005] That is, there is a drawback that the economic burden on the entire image system is increased, for example, the interlace scanning type display, which has already been widely used, cannot be used.

Accordingly, an object of the present invention is to eliminate such a drawback and to maintain interlaced scanning for both moving and still images.
An object of the present invention is to provide an interlace interference removing apparatus configured to obtain a high-quality image by removing interlace interference.

[0007]

According to the present invention, there is provided an intra-field interpolation circuit for inputting a 2: 1 interlaced image signal and interpolating a scanning line by intra-field signal processing. A motion vector detection circuit that outputs a motion amount of an image in the image signal as a motion vector, and compensates for a delay amount corresponding to one field period by a delay amount related to the motion vector, and A motion compensation interpolator for interpolating the scanning lines by applying the delay, a mixing circuit for mixing the output signals of the intra-field interpolation circuit and the motion compensation interpolator, By compensating the amount of delay by the amount of delay related to the vector and calculating the difference between the signal obtained by applying the delay to the image signal and the image signal. An interpolation selection judging circuit for determining a mixing ratio in the mixing circuit based on the obtained motion compensated inter-frame difference signal, and an output signal of the mixing circuit and the image signal are inputted to remove 2: 1 interlace interference. And a vertical reduction filter for outputting an interlaced scanning signal.

Another aspect of the present invention is a motion vector detecting circuit which outputs a motion amount of an image in a 2: 1 interlace-scanned image signal as a motion vector, and a motion vector detecting circuit for detecting a delay amount corresponding to one field period. to compensate for the delay amount delay amount related to a motion vector, a first and a motion compensated interpolation circuit for interpolating a scanning line is subjected to the delay in the image signal, the motion with respect to the delay amount corresponding to one field period Compensates for the delay by the delay associated with the vector,
A second method of interpolating a scanning line by applying the delay to the image signal
And a vertical reduction filter that receives the output signals of the first and second motion compensation interpolation circuits and the image signal, multiplies each input by a predetermined coefficient, and then adds the input signals. The output signal of the vertical reduction filter and the image signal are mixed to remove interlace interference 2:
A mixing circuit for outputting a 1 interlaced scan signal, 1 frame
For the delay amount corresponding to the
Compensate the delay amount by the related delay amount and
The difference between the signal obtained by performing the delay and the image signal is obtained.
Based on the motion compensated frame difference signal obtained by
To determine the mixing ratio in the mixing circuit.
And a constant circuit .

[0009]

According to the above configuration of the present invention, the motion-compensated progressive scan conversion is applied to the interlaced signal virtually,
Thereafter, by passing through a vertical filter that removes interference components, interlace interference can be removed from both moving images and still images, and the quality of the interlaced scanned image can be improved.

[0010]

Embodiments of the present invention will be described below in detail.

Embodiment 1 FIG. 1 shows the configuration of an interlace interference removing apparatus according to an embodiment of the present invention. Input / output signals 100 and 200 of this device
Are 525 scanning lines / field frequency 60
Hz / interlace ratio 2: 1.

An input signal 100 of the apparatus is first input to a motion vector detection circuit 1. In the motion vector detection circuit 1 is detected as the vector V ₀ motion a motion amount of the image of the input signal 100. For this detection, various motion vector detection techniques already proposed can be used as they are. When a motion vector is given from outside, it may be received.

The motion vector V ₀ is input to a motion vector value correction circuit 2, the value of which is slightly corrected, and output as a motion vector V (V _x , V _y ) used in another circuit in the figure. These circuits 1 and 2 constitute a motion vector generating circuit 3 as a whole.

[0014] Here, the modified motion vector V is actually composed of two signals V _x, V _y. That V _x represents the horizontal component of the motion, the unit is set to (pixels / field). V _y represents a vertical component of the motion, and the unit is ((in a frame) scanning line / field). This apparatus can operate even if the value of the motion vector V is updated for each pixel, for each pixel block of a certain size, or for each field.

The input signal 100 is also (263H + V)
Is input to the motion compensation memory 9 having the delay amount of Here, H represents one line in the field. V is the motion vector described above. Therefore, (263H +
The delay amount of V) is expressed as follows in terms of the number of pixels.

Assuming that the number of pixels in one line is N,

[0017]

(Equation 1)

Here, the polarities of V _x and V _y are set to V _x > 0 and V _y > 0 when the image moves to the upper right with time.

The output of the motion compensation memory 9 is a scan line signal interpolated by motion compensation inter-field interpolation. In this embodiment, the memory 9 constitutes a motion compensation interpolation circuit 10 as a whole.

The input signal 100 is also supplied to the 1H delay circuit 11
Is input to the adder 12. The adder 12 adds the output of the 1H delay circuit 11 and the input signal 100. The 1/2 coefficient unit 13 multiplies the output of the adder 12 by 1/2 and outputs the result. Each of these circuits 11 to 13 constitutes the intra-field interpolation circuit 14 as a whole.

The output of the intra-field interpolation circuit 14 is a signal of a scanning line interpolated by intra-field interpolation.

The output of the motion compensation interpolation circuit 10 and the output of the intra-field interpolation circuit 14 are respectively (1-K) coefficient units 1
5 is input to the K coefficient unit 16 and is multiplied by each coefficient. Here, K satisfies 0 ≦ K ≦ 1.0, and the value of K is input from the interpolation selection determination circuit 8 described later to each of the coefficient units 15 and 16. The outputs of these coefficient units 15 and 16 are added by an adder 17. These circuits 15 to 17 constitute a mixing circuit 18 as a whole.

The adder 19 adds the output signal of the adder 17 and the input signal of the present apparatus. The 係数 coefficient unit 20 multiplies the output of the adder 19 by １ ／ and outputs the result. These circuits 19 and 20 as a whole are a vertical (reducing) filter 21.
Is composed.

Here, the output of the adder 17 is called the interpolation input of the vertical filter 21, and the other input (the input signal of the present apparatus) is called the direct input of the vertical filter 21.

The input signal 100 of the device is also (525
(+ 2V) is input to the motion compensation memory 4 having a delay amount. The operation of the motion compensation memory 4 is the same as that of the motion compensation memory 9 described above except that the motion compensation amount is twice the motion vector V, and the delay amount is as described in (1) above. It can be easily inferred from the formula.

The subtracter 5 calculates the difference between the input signal 100 of the present apparatus and the output of the motion compensation memory 4 and outputs the result. The output of the subtracter 5 becomes a motion compensation frame difference signal. The absolute value circuit 6 outputs the absolute value of the output of the subtracter 5. The K determination circuit 7 determines the above-described coefficient K based on the output of the absolute value circuit 6.

The processing contents of the K decision circuit 7 may be simply level conversion such that K is increased if the output value of the absolute value circuit 6 is large, or may be found in a conventional image motion detection method. Various techniques may be included. And
These circuits 4 to 7 constitute an interpolation selection determination circuit 8 as a whole.

Next, the operation of the present apparatus will be described with reference to FIG. FIG. 2 shows the interlaced scanned image in time (t)-
This is viewed in a vertical (y) coordinate system, and the white circles in the figure are the positions of the scanning lines generated by interlaced scanning.
The screen is scanned from top to bottom within the same field. Focusing on the scanning line a in FIG. 7A, the signal of the interpolation scanning line, which is the output of the adder 17 in FIG. 1, is created at the position of x shown in FIG.

The motion compensation interpolation circuit 10 follows the value of the motion vector V. For example, when V _y = 2, the scanning line c in FIG. 2A is used, and when V _y = 0 (still image), the scanning line c is used. The interpolation scanning line x is obtained by delaying d.

Further, the intra-field interpolation circuit 14 creates an interpolation scanning line from the scanning lines a and b in FIG.

The interpolation scanning line created in this way,
Although the scanning signal can be sequentially converted by combining both of the original scanning line and the interlaced scanning, in this embodiment, this scanning conversion is not performed, and the vertical filter 21 is applied to the sum of these two. By doing so, the output signal 20
0 has been obtained.

In the vertical filter 21, FIG.
As shown in (1), by applying weighting addition of 1/2 to each of the scanning lines a and x, an output signal indicated by a black circle in FIG. Here, the vertical position of the output signal is an intermediate position between the scanning lines a and x.

FIG. 2B shows a vertical spatial frequency ν (unit: cph, cycles per) of the vertical filter 21.
FIG. 6 shows a frequency response to the image height.

FIG. 3 is a diagram showing the operation principle of the circuit shown in FIG. First, the input signal 100 of the present apparatus is virtually converted into a progressive scanning signal by the motion-compensated progressive scanning conversion circuit 31. In FIG. 1, the circuits denoted by reference numerals 1 to 18 correspond to this portion.

Next, the output signal of the motion compensation type progressive scan conversion circuit 31 is passed through a vertical (reduction) filter 32. In FIG. 1, the circuits 19 to 21 correspond to the vertical filter 3.
It corresponds to 2.

Finally, virtual scanning line thinning is performed by the switch 33, and an interlace signal is output. But,
This thinning is virtual only, and the device shown in FIG. 1 does not include a portion corresponding to the switch 33.

FIG. 4 shows the spatio-temporal spectrum of the signals for the circuits shown in FIGS. Here, (A) ~
The horizontal axis of (D) is the time frequency f (Hz),
The vertical axis indicates ν (cph).

FIG. 4A shows the spectrum of an image to be examined below.

[0039]

[Outside 1]

Represents an image in which a subject having a vertical motion is moving at a speed of V _y = 2. The original spectrum of the image extends linearly from the origin toward the upper left,
From the point of (f, ν) = (60, 0), also toward the upper left, the folded spectrum of the time sampling by the field extends.

[0041]

[Outside 2]

Is a carrier for spatiotemporal sampling by interlaced scanning, and the aliasing component due to the carrier is
It extends from the point to the lower right.

The aliasing spectrum due to the interlace is shown by a dotted line in FIG. 4 and is a component that causes image quality interference (interlace interference) due to the interlace. Of these, the portion present in the reduction of ν is the most visually noticeable interference component, and is generally called interline flicker.

By performing motion-compensation-type scanning line interpolation on this image, it is possible to remove a dotted line component that causes interlace interference. This situation is shown in FIG. The shaded portion in the figure is a rejection area when the motion compensation interpolation processing is viewed as filter processing, and the signal inside the hatched area is cut.

Although only the solid line spectrum remains as a result of the processing shown in FIG. 4B, the spectrum is further subjected to vertical filter processing. This situation is shown in FIG. The magnitude response of the vertical filter is shown in FIG.
In the example shown in FIG. 2B, it is as shown in FIG.

[0046]

[Outside 3]

Is a stop zone. Although this characteristic attenuates moderately with respect to v, as shown in another embodiment described below, this characteristic can be made steeper by changing the vertical filter.

As a result of the processing shown in FIG. 4C, as a (virtual) progressive scanning signal component,

[0049]

[Outside 4]

Remain. When this component is considered as an interlaced scanning signal (virtual scan conversion from sequential to interlaced), the spectrum is as shown in FIG. Compared to FIG. 4A, which is the original spectrum,

[0051]

[Outside 5]

Remains for

[0053]

[Outside 6]

It can be seen that has been removed. This makes it possible to improve the image quality of the interlaced image.

In the circuit shown in FIG. 1, when K = 1 because of a detection error of a motion vector or the like, and the intra-field interpolation is selected, the operation as shown in FIG. 5 results. That is, as shown in FIG. 5A, the output signal of the circuit shown in FIG. 1 is weighted by 3/4 for the scanning line a and 1/4 for the scanning line b. The result is the addition.

In this case, the frequency response of the output signal to the input signal has the characteristic of K = 1 in FIG.
Interlace interference is hardly eliminated. When the motion compensation interpolation is selected (K = 0), the frequency response does not deteriorate due to the interpolation, and the input / output characteristics are the characteristics themselves shown in FIG. 2B. This is shown by the dotted line in FIG.

Embodiment 2 FIG. 6 shows a part of a second embodiment of the present invention. In the present embodiment, by replacing the vertical filter 21 shown in FIG. 1 with the filter shown in FIG. 6, it is possible to realize a steep characteristic that is more preferable for cutting the interference component.

In FIG. 6, the interpolation input and the direct input correspond to the respective inputs of the vertical filter 21 shown in FIG. The interpolation input is input to the 1H delay circuit 41,
Delayed by one line. Direct input is 1H delay circuit 4
It is input to a cascade connection circuit consisting of 2 to 44.

Direct input and delay circuits 42, 41, 4
Each alpha _-2 coefficient units 45 each output of 3,44, α _-1 coefficient unit 46, alpha ₀ coefficient unit 47, alpha ₁ coefficient unit 48, is input to the alpha ₂ coefficient multiplier 49. Here, α _{-2 to} α ₂ represent the impulse response of the vertical filter. That is, these circuits constitute a fifth-order vertical filter. And each coefficient unit 45-
The output of 49 is added in the adder 50 to become an output signal of the present filter.

FIG. 7A is a diagram for explaining the operation of the filter shown in FIG. The notation is the same as that of FIG. 2A, and constitutes a vertical filter composed of five upper and lower scanning lines around an interpolation scanning line x. The position of the created output signal in the vertical direction is the same as the position of the interpolation scanning line.

In the present embodiment, as the order of the vertical filter increases, as shown by the solid line in FIG.

[0062]

[Outside 7]

As compared with the above, steep characteristics can be realized. As a result, in the output image, the interlace interference can be further reduced, and the resolution degradation of the image can be reduced.

Further, if the order of the filter is further increased than that shown in FIG. 6, the characteristics can be further improved.

Embodiment 3 FIG. 8 shows a third embodiment of the present invention. The input / output signals shown in the figure are the same as the input / output signals shown in FIG.

The input signal 300 is supplied to the motion vector generator 5
1, an interpolation selection determination unit 52, a motion compensation memory 53 having a delay amount of (263H + V), and a motion compensation memory 54 having a delay amount of (262H + V).

Here, the motion vector generating section 51 and the interpolation selection judging section 52 may have the same configuration as, for example, the motion vector generating circuit 3 and the interpolation selection judging circuit 8 shown in FIG.
The motion compensation memories 53 and 54 are the same as the motion compensation memory 9 shown in FIG.

The output of the motion compensation memory 53, the input signal 300 of the present apparatus, and the output of the motion compensation memory 54 are 1 /
The signals are input to a 4-coefficient unit 55, a 1 / 2-coefficient unit 56, and a 1 / 4-coefficient unit 57, and are multiplied by the respective coefficients. These coefficient units 55
The outputs of .about.57 are added in an adder 58.

As described above, the above-described units 55 to 58 constitute a vertical (low-pass) filter as a whole. The output of the adder 58 is input to a (1-K) coefficient unit 60, and the input signal 300 of the present apparatus is input to a K coefficient unit 61. The operation of the mixing circuit 63 including these coefficient units 60 and 61 and the adder 62 is the same as that of the mixing circuit 18 shown in FIG. Then, the output signal 400 is output from the adder 62.

FIG. 9A is an explanatory diagram showing the operation of the circuit shown in FIG. 8, and the notation in this diagram is the same as that in FIG. 2A. FIG. 9A shows the case of the movement of V _y = 2.

The output of the motion compensation memory 53 shown in FIG. 8 is an interpolated scanning line e generated by delaying the scanning line c in FIG. 9A, and similarly, the output e 'of the motion compensation memory 54. It is.

If the signal K shown in FIG. 8 is K = 0, the output signal of the present apparatus has coefficients of 1/4, 1/2 and 1/4 applied to the scanning lines e, a and e ', respectively. It is created as an output of the vertical filter 59 multiplied and added. On the other hand, if K = 1, the scanning line a becomes an output signal as it is, as is apparent from FIG.

As described above, in the present apparatus, when K = 1 due to an erroneous detection of a motion vector or the like, no processing is performed on the input signal 300 of the present apparatus. Thereby, unnecessary degradation of resolution can be avoided.

Regardless of the value of K, the vertical position of the output signal to be created is the same as the position of the scanning line a, that is, the input signal.

FIG. 9B shows the vertical spatial frequency characteristics of the present apparatus when K = 0 and K = 1.

Other Embodiments In addition to the above-described embodiments, the present invention can be applied to a 625-line system and an HDTV. Also, by increasing the number of motion vectors supplied from the motion compensation memory and the motion vector generation circuit, motion compensation can be performed on a plurality of motions (including stillness (V = 0)) in the same image portion. It can be extended as follows.

Further, by performing the motion compensation interpolation from both sides in the time direction, it is possible to obtain better time-frequency characteristics.

[0078]

As described above, according to the present invention, the interlaced scan image signal is virtually sequentially scanned and converted by using the motion compensation technique, and thereafter, the signal is passed through the vertical low-pass filter. Can remove the image quality disturbance based on the interlaced scanning while keeping the interlaced scanning, so that the image quality can be improved economically.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a diagram for explaining the operation of the embodiment shown in FIG. 1;

FIG. 3 is a diagram schematically showing the operation principle of the embodiment shown in FIG.

FIG. 4 is a spatiotemporal spectrum diagram showing the operation of the embodiment shown in FIG.

FIG. 5 is a diagram for explaining the operation of the embodiment shown in FIG. 1;

FIG. 6 is a diagram showing a second embodiment of the present invention.

FIG. 7 is a diagram showing the operation of the embodiment shown in FIG. 6;

FIG. 8 is a block diagram showing a third embodiment of the present invention.

FIG. 9 is a diagram for explaining the operation of the embodiment shown in FIG. 8;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Motion vector detection circuit 2 Motion vector value correction circuit 3 Motion vector generation circuit 4 Motion compensation memory 5 Subtractor 6 Absolute value circuit 7 K decision circuit 8 Interpolation selection judgment circuit 9 Motion compensation memory 10 Motion compensation interpolation circuit 11 1H delay circuit 12 Adder 13 1/2 coefficient unit 14 In-field interpolation circuit 15 (1-K) coefficient unit 16 K coefficient unit 17 Adder 18 Mixing circuit 19 Adder 20 1/2 coefficient unit 21 Vertical (low-pass) filter

Claims (2)

(57) [Claims] 1. An intra-field interpolation circuit for inputting a 2: 1 interlaced image signal and interpolating a scanning line by intra-field signal processing, and a motion for outputting a motion amount of an image in the image signal as a motion vector. A vector detection circuit, a motion compensation interpolation circuit for compensating a delay amount corresponding to one field period by a delay amount related to the motion vector, applying the delay to the image signal, and interpolating a scanning line. A mixing circuit for mixing output signals of the intra-field interpolation circuit and the motion compensation interpolation circuit; and a delay amount corresponding to one frame period, a delay amount related to the motion vector being compensated, and Based on the motion-compensated inter-frame difference signal obtained by obtaining a difference between the signal obtained by performing the delay on the signal and the image signal, the mixed signal is obtained. An interpolation selection determination circuit for determining a mixing ratio in the circuit; and a vertical reduction filter that receives an output signal of the mixing circuit and the image signal and outputs a 2: 1 interlace scanning signal from which interlace interference has been removed. A device for removing interlace interference, characterized in that: 2. A motion vector detecting circuit for outputting a motion amount of an image in a 2: 1 interlaced scanned image signal as a motion vector, a delay associated with the motion vector with respect to a delay amount corresponding to one field period. A first motion compensation interpolator for compensating for a delay amount by an amount and interpolating a scan line by applying the delay to the image signal; and a delay amount related to the motion vector with respect to a delay amount corresponding to one field period. A second motion compensation interpolation circuit for compensating for the delay amount only, applying the delay to the image signal, and interpolating a scanning line; output signals of the first and second motion compensation interpolation circuits;
A vertical reduction filter for receiving the image signal, multiplying each input by a predetermined coefficient, and adding the result; and mixing the output signal of the vertical reduction filter and the image signal to remove interlace interference. 1: a mixing circuit that outputs an interlaced scanning signal; and the motion vector for a delay amount corresponding to one frame period.
Compensation for the delay amount by the delay amount related to the
The difference between the signal obtained by applying the delay to the signal and the image signal
From the motion-compensated inter-frame difference signal obtained by
The interpolation selection for determining the mixing ratio in the mixing circuit
An interlace interference removal device, comprising: a selection decision circuit .