JPH07130705A - Dry etching apparatus - Google Patents

Abstract

PURPOSE:To prevent a wiring layer that covers a semiconductor substrate from thinning off, by forming a lower plate-shaped electrode made of aluminum carbide. CONSTITUTION:In a pressure-reducible reactive chamber 1 made of quartz, a semiconductor wafer 4 is put on a wafer table 5, in which a lower electrode 6 is provided with an insulator layer 7 in between, while the counter electrode 8 is electrically grounded. The lower electrode 6 is connected to a high-frequency oscillator 9, and a high-frequency voltage is applied between both electrodes under low pressure in a reactive-gas atmosphere to etch a workpiece physically and chemically. The lower electrode 6 is made of aluminum carbide including a small amount of impurity, and the counter electrode 8 is made of alumina. Then, a deterioration in interconnection layer or a lowering in reliability can be prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a material for an electrode material of a dry etching apparatus for semiconductors, and is particularly suitable for etching Al or Al alloy.

[0002]

2. Description of the Related Art A semiconductor device is manufactured by a pre-process for manufacturing a device by introducing and diffusing impurities into a semiconductor substrate made of a single crystal, and a post-process for assembling the device into, for example, a lead frame. Prior to the step of introducing and diffusing impurities, a well-known photolithography step is required for so-called microfabrication corresponding to the model and for the wiring and electrode patterning step, etc. prior to the step of introducing and diffusing impurities.

RIE (Reactive Ion Etc), which is capable of anisotropic etching in recent fine processing and patterning processes, etc.
hing) device is generally used, and this will be described with reference to FIGS. 3 to 6. Plasma etching (cylindrical type), reactive ion etching (parallel plate type plasma etching), and ion etching are known as dry etching for semiconductors that prevent so-called undercutting caused by sneaking of an etching solution in wet etching. The dry etching apparatus for semiconductors according to the invention uses a parallel plate type plasma etching method.

That is, high-frequency power is supplied between electrodes in a reduced pressure atmosphere of a reactive gas such as CF ₄ to cause glow discharge, and a sample is etched by a chemical reaction by active radicals such as F generated in plasma. Is the way. However, in addition to the chemical reaction by radicals, the sample is etched not only by the ions accelerated in the dark field of the cathode but also by the sputtering caused by collision with the sample, resulting in a mixed system of both physical and chemical mechanisms. It has been known.

As shown in FIG. 3, the structure of the quartz reaction chamber 20, which can be decompressed, has an exhaust hole 21 which is naturally connected to a pump and a reactive gas inlet 22 which is provided above the reaction chamber 20. Wafer table 2 arranged below quartz reaction chamber 20
A lower electrode 25 on which a semiconductor wafer 23, which is a sample, is placed, is installed on the surface of No. 4 in some cases, but an insulating layer 26 may be interposed as shown in FIG. Provided and electrically grounded. Both electrodes 2
Plasma is generated between 5 and 27 and ions and radicals are also generated to etch the sample by both the physical and chemical mechanisms as described above. A high frequency oscillator 28 is electrically connected to the lower electrode 25.

The lower electrode 25 and the counter electrode 27 are made of aluminum oxide, that is, alumina, a tetrafluoroethylene polymer film is attached to the lower electrode 25 on which the sample is placed, and the semiconductor substrate which is the sample is resisted at a predetermined place according to a conventional method. The sample is etched by a physical mechanism and a chemical mechanism in the state of being coated with.

FIG. 4 is a diagram showing the outline of a dry etching apparatus for semiconductors in which a tetrafluoroethylene polymer film is attached adjacent to the lower electrode 25, and FIGS. 5 and 6 constitute a semiconductor wafer 23. FIG. 5 is a diagram showing a state of deterioration of a wiring layer 30 covering a wiring layer 29 formed on a semiconductor substrate 28 after an etching step by the semiconductor dry etching apparatus of FIGS. 3 and 4.

[0008]

The reactive ion etching apparatus, that is, the parallel plate type plasma etching apparatus, has the following etching conditions: SiCl ₄ / Cl ₂ / He = 250/30 /
When 150 (ml / min), pressure: 30 Pa, RF power: 300 W, when the electrode is alumina, the aluminum oxide forming the electrode is etched during etching of the semiconductor substrate coated with the resist to generate oxygen. The reaction between oxygen and the resist component thins the wiring layer formed on the semiconductor substrate after etching. Further, the reaction product deposited on the aluminum wiring reacts with oxygen to thin the wiring layer, and the cross section becomes an inverse taper shape, which causes a problem in reliability and cannot be improved even if the process conditions are changed.

On the other hand, when the tetrafluoroethylene polymer is installed on the electrode, the above-mentioned deterioration of the wiring shape can be prevented, but the deterioration of the tetrafluoroethylene polymer is so severe that the replacement frequency increases and the parallel plate type plasma etching is performed. The operation rate of the equipment is reduced.

The present invention is made under such circumstances, and provides a novel dry etching apparatus for semiconductors, which particularly improves the operating rate.

[0011]

[Means for Solving the Problems] A reaction chamber capable of decompressing, a gas introduction hole attached to the reaction chamber, a high-frequency oscillator arranged outside the reaction chamber, and arranged horizontally in the reaction chamber in parallel with each other. For a semiconductor according to the present invention, a plate electrode to be formed, an insulating layer disposed adjacent to the plate electrode, and a lower plate electrode electrically connected to the high frequency oscillator and made of aluminum carbide. There is a feature of dry etching equipment.

[0012]

In the parallel plate type plasma etching apparatus according to the present invention, that is, the semiconductor dry etching apparatus, if the lower plate electrode is made of aluminum carbide, the wiring layer covering the semiconductor substrate is not thinned. It was completed based on the knowledge of, and improves the operation rate.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment according to the present invention will be described with reference to FIGS. A semiconductor dry etching apparatus according to the present invention dry-etches a semiconductor substrate coated with a resist by a parallel plate type plasma etching method. In the dry etching, high-frequency power is supplied between electrodes in a reduced pressure atmosphere of a reactive gas such as CF ₄ to cause glow discharge, and a sample is etched by a chemical reaction by active radicals such as F generated in plasma. In addition to the chemical reaction by the radicals, the sample is also etched by the sputtering caused by the ions accelerated by the electric field in the cathode dark part colliding with the sample, resulting in a mixed system of both physical and chemical mechanisms.

As shown in FIG. 1, the structure of the reaction chamber 1 made of quartz, which can be decompressed, is naturally provided with an exhaust hole 2 communicating with a pump and a gas inlet 3 in the reaction chamber 1. A lower electrode 6 is placed on a wafer table 5 on which a semiconductor wafer 4 as a sample is placed, with an insulating layer 7 interposed, for example, a tetrafluoroethylene polymer film, and the other counter electrode 8 is electrically grounded. To do. Of course, the lower electrode 6 is electrically connected to the high frequency oscillator 9, and CF ₄
In a depressurized atmosphere of a reactive gas such as, high-frequency power is supplied between both electrodes to cause glow discharge, plasma is generated between both electrodes, and ions and radicals are also generated, resulting in both physical and chemical The sample is etched by the mechanism.

The lower electrode 6 is made of aluminum carbide (Al ₄ C ₃ ) containing a small amount of impurities, and the counter electrode 8 is made of aluminum oxide, that is, alumina. A tetrafluoroethylene polymer film 7 was attached to the lower electrode 6 on which the sample was placed, and the semiconductor substrate 10 (see FIG. 2) constituting the sample semiconductor wafer 4 was coated with a resist 11 at a predetermined position according to a conventional method. In this state, etching is performed by both the physical and chemical mechanisms described above.

Since this etching is performed as a part of the known lithography process, for example, when forming electrodes on a device formed on the semiconductor substrate 5, that is, an active element or a passive element, or a wiring layer 12 (which is electrically connected to the electrodes). (See FIG. 2).

Therefore, under the resist covering the semiconductor substrate 5, for example, Al or Al alloy (Al-Si, Al-Si1Vol% -Cu0.5V) is used.
ol%), such as an electrode (not shown) or eg Al or Al
Wiring layer 12 such as alloy (Al-Si, Al-Si1Vol% -Cu0.5Vol%)
Are formed.

However, even if the semiconductor substrate 5 having such a structure is placed on the lower electrode 7 made of aluminum carbide and dry etching, that is, anisotropic etching is carried out, as shown in FIG. The effectiveness of the dry etching apparatus for semiconductors according to the present invention is clear without making the layer 12 thin.

The etching conditions in this case are the flow rate SiCl ₄ / C
l ₂ / He: 250/30/150 (ml / min), pressure: 30Pa, RF power: 300 W, etching target is Al-Si1Vol% -C
u0.5Vol% Al-Si alloy. Further, even if a tetrafluoroethylene polymer is attached as the insulating layer 8 adjacent to the lower electrode 7, its deterioration does not occur and the replacement work is eliminated.

[0020]

The dry etching apparatus for semiconductors according to the present invention has a unique material, namely aluminum carbide (Al ₄ C
By forming the lower electrode with ₃ ), it is possible to prevent the deterioration of the wiring layer and the deterioration of reliability that occur in the conventional alumina electrode. This suppresses that oxygen generated during etching is given to the wiring shape, and the work of exchanging the tetrafluoroethylene polymer is eliminated, so that the operating rate of the dry etching apparatus for semiconductors can be improved more than before.

[Brief description of drawings]

FIG. 1 is a sectional view schematically showing a dry etching apparatus for semiconductors according to the present invention.

FIG. 2 is a diagram showing a state after dry etching of a wiring layer in which resist layers are stacked.

FIG. 3 is a cross-sectional view showing an outline of a conventional semiconductor dry etching apparatus.

FIG. 4 is a sectional view showing an outline of another conventional dry etching apparatus for semiconductors.

FIG. 5 is a diagram showing a deteriorated state of a wiring layer on which a resist layer etched by the semiconductor dry etching apparatus of FIG. 3 or 4 is stacked.

FIG. 6 is a diagram showing another deteriorated state of the wiring layer in which the resist layers etched by the semiconductor dry etching apparatus of FIG. 3 or 4 are stacked.

[Explanation of symbols]

 1, 20: Reaction chamber, 2, 21: Exhaust hole, 3, 22: Gas introduction hole, 4, 23: Semiconductor wafer, 5, 24: Wafer table, 6, 25: Lower electrode, 7, 26: Insulator layer, 8, 27: Counter electrode, 9, 28: High frequency oscillator, 10, 28: Semiconductor substrate, 11, 30: Resist, 12, 29: Wiring layer.

Claims (1)

[Claims] 1. A reaction chamber capable of depressurizing, a gas introduction hole attached to the reaction chamber, a high-frequency oscillator arranged outside the reaction chamber, and a plate-like member arranged horizontally in the reaction chamber in parallel with each other. A semiconductor dry electrode comprising an electrode, an insulating layer disposed adjacent to the plate electrode, and a lower plate electrode electrically connected to the high frequency oscillator and made of aluminum carbide. Etching equipment.