JPH11283963A - Semiconductor manufacturing device and semiconductor device manufacturing method using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the generation of abnormal discharges due to an electrode or the like at the etching of a silicon oxide film or the like and to eliminate foreign substances which are generated by the abnormal discharges or the like. SOLUTION: This semiconductor manufacturing device is one of a structure, wherein an upper electrode (electrode) 1 having holes 5 for gas feed is installed on a wafer, a treatment of the wafer is performed and in this case, the electrode 1 has a silicon electrode plate 2 and an aluminium electrode plate 3 and the plates 2 and 3 are fixed by an alloy film 4 which is present between the plates 2 and 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus and a method of manufacturing a semiconductor device using the same.
In manufacturing a semiconductor device, when a silicon oxide film is etched, abnormal discharge or the like due to an electrode can be prevented, and a semiconductor manufacturing apparatus provided with an electrode capable of eliminating foreign matter generated by the abnormal discharge or the like and a semiconductor device using the same And a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art The present inventor has studied a silicon oxide film etching apparatus used in a semiconductor device manufacturing technique. The following is a technique studied by the present inventors, and the outline is as follows.

That is, in a parallel plate type RIE (Reactive Ion Etching) apparatus as a dry etching apparatus for a silicon oxide film used in a semiconductor device manufacturing technique, an RF chamber is provided in an etching chamber (etching chamber).
(Radio Frequency) An electrode to which electric power is applied and which has a hole (hole) for gas supply is used.

In this case, as the electrodes, a silicon (Si) electrode plate having a thickness of 10 mm and an aluminum (Al) electrode plate having a thickness of 10 mm are fixed to a peripheral portion thereof using a plurality of bolts. Of the embodiment.

The reason why the aluminum electrode plate is fixed to the silicon electrode plate is that the silicon electrode plate has a thermal conductivity (148).
w / m k) and a high resistivity (3.4 × 10E6 Ωm), so that aluminum made of a material having a high thermal conductivity (237 w / mk) and a low resistivity (2.66 × 10E6 Ωm) The silicon electrode plate is held by the electrode plate.

References describing the etching apparatus include, for example, “Semiconductor Manufacturing Equipment Glossary”, p184, published by Nikkan Kogyo Shimbun on September 28, 1991.
To p.194.

[0007]

However, the present inventor has found that the above-described etching apparatus has various problems as described below.

[0008] That is, the electrodes in the above-described etching apparatus have an uneven spacing between the silicon electrode plate and the aluminum electrode plate, and discharge is likely to occur.
There is a problem in that it is a source of foreign matter when etching the silicon oxide film.

According to the study of the present inventor, as a result of analysis from the distance between the electrodes and from the wafer surface, a foreign substance mainly composed of Al-F (combination of aluminum and fluorine) was detected. It is a source of foreign matter.

Further, since there is a wafer for etching just below the electrodes, there is a problem that foreign matter adheres to the wafer, which lowers the production yield of semiconductor devices.

Further, the electrodes are such that the silicon electrode plate and the aluminum electrode plate are fixed to the periphery thereof using a plurality of bolts, so that the silicon electrode plate and the aluminum electrode plate are separated. Since it is mechanically fixed, the thickness of the silicon electrode plate cannot be reduced, so that the cost of the silicon electrode plate is high and the electrodes are expensive.

An object of the present invention is to provide an electrode which can prevent abnormal discharge and the like caused by an electrode when etching a silicon oxide film when manufacturing a semiconductor device, and can eliminate foreign matter generated by the abnormal discharge and the like. And a semiconductor device manufacturing method using the same.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0014]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, (1). The semiconductor manufacturing apparatus of the present invention is provided with an electrode having a hole for gas supply on a wafer, and is a semiconductor manufacturing apparatus for processing a wafer, wherein the electrode has a silicon electrode plate and an aluminum electrode plate. Wherein the silicon electrode plate and the aluminum electrode plate are fixed with an alloy layer present between them.

(2). The method for manufacturing a semiconductor device according to the present invention includes a process for etching a silicon oxide film formed on a surface of a wafer by using a semiconductor manufacturing apparatus according to the above item (1), using a wafer process. It has a step of manufacturing the device.

[0017]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and redundant description will be omitted.

(Embodiment 1) FIG. 1 is a schematic side view showing a partially sectioned etching apparatus according to Embodiment 1 of the present invention. FIG. 2 is an enlarged schematic plan view showing the electrodes in FIG. FIG. 3 is a sectional view taken along line AA in FIG.
It is an expanded sectional view which expands and shows the arrow cross section.

As shown in FIG. 1, the etching apparatus (semiconductor manufacturing apparatus) according to the present embodiment is a parallel plate type RIE apparatus. An electrode having a hole, hereinafter referred to as an upper electrode) 1.

In the etching apparatus of the present embodiment, components other than the upper electrode 1 are the same as those of a conventional etching apparatus, and an etching apparatus having various types of components can be applied. it can.

In FIG. 1, reference numeral 6 denotes an inner wall of the etching apparatus, 7 denotes a quartz susceptor for installing the upper electrode 1, and 8 denotes an RF electrically connected to the upper electrode 1.
Reference numeral 9 denotes a power supply, and 9 denotes a gas supply body.

Reference numeral 10 denotes a quartz susceptor for installing the lower electrode 11, reference numeral 12 denotes a PF power supply electrically connected to the lower electrode 11 via a capacitor 13, and reference numeral 14 denotes an electrostatic chuck 15. Reference numeral 16 denotes a wafer push-up pin, and reference numeral 17 denotes a cooling gas pipe.

Further, reference numeral 18 denotes a gate valve.
Is an electromagnet, and 20 is an exhaust boat.

The operation of the etching apparatus of this embodiment is as follows.
A gas used for etching is introduced from the gas supply body 9 into a vacuum etching chamber (etching chamber) through a gas inlet. In this case, the pressure of the etching chamber in a vacuum state is adjusted to several tens to several hundreds mTorr. The wafer to be etched is the lower electrode 11
It is installed above and operates at a frequency of 800 kHz to 80 MHz.
By the RF power supplies 8 and 12 having a power of about 1 to 3 kW,
A power of about 1 to 3 kW is applied to the lower electrode 11 and the upper electrode 1 independently or simultaneously to generate plasma, and a process of etching the wafer 14 is performed.

As shown in FIGS. 2 and 3, the upper electrode 1 installed in the etching apparatus of the present embodiment has a silicon electrode plate 2 having a thickness of 1.5 mm and an aluminum electrode plate having a thickness of 10 mm. An alloy layer 4 of silicon and aluminum is formed at a contact portion between the silicon electrode plate 2 and the aluminum electrode plate 3 by heat treatment, and the silicon electrode plate 2 and the aluminum electrode plate 3 are fixed by the alloy layer 4. It is characterized by the fact that

The upper electrode 1 installed in the etching apparatus of the present embodiment has a circular flat surface having a diameter of 300 mm, and supplies gas (gas blowing) to a central portion other than a peripheral 40 mm region. Hole 1.5mm in diameter as hole for use
Are formed in large numbers. As an example, the distance (pitch) between adjacent holes 5 is set to 6.25 mm, and 35 holes 5 are arranged on one planar line of the upper electrode 1. Note that various values can be applied to the diameter of the hole 5 and the distance between the adjacent holes 5 according to design specifications.

Next, a method of manufacturing the upper electrode (electrode) 1 installed in the etching apparatus of the present embodiment will be described.

First, as shown in FIG.
A silicon electrode plate 2 having a circular flat surface and a thickness of 1.5 mm is formed.

In this case, after the silicon electrode plate 2 is polished, a degreasing treatment is performed using an organic cleaning method using an organic solvent such as methanol, and then purified hydrogen acid having a concentration of 1% is used. After the silicon electrode 2 is cleaned using the inorganic cleaning method used, drying is performed. Further, as a result of the study by the present inventors, a thin film having a thickness of 1 to 5 mm can be applied to the silicon electrode plate 2 according to the design specifications.

Next, as shown in FIG.
An aluminum electrode plate 3 having a circular flat surface and a thickness of 10 mm is formed. In this case, as a result of the study by the inventor,
The thickness of the aluminum electrode plate 3 may be as thin as 10 mm or 10 mm or more, such as 15 mm, depending on the design specifications.

In this case, after the aluminum electrode plate 3 is electrolytically polished, a degreasing treatment is performed using an organic cleaning method using an organic solvent such as methanol.

Then, the silicon electrode plate 2 is bonded to the aluminum electrode plate 3 by contacting the front surface of the silicon electrode plate 2 with the back surface of the aluminum electrode plate 3 with a bonding material interposed therebetween (FIG. 6). . In this case, upper electrode 1 in a state where silicon electrode plate 2 and aluminum electrode plate 3 are bonded to each other is formed.

Next, after setting the upper electrode 1 in a state where the silicon electrode plate 2 and the aluminum electrode plate 3 are bonded to each other, the upper electrode 1 is placed in an atmosphere of nitrogen or oxygen.
A heat treatment is performed for several minutes using a temperature of 0 ° C. to 400 ° C. (which is a relatively low temperature), and in the region of the upper electrode 1 where the silicon electrode plate 2 and the aluminum electrode plate 3 are bonded to each other, 1 alloy layer 4 of silicon and aluminum
It is formed with a film thickness of 0 to 50 nm (FIG. 7).

Thereafter, a large number of through holes 5 for gas supply are formed in the upper electrode 1 by using a mechanical method using a device such as a drill.

In this case, as another mode of the present embodiment, fixing through holes for fixing the silicon electrode plate 2 and the aluminum electrode plate 3 around the upper electrode 1 are formed in four to four holes.
After forming about 16 bolts, bolts are set in the through holes.

Next, the upper electrode 1 is subjected to a degreasing treatment using an organic washing method using an organic solvent such as methanol, etc., and then an inorganic washing method using a 1% concentration of purified hydrogen acid or the like. Then, the manufacturing process of the upper electrode 1 is completed by washing and drying the upper electrode 1 (FIGS. 2 and 3).

As another mode of the present embodiment, a refractory metal film (Ti, W, Mo, or the like) or a refractory metal compound (TiN, TiW, or the like) is formed in a region of the aluminum electrode plate 3 where the silicon electrode plate 2 is bonded. Using an aluminum electrode plate 3 on which a barrier layer containing
By including silicon and the refractory metal, it is possible to prevent the occurrence of unnecessary mutual diffusion of aluminum as the material of the aluminum electrode plate 3 and silicon as the material of the silicon electrode plate 2. it can.

Further, as another mode of the present embodiment, before the step of forming the upper electrode 1 in a state where the silicon electrode plate 2 and the aluminum electrode plate 3 are bonded to each other, the gas supply to the silicon electrode plate 2 is performed. An embodiment employing the step of forming the holes 5 and the step of forming the holes 5 for gas supply in the aluminum electrode plate 3 can be applied.

According to the upper electrode (electrode) 1 installed in the above-described etching apparatus of the present embodiment, the upper electrode 1 in a state where the silicon electrode plate 2 and the aluminum electrode plate 3 are bonded to each other is used for the heat treatment apparatus. After setting, heat treatment is performed, and an alloy layer 4 of silicon and aluminum is formed in a region of the upper electrode 1 where the silicon electrode plate 2 and the aluminum electrode plate 3 are bonded to each other. In addition, the space (gap region) between the silicon electrode plate 2 and the aluminum electrode plate 3 can be eliminated.

Therefore, since abnormal discharge and the like occurring at the interval between the silicon electrode plate 2 and the aluminum electrode plate 3 in the upper electrode (electrode) 1 can be prevented, foreign substances caused by abnormal discharge and the like can be completely prevented. Also,
Since the loss of power can be reduced, the etching characteristics can be stabilized, so that a highly reliable and high-performance etching process can be performed.

According to the upper electrode (electrode) 1 installed in the etching apparatus of the present embodiment, the silicon electrode plate 2
After setting the upper electrode 1 in a state in which the aluminum electrode plate 3 and the aluminum electrode plate 3 are bonded to each other, heat treatment is performed, and the silicon electrode plate 2 and the aluminum electrode plate 3 in the upper electrode 1 are heat-treated.
The silicon electrode plate 2 and the aluminum electrode plate 3 can be bonded with high precision by forming the alloy layer 4 of silicon and aluminum in the region where the silicon and aluminum electrodes are bonded to each other.

Accordingly, since the thickness of the silicon electrode plate 2 can be reduced to 1 to 5 mm in the state of a thin film, component material costs can be reduced. More specifically, the conventional upper electrode uses a silicon electrode plate having a thickness of 10 mm, and thus requires a component material cost of about 1,000,000 yen. According to (1), since the thickness of the silicon electrode plate 2 can be reduced to 1 to 5 mm in a thin film state, the component material cost can be reduced to about 300,000 yen.

According to the upper electrode (electrode) 1 installed in the etching apparatus of the present embodiment, the refractory metal film (Ti, W, Mo) is formed in the region of the aluminum electrode plate 3 where the silicon electrode plate 2 is bonded. ) Or an aluminum electrode plate on which an alloy film having a high melting point metal (TiN, TiW, etc.) is formed. As the alloy layer 4, silicon as the material of the silicon electrode plate 2 and a high melting point metal film or a high melting point metal are used. By using a material having a high melting point as a material of an alloy film having a metal, unnecessary mutual diffusion of aluminum as a material of the aluminum electrode plate 3 and silicon as a material of the silicon electrode plate 2 is prevented from occurring. Can be prevented.

According to the method of manufacturing the upper electrode (electrode) 1 installed in the etching apparatus of the present embodiment, the upper electrode 1 in a state where the silicon electrode plate 2 and the aluminum electrode plate 3 are bonded to each other is heated. Then, in a nitrogen or oxygen atmosphere, a heat treatment is performed for several minutes at a temperature of 200 ° C. to 400 ° C. (which is a relatively low temperature), and the silicon electrode plate 2 of the upper electrode 1 and the aluminum By using a process of forming an alloy layer 4 of silicon and aluminum with a film thickness of 10 to 50 nm in a region where the electrode plate 3 is bonded, a simple and easy manufacturing process is performed, and a highly accurate process is achieved. The upper electrode (electrode) 1 can be manufactured with a high manufacturing yield.

According to the etching apparatus (semiconductor manufacturing apparatus) of the present embodiment, abnormal discharge or the like that occurs at the interval between the silicon electrode plate 2 and the aluminum electrode plate 3 in the upper electrode (electrode) 1 can be prevented, thereby causing abnormal discharge. For example, a foreign substance generated by the above can be completely prevented. Further, since the loss of power can be reduced, the etching characteristics can be stabilized, so that a highly reliable and high-performance etching process can be performed.

According to the etching apparatus (semiconductor manufacturing apparatus) of the present embodiment, the foreign matter from the upper electrode (electrode) 1 can be completely prevented, so that the foreign matter can be removed by the etching apparatus after the etching process. The cleaning process can be reduced. Specifically, the conventional number of washings of about 15 can be reduced to 10 times of washing.

Therefore, according to the etching apparatus (semiconductor manufacturing apparatus) of the present embodiment, the time between each etching process and the number of cleaning apparatuses introduced can be reduced.

(Second Embodiment) FIG. 8 is a cross-sectional view showing a manufacturing process of a semiconductor device according to a second embodiment of the present invention. The method of manufacturing a semiconductor device according to the present embodiment uses a MOSF
ET (Metal Oxide Semiconductor Field Effect Trans
is a method of manufacturing a semiconductor integrated circuit device having an istor). The method for manufacturing the semiconductor device according to the present embodiment will be described with reference to FIG.

First, a field insulating film 2 made of a silicon oxide film is formed on a device isolation region of a semiconductor substrate (wafer) 21 made of, for example, p-type silicon single crystal by using a thermal oxidation process.
Form 2 Next, a MOSFET is formed in the element formation region of the semiconductor substrate 21.

That is, after a field insulating film 22 made of a silicon oxide film is formed in a device isolation region of a semiconductor substrate (wafer) 21 by thermal oxidation,
A gate insulating film 2 made of, for example, a silicon oxide film
3, a polysilicon film containing, for example, phosphorus as an impurity is formed thereon as a gate electrode 24, and an insulating film 25 made of, for example, a silicon oxide film is formed thereon. And a selective etching technique to form a pattern such as a gate electrode.

Thereafter, the CVD is performed on the semiconductor substrate 21.
After forming a silicon oxide film (insulating film) using a (Chemical Vapor Deposition) method, a sidewall spacer 26 is formed on the side wall of the gate electrode 24 using a lithography technique and a selective etching technique. Next, an n-type impurity such as phosphorus is ion-implanted into the semiconductor substrate 21 by ion implantation using the gate region including the gate electrode 24 as a mask, and then thermal diffusion processing is performed. Semiconductor region 27 to be
To form

Next, a silicon oxide film (insulating film) 28 is formed on the semiconductor substrate 21 by using the CVD method. In this case, since the gate electrode 24 and the like are formed on the semiconductor substrate 21, a step is formed on the surface of the silicon oxide film 28. Therefore, the polishing of the silicon oxide film 28 is performed using a polishing method. Then, the plane of the silicon oxide film 28 is flattened to form the flattened silicon oxide film 28.

Next, through holes (connection holes) 29 are formed in the silicon oxide film 28 using the lithography technique and the selective etching technique using the etching apparatus of the first embodiment described above.

In this case, foreign matter from the upper electrode (electrode) 1 in the etching apparatus is completely prevented by using the above-described etching apparatus of the first embodiment as a technique for selectively etching the silicon oxide film 28. Since the etching characteristics can be stabilized by being able to reduce the loss of electric power, it is possible to perform a highly reliable and high-performance etching process. Therefore, it is possible to form the through-hole 29 having a fine structure and preventing occurrence of a defect, and to prevent damage to a semiconductor element such as a MOSFET.

Further, even if various gases such as Freon 14 or Freon 23 are applied as a gas for selective etching of the silicon oxide film 28, generation of foreign matter can be prevented.

Next, a tungsten layer (metal layer) for forming a plug is formed on the semiconductor substrate 21 by using the CVD method. In this case, since the through hole 29 is formed in the silicon oxide film 28, a step is formed on the surface of the tungsten layer.

Thereafter, the tungsten layer is polished by using a polishing method, the tungsten layer on the silicon oxide film 28 is removed, and a plug 30 made of the tungsten layer embedded in the through hole 29 is formed.

Next, a copper layer (metal layer) 31 as a wiring layer is formed on the semiconductor substrate 21 by using a sputtering method. In this case, the metal layer as the wiring layer is the copper layer 3
An aluminum layer or the like, which is another mode different from the first embodiment, can be used.

Next, a pattern as a wiring layer is formed on the copper layer 31 using a lithography technique and a selective etching technique, and the copper layer 31 as a patterned wiring layer is formed.
To form

Thereafter, an interlayer insulating film, if necessary, is formed on the semiconductor substrate 21 by using the above-described manufacturing process of the silicon oxide film 28 as the insulating film and the manufacturing process of the copper layer 31 as the wiring layer. After laminating the wiring layers, a passivation film is formed, thereby completing the manufacturing process of the semiconductor integrated circuit device.

According to the above-described method for manufacturing a semiconductor device of the present embodiment, the etching apparatus of the first embodiment is used as a selective etching technique for the silicon oxide film 28. Since the foreign matter from the electrode (electrode) 1 can be completely prevented and the loss of power can be reduced, the etching characteristics can be stabilized, so that a highly reliable and high performance etching process can be performed.

Further, even if various gases such as Freon 14 or Freon 23 are applied as a gas for selective etching of the silicon oxide film 28, generation of foreign matter can be prevented.

Therefore, a through hole 29 having a fine structure and capable of preventing occurrence of defects can be formed, and a semiconductor element such as a MOSFET can be prevented from being damaged, whereby a semiconductor device can be manufactured with a high manufacturing yield. .

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in addition to an etching apparatus for etching a silicon oxide film, a semiconductor manufacturing apparatus of the present invention includes an etching apparatus for an insulating film such as a silicon nitride film and a CVD apparatus for depositing an insulating film and a wiring layer. The present invention can be applied to various semiconductor manufacturing apparatuses such as apparatuses.

The method of manufacturing a semiconductor device according to the present invention
A semiconductor substrate (wafer) for forming a semiconductor element is formed by SOI
(Silicon on Insulator) Substrates such as substrates can be changed, and MOSFET, CMOSF
A method for manufacturing a semiconductor integrated circuit device in which various semiconductor elements such as an ET and a bipolar transistor are combined can be provided.

Further, the method of manufacturing a semiconductor device according to the present invention comprises a MOSFET, a CMOSFET, a BiCMOSFE.
DRAM (Dynamic Random Acc.)
ess Memory), SRAM (Static Random Access Memor)
The present invention can be applied to various methods for manufacturing a semiconductor integrated circuit device having a memory system such as y) or a logic system.

[0068]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). ADVANTAGE OF THE INVENTION According to the semiconductor manufacturing apparatus such as the etching apparatus of the present invention, it is possible to prevent abnormal discharge or the like occurring at the interval between the silicon electrode plate and the aluminum electrode plate in the upper electrode (electrode), thereby completely preventing foreign substances caused by abnormal discharge or the like. can do. Further, since the loss of power can be reduced, the etching characteristics can be stabilized, so that a highly reliable and high-performance etching process can be performed.

According to the semiconductor manufacturing apparatus such as the etching apparatus of the present invention, foreign substances from the upper electrode (electrode) can be completely prevented, so that cleaning processing for removing foreign substances in the etching apparatus after the etching processing can be performed. Can be reduced. Specifically, the conventional number of washings of about 15 can be reduced to 10 times of washing.

Therefore, according to the etching apparatus as the semiconductor manufacturing apparatus of the present invention, the time between each etching process and the number of cleaning apparatuses introduced can be reduced.

(2). According to the semiconductor manufacturing apparatus of the present invention, the upper electrode (electrode) installed on the upper electrode in a state where the silicon electrode plate and the aluminum electrode plate are bonded to each other is set in the heat treatment apparatus, and then heat treatment is performed. By forming an alloy layer of silicon and aluminum in a region where the silicon electrode plate and the aluminum electrode plate are bonded to each other in the upper electrode, the gap between the silicon electrode plate and the aluminum electrode plate (the gap) is formed by the alloy layer. Region) can be removed.

Therefore, it is possible to prevent abnormal discharge or the like occurring at the interval between the silicon electrode plate and the aluminum electrode plate in the upper electrode (electrode), and thus it is possible to completely prevent foreign matters caused by abnormal discharge or the like. Further, since the loss of power can be reduced, the etching characteristics can be stabilized, so that a highly reliable and high-performance etching process can be performed.

(3). According to the semiconductor manufacturing apparatus of the present invention, the upper electrode (electrode) installed on the upper electrode in a state where the silicon electrode plate and the aluminum electrode plate are bonded to each other is set in the heat treatment apparatus, and then heat treatment is performed. By forming an alloy layer of silicon and aluminum in the region where the silicon electrode plate and the aluminum electrode plate are bonded to each other in the upper electrode, the silicon electrode plate and the aluminum electrode plate can be separated with high precision by the alloy layer. Can be glued.

Therefore, since the thickness of the silicon electrode plate can be reduced to a thin film state of 1 to 5 mm, the material cost of parts can be reduced. More specifically, the conventional upper electrode uses a silicon electrode plate having a thickness of 10 mm, and thus requires a component material cost of about 1,000,000 yen. According to), since the thickness of the silicon electrode plate can be reduced to 1 to 5 mm in a thin film state, component material costs of about 300,000 yen can be achieved.

(4). According to the semiconductor manufacturing apparatus of the present invention, the upper electrode (electrode) provided thereon is provided with a high melting point metal film (Ti, W, Mo, etc.) or a high melting point metal in the region of the aluminum electrode plate where the silicon electrode plate is bonded. An aluminum electrode plate on which an alloy film having a metal (TiN, TiW, etc.) is formed is used. As an alloy layer, a material of silicon as a material of a silicon electrode plate and a high melting point metal film or an alloy film having a high melting point metal By using the high melting point metal, it is possible to prevent the occurrence of unnecessary mutual diffusion of aluminum as the material of the aluminum electrode plate and silicon as the material of the silicon electrode plate.

(5). According to the semiconductor manufacturing apparatus of the present invention, as a method of manufacturing the upper electrode (electrode) installed thereon, after setting the upper electrode in a state where the silicon electrode plate and the aluminum electrode plate are bonded to each other, Alternatively, heat treatment is performed for several minutes in an oxygen atmosphere at a temperature of 200 ° C. to 400 ° C. (which is a relatively low temperature), and the silicon electrode plate and the aluminum electrode plate in the upper electrode are bonded to each other. By using a process of forming an alloy layer of silicon and aluminum with a thickness of 10 to 50 nm in the region, a high-precision upper electrode (electrode) can be formed with a high manufacturing yield by a simple and easy manufacturing process. Can be manufactured.

(6). According to the method for manufacturing a semiconductor device of the present invention, as a selective etching technique for a silicon oxide film,
By using the above-described etching apparatus of the present invention, it is possible to completely prevent foreign matter from the upper electrode (electrode) in the etching apparatus and reduce power loss, thereby stabilizing etching characteristics. In addition, a highly reliable and high performance etching process can be performed.

Further, even if various gases such as Freon 14 or Freon 23 are applied as a gas for selective etching of the silicon oxide film, generation of foreign matter can be prevented.

Accordingly, a semiconductor device can be manufactured with a high manufacturing yield by forming a through hole having a fine structure and preventing the occurrence of defects and preventing damage to a semiconductor element such as a MOSFET.

[Brief description of the drawings]

FIG. 1 is a schematic side view showing a partially sectioned etching apparatus according to a first embodiment of the present invention;

FIG. 2 is an enlarged schematic plan view showing an electrode in FIG. 1 in an enlarged manner.

FIG. 3 is an enlarged cross-sectional view showing an enlarged cross section taken along line AA in FIG. 2;

FIG. 4 is an enlarged cross-sectional view illustrating a process of manufacturing an electrode installed in the etching apparatus according to the first embodiment of the present invention.

FIG. 5 is an enlarged sectional view showing a manufacturing process of an electrode provided in the etching apparatus according to the first embodiment of the present invention.

FIG. 6 is an enlarged sectional view showing a manufacturing process of an electrode provided in the etching apparatus according to the first embodiment of the present invention.

FIG. 7 is an enlarged sectional view showing a manufacturing process of an electrode provided in the etching apparatus according to the first embodiment of the present invention.

FIG. 8 is a sectional view illustrating a manufacturing step of the semiconductor device according to the second embodiment of the present invention;

[Explanation of symbols]

 Reference Signs List 1 upper electrode (electrode) 2 silicon electrode plate 3 aluminum electrode plate 4 alloy layer 5 hole 6 inner wall 7 quartz susceptor 8 RF power supply 9 gas supply body 10 quartz susceptor 11 lower electrode 12 PF power supply 13 capacitor 14 wafer 15 electrostatic chuck 16 wafer Push-up pin 17 cooling gas pipe 18 gate valve 19 electromagnet 20 exhaust boat 21 semiconductor substrate (wafer) 22 field insulating film 23 gate insulating film 24 gate electrode 25 insulating film 26 sidewall spacer 27 semiconductor region 28 silicon oxide film (insulating film) ) 29 Through hole 30 Plug 31 Copper layer (metal layer)

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Masanori Katsuyama 6-16-16 Shinmachi, Ome-shi, Tokyo 3 In the Device Development Center, Hitachi, Ltd. (72) Inventor Hiroki Nishi 6--16 Shinmachi, Ome-shi, Tokyo 3 Inside Hitachi, Ltd. Device Development Center

Claims (8)

[Claims] 1. A semiconductor manufacturing apparatus in which an electrode having a hole for gas supply is installed on a wafer as an object to be processed, wherein the electrode has an aluminum electrode plate and a silicon electrode plate, An aluminum electrode plate and the silicon electrode plate are fixed by an alloy layer interposed therebetween. 2. The semiconductor manufacturing apparatus according to claim 1, wherein said silicon electrode plate has a thickness of 1 to 5 mm, and said alloy layer contains silicon and aluminum. apparatus. 3. A semiconductor manufacturing apparatus in which an electrode having a hole for gas supply is provided on a wafer as an object to be processed, wherein the electrode has an aluminum electrode plate and a silicon electrode plate, An aluminum electrode plate and said silicon electrode plate are fixed by a barrier layer and an alloy layer interposed therebetween. 4. The semiconductor manufacturing apparatus according to claim 3, wherein said silicon electrode plate has a thickness of 1 to 5 mm, said barrier layer contains a high melting point metal or a high melting point metal compound, and The semiconductor manufacturing apparatus, wherein the layer contains silicon and aluminum. 5. The semiconductor manufacturing apparatus according to claim 1, wherein the semiconductor manufacturing apparatus is an etching apparatus for etching the wafer. 6. The semiconductor manufacturing apparatus according to claim 5, wherein the etching apparatus is configured to etch a silicon oxide film formed on the wafer. 7. A method for manufacturing a semiconductor device, comprising a step of processing the wafer by using the semiconductor manufacturing apparatus according to claim 1. Description: 8. The method for manufacturing a semiconductor device according to claim 7, further comprising a step of etching a silicon oxide film formed on said wafer.