JPH07113852A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide a semiconductor integrated circuit in which a test pattern for inspection can be generated easily even if the internal circuit has large scale with low generality. CONSTITUTION:An inspection circuit constituted of a multiplexer 11 and a gate circuit, e.g. a buffer 12, which does not depend on the clock is inserted between an input butter 9 and an output butter 10. When a test mode is set by a test pin 8, the group of multiplexer 11 disconnects the internal circuit 14 and connects a simple inspection circuit comprising the buffer 12, and thereby a test pattern for inspection can be generated easily regardless of the detail of the internal circuit 14 thus facilitating the inspection.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit technique and an inspection technique for accurately inspecting a circuit board on which these are mounted.

[0002]

2. Description of the Related Art In recent years, electronic devices have been remarkably reduced in size and weight and have been improved in function, and accordingly, the circuit packaging density and the degree of integration of integrated circuits have been dramatically increased. Therefore, the development of the inspection method of the mounted circuit board is also progressing at the same time. Even when a failure location is specified in a board inspection, if the circuit scale is small and the focus is on analog, it is often possible to specify the waveform by monitoring the signal line during actual operation of the entire circuit, but digitization is also possible. In recent years, as the number of functions has increased and the circuit scale has grown, it has become extremely difficult to identify faulty points in the inspection of the entire circuit, so the inspection method also inspects individual devices from the method of inspecting the entire circuit. We are moving to the method.
For example, an in-circuit tester, which is an apparatus for inspecting a circuit board, has come to have a built-in test pattern data of a relatively small-scale device such as a general-purpose gate IC in order to easily inspect each device. .

[0003]

However, it is generally difficult to obtain a test pattern for an ASIC or the like having a large circuit scale and a large number of input / output pins, or a custom LSI having low versatility, and the test pattern creation work is also required. It requires a long development period and human power because it requires very deep expertise.

The present invention solves the above-mentioned conventional problems, and provides a semiconductor integrated circuit which can be easily inspected even if the circuit scale is large and the versatility is low.

[0005]

In order to achieve this object, the semiconductor integrated circuit of the present invention is provided with a test circuit including a signal switching device and a clock independent buffer between an input buffer and an output buffer. There is.

[0006]

With this configuration, since the internal circuit is replaced with a circuit such as a simple gate during inspection, it is possible to easily create a test pattern, and it is possible to easily inspect even if the internal circuit has a large scale and low versatility. .

[0007]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.

1A to 1C are internal explanatory views of a semiconductor integrated circuit according to an embodiment of the present invention. FIG. 1A illustrates a case where there are fewer output pins than input pins, and FIG. 1C illustrates a case where there are more output pins than input pins. Figure 1
In (a) and (c), 1-4, 16 and 17 are input pins, 5-7 and 18-21 are output pins, 8 is a test pin for switching between a normal mode and a test mode, and 9 is an input buffer. Reference numeral 10 is an output buffer, 11 is a multiplexer, 12 is a buffer for inspection, 13 is also an AND gate for inspection, 14 is an internal circuit used in the normal mode, 15 is a package, 22 is an XOR gate for inspection. , 23 are also inverters for inspection.

In FIG. 1A, in the normal mode, the signals applied to the input pins 1 to 4 pass through the input buffer 9 and the like and enter the complicated internal circuit 14. The output signal from the internal circuit 14 passes through the output buffer 10 etc.
It is output from ~ 7. Here, when the test switching signal is applied to the test pin 8 and the test mode is set, the group of multiplexers 11 disconnects the internal circuit 14, and instead connects the test circuit including the buffer 12 and the like. By this operation, a complicated integrated circuit in the normal mode is replaced with a simple gate IC like the truth table of FIG. 1B by switching to the test mode. This allows the test developer to easily create a test pattern without being influenced by the contents of the internal circuit.

Although FIG. 1C shows the case where the number of output pins is larger than the number of input pins, the internal circuit 14 can be replaced with a simple gate circuit as in FIG. It can be created (see FIG. 1D for the truth table).

However, according to the present embodiment, although the contents of the internal circuit 14 are not inspected in the test mode, the power is turned on and the input buffer and the output buffer are inspected, so that electrostatic breakdown or the like occurs. Defects after the shipment inspection at the LSI manufacturer can be inspected. Since it is possible to inspect the soldering failure of the input / output pins and the test pins, it can be said that the inspection is sufficient as a whole.

As described above, according to this embodiment, as shown in FIG.
As shown in (a), when the test mode is set, the multiplexer 11 group disconnects the internal circuit 14, and instead the buffer 1
Since the inspection circuit composed of 2 or the like is connected, the test pattern can be easily created without being influenced by the contents of the internal circuit 14.

Although the inspection circuit is provided separately from the internal circuit in the embodiment, a part of the internal circuit may be used. It may be directly connected to an input / output multiplexer without using a buffer or the like. Further, in the embodiment, an integrated circuit having an input pin and an output pin has been described, but an integrated circuit having a bidirectional pin can be applied.

[0014]

As described above, the semiconductor integrated circuit of the present invention is provided with a signal switching device and an inspection circuit composed of a clock independent buffer between the input buffer and the output buffer. Since the internal circuit and the inspection circuit can be switched by, the internal circuit can be replaced with a simple gate circuit, etc. during inspection, and a test pattern can be created easily, and the scale of the internal circuit is large and the versatility is low. Even if it is easy to inspect.

[Brief description of drawings]

FIG. 1A is an internal explanatory diagram of a semiconductor integrated circuit according to an embodiment of the present invention. FIG. 1B is a diagram showing a truth table of the explanatory diagram. FIG. 1C is an internal explanatory diagram of a semiconductor integrated circuit according to an embodiment of the present invention. d) Diagram showing the truth table of the same explanatory diagram

[Explanation of symbols]

 1-4, 16, 17 Input pins 5-7, 18-21 Output pins 8 Test pin 9 Input buffer 10 Output buffer 11 Multiplexer 12 Buffer 13 AND gate 14 Internal circuit 15 Package 22 XOR gate 23 Inverter

Continuation of front page (51) Int.Cl. ⁶ Identification code Office reference number FI technical display location H01L 21/822

Claims (1)

[Claims] 1. A signal switching device and a test circuit composed of a buffer that does not depend on a clock are provided between an input buffer and an output buffer, and the signal switching device switches between the internal circuit and the test circuit. And a semiconductor integrated circuit.