JPH07109455B2 - Driving method for electro-optical device - Google Patents

Driving method for electro-optical device

Info

Publication number
JPH07109455B2
JPH07109455B2 JP61007521A JP752186A JPH07109455B2 JP H07109455 B2 JPH07109455 B2 JP H07109455B2 JP 61007521 A JP61007521 A JP 61007521A JP 752186 A JP752186 A JP 752186A JP H07109455 B2 JPH07109455 B2 JP H07109455B2
Authority
JP
Japan
Prior art keywords
liquid crystal
electro
optical device
drive circuit
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61007521A
Other languages
Japanese (ja)
Other versions
JPS62165630A (en
Inventor
直 太田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP61007521A priority Critical patent/JPH07109455B2/en
Publication of JPS62165630A publication Critical patent/JPS62165630A/en
Publication of JPH07109455B2 publication Critical patent/JPH07109455B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243Details of the generation of driving signals
    • G09G2310/0245Clearing or presetting the whole screen independently of waveforms, e.g. on power-on
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02Details of power systems and of start or stop of display operation

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電気光学装置の駆動方法に関し、更に詳しく
は強誘電性液晶を用いたメモリー性を有する電気光学装
置の駆動方法に関する。
The present invention relates to a driving method of an electro-optical device, and more particularly to a driving method of an electro-optical device having a memory property using a ferroelectric liquid crystal.

本発明は、強誘電性液晶を用いたメモリー性を有する電
気光学装置において、電源スイッチがOFFになったこと
を検出し、全画面を消去状態にした後、電源が落ちるよ
うにすることにより、前記電気光学装置の未使用時に表
示を消去状態にしておくものである。
The present invention, in an electro-optical device having a memory property using a ferroelectric liquid crystal, by detecting that the power switch is turned off, after the entire screen is erased, by turning off the power, The display is kept in the erased state when the electro-optical device is not used.

〔従来の技術〕[Conventional technology]

従来、電源を切った後でも表示状態を保持する完全なメ
モリー性を有する電気光学装置は余り無く、エレクトロ
・クロミズムを利用した物が一部時計用に供されただけ
で、そのメモリー性は不十分であり、電源を切れば表示
は徐々に消えてしまうという状態で、未使用時の表示状
態を規制しようという概念はなかった。
Conventionally, there are few electro-optical devices that have a perfect memory property that retains the display state even after the power is turned off. It was sufficient, and the display gradually disappeared when the power was turned off, and there was no concept of restricting the display state when not in use.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

最近、開発が急速に進められている強誘電性液晶を用い
た電気光学装置は優れた電気光学特性を有しており、従
来、大容量のフラットパネルディスプレイとして用いら
れてきたツイスティッドネマチックタイプの液晶電気光
学装置にくらべ、高コントラスト、高速応答及びメモリ
ー性という特徴を持っている。
Recently, the electro-optical device using ferroelectric liquid crystal, which has been rapidly developed, has excellent electro-optical characteristics, and is a twisted nematic type that has been used as a large-capacity flat panel display. Compared with liquid crystal electro-optical devices, it has the features of high contrast, high-speed response, and memory property.

しかし、このメモリー性の為に、電源を切っても直前の
表示状態を表示する、即ち、装置の使用終了後、単に電
源な切るだけでは未使用時に不必要な表示状態を保持す
るという問題点を持っていた。
However, due to this memory property, the previous display state is displayed even when the power is turned off, that is, after the use of the device, simply turning off the power maintains an unnecessary display state when not in use. I had.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は電気光学装置の駆動方法は、対向する基板内面
にそれぞれ走査線と信号線とを有し、該一対の基板間に
メモリー性を有する液晶を挟持してなる液晶パネルと、
該走査線に接続してなる走査線駆動回路と、該信号線に
接続してなる信号線駆動回路と、電源のOFF状態を検出
する検出手段とを少なくとも有する電気光学装置の駆動
方法において、前記検出手段がOFF状態を検出した場
合、その情報に基づいて前記液晶パネルに書き込まれた
表示内容を消去状態とするための消去パルスを印加した
後、前記信号線駆動回路及び前記走査線駆動回路の出力
段を高抵抗とし、前記消去状態を保持した状態で電源電
圧をゼロにすることを特徴とする。
The present invention provides a method of driving an electro-optical device, comprising a liquid crystal panel having a scanning line and a signal line respectively on the inner surfaces of opposed substrates, and holding a liquid crystal having a memory property between the pair of substrates.
A driving method of an electro-optical device comprising at least a scanning line drive circuit connected to the scanning line, a signal line drive circuit connected to the signal line, and a detection unit for detecting an OFF state of a power source, When the detection means detects the OFF state, after applying an erase pulse for making the display content written in the liquid crystal panel into the erased state based on the information, the signal line drive circuit and the scanning line drive circuit The output stage has a high resistance, and the power supply voltage is set to zero in a state where the erased state is maintained.

〔作用〕[Action]

電源スイッチをOFFにした場合、検出回路が電源スイッ
チのOFF状態を検出し、液晶パネルに書き込まれた表示
内容を消去状態とするための消去パルスを液晶に印加し
た後、液晶パネルの対向する電極間を同電位にする、あ
るいは駆動用LSIの出力段の抵抗を高抵抗にするなどし
て、消去状態を保持した状態で、駆動回路内の電源電圧
をゼロにし、未使用時の表示を消去状態にするものであ
る。
When the power switch is turned off, the detection circuit detects the off state of the power switch and applies an erase pulse to the liquid crystal panel to erase the display contents written on the liquid crystal panel. The potential of the drive circuit is made zero by setting the power supply voltage in the drive circuit to zero while maintaining the erased state by setting the same potential or by increasing the resistance of the output stage of the drive LSI. It is to make it a state.

〔実施例〕〔Example〕

〔実施例1〕 第1図は、本発明の一実施例を示す駆動波形と、駆動回
路内の電源電圧の時間的関係を現す図である。ここに示
す駆動波形は、表示画面上の1画素分に相当する走査側
の電極と信号側の電極との間の相対的な電位差、すなわ
ち液晶に印加される電圧の変化である。
[Embodiment 1] FIG. 1 is a diagram showing a time relationship between a drive waveform and a power supply voltage in a drive circuit according to an embodiment of the present invention. The drive waveform shown here is a relative potential difference between the scanning-side electrode and the signal-side electrode corresponding to one pixel on the display screen, that is, a change in the voltage applied to the liquid crystal.

又、第2図は第1図の駆動波形を実現する為の最も簡単
な回路構成図である。すなわち、液晶パネル1、液晶パ
ネル1の走査線に接続してなる走査用ドライバーLSI6、
液晶パネル1の信号線に接続してなるデータ用ドライバ
ーLSI7、走査用ドライバLSI6、データ用ドライバーLS17
に接続してなるディスプレイ・コントローラ8、電気光
学装置の電源回路部2、電気光学装置の電源スイッチ
3、電源スイッチ3のON−OFFを検出する検出回路4、
及び平滑用コンデンサー5とから構成されている。液晶
パネル1は、液晶に電圧を印加するための透明電極を対
向する2枚のガラス基板内面に形成し、この一対のガラ
ス基板間に強誘電性液晶を挟持している。電源回路部2
の出力側のVccは、駆動回路内の電源電圧である。
Further, FIG. 2 is the simplest circuit configuration diagram for realizing the drive waveform of FIG. That is, the liquid crystal panel 1, the scanning driver LSI 6 connected to the scanning lines of the liquid crystal panel 1,
Data driver LSI7, scanning driver LSI6, data driver LS17 connected to the signal lines of the liquid crystal panel 1.
A display controller 8, a power supply circuit section 2 of the electro-optical device, a power supply switch 3 of the electro-optical device, a detection circuit 4 for detecting ON / OFF of the power supply switch 3,
And a smoothing capacitor 5. In the liquid crystal panel 1, transparent electrodes for applying a voltage to the liquid crystal are formed on the inner surfaces of two glass substrates facing each other, and the ferroelectric liquid crystal is sandwiched between the pair of glass substrates. Power circuit section 2
Vcc on the output side of is the power supply voltage in the drive circuit.

電源スイッチ3をOFFした時、電源スイッチがOFFになっ
たことを検出回路4が検出する。そして、検出回路から
の信号がディスプレイ・コントローラに入力され、液晶
パネルの表示を消去状態にするために走査用ドライバー
LSI及びデータ用ドライバーLSIから電極に信号が印加さ
れる。
When the power switch 3 is turned off, the detection circuit 4 detects that the power switch is turned off. Then, the signal from the detection circuit is input to the display controller, and the scanning driver is used to put the display on the liquid crystal panel in the erased state.
Signals are applied to the electrodes from the LSI and the data driver LSI.

この時、液晶パネルの表示を消去状態にするために、走
査電極が順次選択され、各行毎に第1図に示すような消
去パルスが印加される。すなわち、電源スイッチをOFF
にした時、現在駆動しているフレームの最後まで走査を
行い、次のフレームで液晶分子を一方向に配列させるた
めの消去パルスを印加し、表示を消去状態とする。そし
て、消去パルスを印加し、全画面が消去状態となった
後、駆動回路内の電源電圧をゼロにする。
At this time, in order to bring the display of the liquid crystal panel into the erased state, the scan electrodes are sequentially selected and the erase pulse as shown in FIG. 1 is applied to each row. That is, turn off the power switch
In this case, scanning is performed up to the end of the currently driven frame, and an erase pulse for arranging liquid crystal molecules in one direction is applied in the next frame to put the display in an erased state. Then, an erase pulse is applied, and after the entire screen is erased, the power supply voltage in the drive circuit is set to zero.

なお、前記平滑用コンデンサー5は、全画面が消去され
るまで、走査用ドライバーLSI6及びデータ用ドライバー
LSI7の電源電圧が保持される程度の容量にする。
In addition, the smoothing capacitor 5 is used for the scanning driver LSI 6 and the data driver until the entire screen is erased.
The capacity should be such that the power supply voltage of LSI7 is maintained.

〔実施例2〕 第3図は、本発明の別の回路構成図を示した図である。
電源スイッチ11をOFFにした時、検出回路10は、電源ス
イッチ11がOFFになった事を検出する。そして、検出回
路から、ディスプレイ・コントローラ12及び電源回路13
に同時に信号が入力される。ディスプレイ・コントロー
ラ12は、検出回路からの信号に基づいて、走査用ドライ
バーLSI14及びデータ用ドライバーLSI15に、液晶パネル
の表示状態を消去状態にするように消去パルスを印加さ
せる。消去パルスが液晶に印加された後、走査用ドライ
バーLSI、及びデータ用ドライバーLSIは、出力段の抵抗
が高抵抗になるようにディスプレイコントローラによっ
て制御され、液晶パネルに信号が印加されない状態にす
る。
Second Embodiment FIG. 3 is a diagram showing another circuit configuration diagram of the present invention.
When the power switch 11 is turned off, the detection circuit 10 detects that the power switch 11 is turned off. Then, from the detection circuit, the display controller 12 and the power supply circuit 13
Signals are simultaneously input to. The display controller 12 applies an erasing pulse to the scanning driver LSI 14 and the data driver LSI 15 based on the signal from the detection circuit so as to bring the display state of the liquid crystal panel into the erased state. After the erase pulse is applied to the liquid crystal, the scanning driver LSI and the data driver LSI are controlled by the display controller so that the resistance of the output stage becomes high, and the signal is not applied to the liquid crystal panel.

一方、電源回路13には、液晶パネルを駆動する1フレー
ム以上の時間、2次側の電源電圧(Vcc)が保持される
ようなディレイ回路を組込んでおく。
On the other hand, in the power supply circuit 13, a delay circuit is incorporated so that the power supply voltage (Vcc) on the secondary side is held for a period of one frame or more for driving the liquid crystal panel.

〔発明の効果〕〔The invention's effect〕

本発明は、以上のような構成とすることによって以下の
ような効果が得られる。すなわち、電気光学装置の電源
をOFFした後、表示内容を消去するように消去パルスを
印加するので、電気光学装置の操作開始時で先に書き込
まれていた表示内容が消去状態とされており、しかもメ
モリー性を有する液晶素子に対して初期のユニフォーム
配向状態を実現できる。
According to the present invention, the following effects can be obtained by adopting the above configuration. That is, since the erase pulse is applied so as to erase the display content after turning off the power of the electro-optical device, the display content previously written at the start of the operation of the electro-optical device is in the erase state, Moreover, the initial uniform alignment state can be realized for the liquid crystal device having the memory property.

更に、消去パルスを印加した後、信号線駆動回路及び走
査線駆動回路の出力段の抵抗が高抵抗となるように制御
した状態で、電源電圧をゼロにするので、たとえ電源ノ
イズ等が加わったとしても、表示内容を消去された状態
に保つことができ、液晶素子の初期の配向状態を保つこ
とができる。
Further, after the erase pulse is applied, the power supply voltage is set to zero in a state where the resistance of the output stage of the signal line drive circuit and the scanning line drive circuit is controlled to be high resistance, so that power supply noise and the like are added. Even in this case, the display content can be maintained in the erased state, and the initial alignment state of the liquid crystal element can be maintained.

【図面の簡単な説明】[Brief description of drawings]

第1図は、本発明の駆動波形を示した一実施例と電源電
圧の時間的関係を示す図 第2図は、本発明の実施例の回路構成図を示した図 第3図は、本発明の実施例の他の回路構成図を示した図 〔符号の説明〕 1.液晶パネル 2.電源回路 3.電源スイッチ 4.電源スイッチのON−OFF検出回路 5.平滑用コンデンサー 6.走査用ドライバーLSI 7.データ用ドライバーLSI 8.ディスプレイ・コントローラ 9.液晶パネル 10.電源スイッチのON−OFF検出回路 11.電源スイッチ 12.ディスプレイコントローラ 13.電源回路 14.走査用ドライバーLSI 15.データ用ドライバーLSI
FIG. 1 is a diagram showing an embodiment showing a drive waveform of the present invention and a time relationship of a power supply voltage. FIG. 2 is a diagram showing a circuit configuration diagram of an embodiment of the present invention. The figure which showed the other circuit block diagram of the Example of invention [Description of a code | symbol] 1. Liquid crystal panel 2. Power supply circuit 3. Power supply switch 4. Power switch ON-OFF detection circuit 5. Smoothing capacitor 6. For scanning Driver LSI 7. Data driver LSI 8. Display controller 9. Liquid crystal panel 10. Power switch ON-OFF detection circuit 11. Power switch 12. Display controller 13. Power circuit 14. Scan driver LSI 15. Data driver LSI

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】対向する基板内面にそれぞれ走査線と信号
線とを有し、該一対の基板間にメモリー性を有する液晶
を挟持してなる液晶パネルと、該走査線に接続してなる
走査線駆動回路と、該信号線に接続してなる信号線駆動
回路と、電源のOFF状態を検出する検出手段とを少なく
とも有する電気光学装置の駆動方法において、 前記検出手段がOFF状態を検出した場合、その情報に基
づいて前記液晶パネルに書き込まれた表示内容を消去状
態とするための消去パルスを印加した後、前記信号線駆
動回路及び前記走査線駆動回路の出力段を高抵抗とし、
前記消去状態を保持した状態で電源電圧をゼロにするこ
とを特徴とする電気光学装置の駆動方法。
1. A liquid crystal panel having a scanning line and a signal line on an inner surface of an opposing substrate, and a liquid crystal having a memory property sandwiched between the pair of substrates, and a scanning connected to the scanning line. In a method of driving an electro-optical device having at least a line drive circuit, a signal line drive circuit connected to the signal line, and a detection unit that detects an OFF state of a power supply, when the detection unit detects the OFF state After applying an erase pulse for making the display content written in the liquid crystal panel into an erased state based on the information, the output stage of the signal line drive circuit and the scanning line drive circuit is made high resistance,
A method of driving an electro-optical device, wherein a power supply voltage is set to zero while the erased state is maintained.
JP61007521A 1986-01-17 1986-01-17 Driving method for electro-optical device Expired - Fee Related JPH07109455B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61007521A JPH07109455B2 (en) 1986-01-17 1986-01-17 Driving method for electro-optical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61007521A JPH07109455B2 (en) 1986-01-17 1986-01-17 Driving method for electro-optical device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP99595A Division JPH08110511A (en) 1995-01-09 1995-01-09 Electrooptical device driving method

Publications (2)

Publication Number Publication Date
JPS62165630A JPS62165630A (en) 1987-07-22
JPH07109455B2 true JPH07109455B2 (en) 1995-11-22

Family

ID=11668077

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61007521A Expired - Fee Related JPH07109455B2 (en) 1986-01-17 1986-01-17 Driving method for electro-optical device

Country Status (1)

Country Link
JP (1) JPH07109455B2 (en)

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JPS6348597A (en) * 1986-08-18 1988-03-01 キヤノン株式会社 Display device
JPH01134497A (en) * 1987-11-20 1989-05-26 Semiconductor Energy Lab Co Ltd Power source circuit for liquid crystal display device
JP2655328B2 (en) * 1987-12-25 1997-09-17 ホシデン株式会社 How to clear the LCD display when the power is turned off
US5248963A (en) * 1987-12-25 1993-09-28 Hosiden Electronics Co., Ltd. Method and circuit for erasing a liquid crystal display
EP0364590B1 (en) * 1987-12-25 1995-06-14 Hosiden Corporation Method of erasing liquid crystal display and an erasing circuit
JP2700228B2 (en) * 1988-07-19 1998-01-19 株式会社リコー Liquid crystal element
JP2733344B2 (en) * 1989-10-27 1998-03-30 キヤノン株式会社 Display device
ES2075866T3 (en) * 1989-10-27 1995-10-16 Canon Kk LIQUID CRYSTAL DISPLAY DEVICE WITH CONTROLLED POWER DISCONNECTION.
JPH08110511A (en) * 1995-01-09 1996-04-30 Seiko Epson Corp Electrooptical device driving method
JP2721489B2 (en) * 1995-05-29 1998-03-04 キヤノン株式会社 Display device
JP3827823B2 (en) 1996-11-26 2006-09-27 シャープ株式会社 Liquid crystal display image erasing device and liquid crystal display device including the same
JP4608864B2 (en) * 2003-09-29 2011-01-12 セイコーエプソン株式会社 ELECTRO-OPTICAL DEVICE, DRIVE CIRCUIT THEREOF, AND ELECTRONIC DEVICE
JP4501480B2 (en) * 2004-03-19 2010-07-14 セイコーエプソン株式会社 Electro-optical device, control device for electro-optical device, control method for electro-optical device, and electronic apparatus

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Publication number Publication date
JPS62165630A (en) 1987-07-22

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