JPH07107891B2 - Electron beam writer - Google Patents

Electron beam writer

Info

Publication number
JPH07107891B2
JPH07107891B2 JP60986A JP60986A JPH07107891B2 JP H07107891 B2 JPH07107891 B2 JP H07107891B2 JP 60986 A JP60986 A JP 60986A JP 60986 A JP60986 A JP 60986A JP H07107891 B2 JPH07107891 B2 JP H07107891B2
Authority
JP
Japan
Prior art keywords
deflection
electron beam
deflector
sub
dac
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60986A
Other languages
Japanese (ja)
Other versions
JPS62159424A (en
Inventor
博之 伊藤
秀行 垣内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60986A priority Critical patent/JPH07107891B2/en
Publication of JPS62159424A publication Critical patent/JPS62159424A/en
Publication of JPH07107891B2 publication Critical patent/JPH07107891B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は電子線描画装置に係り、特にマーク検出の高精
度化に好適な電子線描画装置に関する。
Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron beam writing apparatus, and more particularly to an electron beam writing apparatus suitable for increasing the accuracy of mark detection.

〔発明の背景〕[Background of the Invention]

ある領域を電子線描画するに当つて、その領域を仮想小
領域に細分化し、その小領域を順次描画しながら全体領
域の描画を完了して行く方法が一般に多く用いられてい
る。
When drawing a certain area with an electron beam, a method is generally used in which the area is subdivided into virtual small areas and the drawing of the entire area is completed while sequentially drawing the small areas.

小領域の描画に要求される条件はスループツト向上の点
から高速描画が可能なことである。この点から小領域描
画のためには高速偏向制御が可能な静電偏向が用いられ
る。この偏向は普通副偏向と呼ばれる。
The condition required for drawing a small area is that high-speed drawing is possible from the viewpoint of improving throughput. From this point, electrostatic deflection capable of high-speed deflection control is used for drawing a small area. This deflection is commonly called the sub-deflection.

一方小領域間の電子線の移動には高速性よりも偏向歪が
少ないことが要求され、この点から大偏向の場合静電偏
向に比べて歪が少ない電磁偏向が用いられる。これは普
通主偏向と呼ばれる。
On the other hand, the movement of the electron beam between the small regions is required to have less deflection distortion than the high speed operation. From this point, in the case of large deflection, electromagnetic deflection having less distortion than electrostatic deflection is used. This is commonly called main deflection.

高信頼化のために電子線の偏向データはデイジタル化さ
れている。したがつて、このデータで偏向制御を行うた
めにはDAC(デイジタル−アナログ変換器)が必要であ
る。このDACとしては、小領域描画(静電偏向)のため
にはビツト数が少ない高速DACが、小領域間電子線移動
用(電磁偏向用)としては高分解能DACが用いられる。
The electron beam deflection data is digitalized for high reliability. Therefore, a DAC (Digital-Analog Converter) is required to control the deflection with this data. As this DAC, a high-speed DAC with a small number of bits is used for drawing a small area (electrostatic deflection), and a high-resolution DAC is used for moving an electron beam between small areas (for electromagnetic deflection).

アドレス単位は、描画やマーク検出時のビーム偏向の最
小単位であり、偏向フイールドは、高分解能DACの最大
レンジに相当する。
The address unit is the minimum unit of beam deflection at the time of drawing or mark detection, and the deflection field corresponds to the maximum range of the high resolution DAC.

近年、電子線描画装置は、高速高精度化のための大角偏
向化、微細化の要求により概成の高分解能DACのダイナ
ミツクレンジでは、限界に達している。特に描画パター
ン測長や、ビーム較正に用いるマーク検出の精度向上に
対応できなくなつている。すなわち、従来アドレス単位
は描画精度から決定され、しかも描画とマーク検出で同
一値とされていた。そのためマーク検出には、描画時と
同じアドレス単位相当の検出不確定が残る。
In recent years, the electron beam drawing apparatus has reached the limit in the dynamic range of a general high resolution DAC due to the demand for large angle deflection and miniaturization for high speed and high accuracy. In particular, it is no longer possible to deal with measuring the length of a drawing pattern and improving the accuracy of mark detection used for beam calibration. That is, the address unit is conventionally determined from the drawing accuracy, and the same value is used for drawing and mark detection. Therefore, in the mark detection, the detection uncertainties corresponding to the same address units as at the time of drawing remain.

本来装置較正は描画のアドレス単位より高精度であるべ
きで、マーク検出時の偏向制御はより微細化される必要
がある。
Originally, the device calibration should be more accurate than the address unit of drawing, and the deflection control at the time of mark detection needs to be made finer.

〔発明の目的〕[Object of the Invention]

本発明の目的は、マーク検出の微細化、高精度化を達成
する偏向制御が可能な電子線描画装置を提供することに
ある。
An object of the present invention is to provide an electron beam drawing apparatus capable of deflection control that achieves finer mark detection and higher accuracy.

〔発明の概要〕[Outline of Invention]

本発明の特徴は副偏向のアドレス単位を異なる複数の値
に設定し得るようにした点にある。
A feature of the present invention is that the sub-deflection address unit can be set to a plurality of different values.

〔発明の実施例〕Example of Invention

以下、本発明の一実施例を図を用いて説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図は、可変成形ビーム方式の電子線描画装置であ
る。可変成形ビーム方式とは、電子源1より発したビー
ムの第1矩形アパーチヤ2と第2矩形アパーチヤ4の共
役断面を成形偏向器3で制御し、任意の矩形断面ビーム
を得る方式である。成形ビームは縮小レンズ5により縮
小され、対物レンズ6により試料9面に結像される。更
に、主偏向器8と副偏向器7はビームを偏向し、所望の
試料面位置に露光パターンを形成する。
FIG. 1 shows a variable shaped beam type electron beam drawing apparatus. The variable shaped beam method is a method in which the conjugate cross section of the first rectangular aperture 2 and the second rectangular aperture 4 of the beam emitted from the electron source 1 is controlled by the shaped deflector 3 to obtain an arbitrary rectangular shaped beam. The shaped beam is reduced by the reduction lens 5 and imaged on the surface of the sample 9 by the objective lens 6. Further, the main deflector 8 and the sub-deflector 7 deflect the beam to form an exposure pattern at a desired sample surface position.

第2図は、偏向器制御のブロツクを示す。計算機10は、
偏向データを、主偏向DAC回路11と副偏向DAC回路12へ転
送する。それぞれのDAC回路は偏向データをアナログ出
力とし、主副偏向アンプ回路14,13により、主,副偏向
器8,7を駆動する。副偏向アンプ回路13は必要に応じ
て、感度切換回路15で偏向出力を可変としている。すな
わち例では副偏向アドレス単位を副偏向アンプ回路13の
感度切換スイツチ15で所望値に設定する。
FIG. 2 shows a block for deflector control. Calculator 10
The deflection data is transferred to the main deflection DAC circuit 11 and the sub deflection DAC circuit 12. Each DAC circuit outputs deflection data as an analog output, and the main and sub deflector amplifier circuits 14 and 13 drive the main and sub deflectors 8 and 7, respectively. The sub-deflection amplifier circuit 13 makes the deflection output variable by the sensitivity switching circuit 15 as necessary. That is, in the example, the sub-deflection address unit is set to a desired value by the sensitivity switching switch 15 of the sub-deflection amplifier circuit 13.

第3,4,5図を用いて、実際にマーク検出時アドレス単位
を1/2に微細化し、マーク検出精度を向上する原理を示
す。
The principle of improving the mark detection accuracy by halving the address unit at the time of mark detection will be shown using Figs.

第3図は、マーク検出の構成を示す。副偏向器7は電子
線によりマーク16を走査し、その時の反射電子や2次電
子を検出器17で検出する。比較器18は検出信号を一定の
レベルと比較する。マーク位置は第4図で、信号ピーク
がレベルをよぎる位置から求める。しかしながら、第5
図(エツジ検出部拡大図)に示す様に、偏向がアドレス
単位で制御されるため、信号がレベルをよぎる点Aは、
XからX+1/2の不確定さを持つ。しかしながら、従来
方式では不確定さはXからX+1であり、本方式により
精度が倍に向上している。
FIG. 3 shows the structure of mark detection. The sub-deflector 7 scans the mark 16 with an electron beam, and the detector 17 detects backscattered electrons and secondary electrons at that time. The comparator 18 compares the detection signal with a constant level. The mark position is obtained from the position where the signal peak crosses the level in FIG. However, the fifth
As shown in the figure (enlarged view of the edge detection section), since the deflection is controlled in address units, the point A where the signal crosses the level is
It has uncertainty from X to X + 1/2. However, in the conventional method, the uncertainty is from X to X + 1, and the accuracy is doubled by this method.

本実施例では、アドレス単位切換えを、偏向アンプ感度
切換で行なつているが、他の方法として、アンプ回路を
多段とし、必要に応じて、段数を変更したり、アンプ回
路そのものを切換することでも可能である。また副偏向
DACは主偏向DACに比較して低ビツトであるから、より高
ビツトのDAC使用も容易であり、マーク検出時等で微細
な偏向器制御が必要な場合のみ下位ビツトを使用する方
法も考えられる。この場合偏向アンプ感度等の切換は不
要である。
In the present embodiment, the address unit switching is performed by the deflection amplifier sensitivity switching, but as another method, the amplifier circuit may have multiple stages, and the number of stages may be changed or the amplifier circuit itself may be switched as necessary. But it is possible. Sub-deflection
Since the DAC has a lower bit than the main deflection DAC, it is easy to use a DAC with a higher bit, and a method of using the lower bit only when fine deflector control is necessary at the time of mark detection etc. can be considered. . In this case, it is not necessary to switch the sensitivity of the deflection amplifier.

またアドレス単位の設定値も、偏向アンプ回路の感度可
変とすれば精度要求に応じて任意値を選択可能である。
Also, the setting value in the address unit can be selected as an arbitrary value depending on the accuracy requirement if the sensitivity of the deflection amplifier circuit is variable.

〔発明の効果〕〔The invention's effect〕

本発明によれば偏向DACの高分解能化によらず比較的低
ビツトのDACで偏向ダイナミツクレンジを拡大する。特
にマーク検出時の偏向量子化誤差を低減し、装置較正や
パターン測長精度を向上し得る。
According to the present invention, the deflection dynamic range is expanded with a DAC having a relatively low bit, regardless of the high resolution of the deflection DAC. In particular, it is possible to reduce the deflection quantization error at the time of detecting the mark and improve the apparatus calibration and the pattern length measurement accuracy.

【図面の簡単な説明】[Brief description of drawings]

第1図は、電子線描画装置の基本構成図、第2図は本発
明の偏向制御回路ブロツク図、第3図はマーク検出構成
図、第4,5図は、マーク位置検出原理説明図である。 全図共通番号であり、 1……電子源、2……第1矩形アパーチヤ、3……成形
偏向器、4……第2矩形アパーチヤ、5……縮小レン
ズ、6……対物レンズ、7……副偏向器、8……主偏向
器、9……試料、10……計算機、11……副偏向DAC回
路、12……主偏向DAC回路、13……副偏向アンプ回路、1
4……主偏向アンプ回路、15……感度切換回路、16……
マーク、17……検出器、18……比較器。
FIG. 1 is a basic configuration diagram of an electron beam drawing apparatus, FIG. 2 is a block diagram of a deflection control circuit of the present invention, FIG. 3 is a mark detection configuration diagram, and FIGS. is there. Common to all figures, 1 ... Electron source, 2 ... First rectangular aperture, 3 ... Molding deflector, 4 ... Second rectangular aperture, 5 ... Reduction lens, 6 ... Objective lens, 7 ... … Sub-deflector, 8 …… Main deflector, 9 …… Sample, 10 …… Calculator, 11 …… Sub-deflection DAC circuit, 12 …… Main deflection DAC circuit, 13 …… Sub-deflection amplifier circuit, 1
4 …… Main deflection amplifier circuit, 15 …… Sensitivity switching circuit, 16 ……
Mark, 17 ... Detector, 18 ... Comparator.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】電子ビームを発生する手段と、電子ビーム
を試料面の所望の位置へ偏向する偏向器と、偏向データ
をアナログ出力に変換する偏向DAC回路と、前記アナロ
グ出力を増幅して前記偏向器を駆動する偏向アンプ回路
とを備えた電子線描画装置において、偏向アドレス単位
を選択する選択手段と、前記選択手段の出力に基づいて
前記偏向アンプ回路の増幅率を変更する増幅率変更手段
を有していることを特徴とする電子線描画装置。
1. A means for generating an electron beam, a deflector for deflecting the electron beam to a desired position on a sample surface, a deflection DAC circuit for converting deflection data into an analog output, and an amplifier for amplifying the analog output to obtain the analog output. In an electron beam drawing apparatus including a deflection amplifier circuit for driving a deflector, a selection unit that selects a deflection address unit, and an amplification factor changing unit that changes the amplification factor of the deflection amplifier circuit based on the output of the selection unit. An electron beam drawing apparatus having:
【請求項2】前記偏向器は、主偏向器及び副偏向器を有
していることを特徴とする特許請求の範囲第1項記載の
電子線描画装置。
2. The electron beam drawing apparatus according to claim 1, wherein the deflector has a main deflector and a sub-deflector.
JP60986A 1986-01-08 1986-01-08 Electron beam writer Expired - Lifetime JPH07107891B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60986A JPH07107891B2 (en) 1986-01-08 1986-01-08 Electron beam writer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60986A JPH07107891B2 (en) 1986-01-08 1986-01-08 Electron beam writer

Publications (2)

Publication Number Publication Date
JPS62159424A JPS62159424A (en) 1987-07-15
JPH07107891B2 true JPH07107891B2 (en) 1995-11-15

Family

ID=11478474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60986A Expired - Lifetime JPH07107891B2 (en) 1986-01-08 1986-01-08 Electron beam writer

Country Status (1)

Country Link
JP (1) JPH07107891B2 (en)

Also Published As

Publication number Publication date
JPS62159424A (en) 1987-07-15

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