JPH07106603A - Electronic component - Google Patents

Abstract

PURPOSE:To provide an electronic component having stabilized quality by preventing the solder layer on a semiconductor element and contaminants, e.g. flux, contained therein from adhering to an insulation layer on the semiconductor device thereby preventing the leakage. CONSTITUTION:In an electronic device wherein a semiconductor element having a metal layer, at least on the upper face thereof, is sandwiched by two lead terminals 4 through a solder 3, a bump 7 is formed between the metal layer and the solder layer on the inside of the metal layer forming region.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component such as a diode.

[0002]

2. Description of the Related Art Conventionally, at least two lead terminals are connected to one semiconductor element so as to sandwich the upper and lower surfaces of the semiconductor element, and then the whole is molded with a thermosetting synthetic resin. For electronic parts, taking a diode as an example,
It has the following structure.

A conventional diode, as shown in FIG.
A solder layer 12a made of Sn or the like applied to the lead terminals 11a of Cu, Au or the like by a known method, and the solder layer 12
a semiconductor element 13 bonded on a by a conventional method, an insulating layer 14 made of SiO ₂ or the like formed along the outer peripheral edge of the upper surface of the semiconductor element 13, and a solder layer 12a.
In order to improve the adhesion between the semiconductor element 13 and the semiconductor element 13, a metal layer 15 made of aluminum or the like formed on the upper surface of the semiconductor element 13 is connected to the metal layer 15 via a solder layer 12b made of Sn or the like. And a lead terminal 11b.

The solder layer 12b is applied to the lead terminals 11b by a conventionally used dip application method or the like. After this application, the solder layer 12b is interposed so as to sandwich the semiconductor element 13 therebetween. The lead terminal 11b and the metal layer 15 are connected.

Further, the solder layer 12b contains a flux containing pine resin as a main component and a small amount of a conductive substance for the purpose of preventing oxidation.

The conventional diode having such a structure is stored in a constant temperature bath and cured to obtain the solder layer 1
2b is melted and the solder layer 12b and the metal layer 15 are fixed.

[0007]

However, as shown in FIG. 7, as the solder layer 12b is melted at the time of the above-described curing, the deposits 16 of the solder layer 12b and dirt such as flux are deposited on the metal layer 15. In the case of adhesion, a route (a lead terminal 11b to the solder layer 12
There is no problem in that current flows through a route similar to the route that flows to the semiconductor element 13 through the b and the metal layer 15).
In some cases, the insulating layer 14 was attached to the side surface of the semiconductor element 13. Therefore, since the adhered matter is conductive, the semiconductor element 1 does not pass through the solder layer 12b via the adhered part other than the route so that a normal current flows.
There is a problem in that a current flows through the route flowing to No. 3 and a leak occurs at the adhered portion, resulting in poor quality.

The present invention has been devised under the circumstances as described above, and a solder layer on a semiconductor element and deposits such as flux stains contained in the solder layer adhere to the insulating layer on the semiconductor element. It is an object of the present invention to provide a stable electronic component of stable quality that does not cause leakage.

[0009]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems, the present invention provides a solder layer having at least two lead terminals for each semiconductor element having a metal layer on the upper surface thereof. Provided is an electronic component in which the upper and lower surfaces of a semiconductor element are sandwiched by the method, wherein a bump is formed inside the outer edge of the metal layer and between the metal layer and the solder layer. To do.

Furthermore, the bump formation region does not include the outer peripheral edge of the metal layer and may be at least inside the outer peripheral edge of the metal layer, and the present invention is not limited to this.

[0011]

According to the present invention, when a solder layer is melted during the manufacture of an electronic component, an adhered substance such as dirt on the solder layer and flux added to the solder layer is melted on the bump surface. However, since this bump is thicker than the thickness of the solder layer, the adhered substance only flows to the outer surface of the bump, and it hardly flows from the insulating part to the side surface of the semiconductor element. The current does not flow through the route from the solder layer to the semiconductor element through the adhesion part, other than the route through which the current flows (the route from the lead terminal to the semiconductor element through the solder layer, bump and metal layer). No leakage occurs at the adhered portion.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below by taking a diode as an example with reference to FIGS.

FIG. 1 is a sectional view of the essential part of a diode according to the present invention.

The diode 1 is formed by sandwiching the semiconductor element 2 and the upper and lower surfaces of the semiconductor element 2 with a solder layer 3a and a solder layer 3b made of Sn and Au interposed therebetween.
a lead terminal 4a and a lead terminal 4b made of u, an insulating layer 5 made of SiO ₂ formed along the outer peripheral edge of the upper surface of the semiconductor element 2, and a metal layer 6 made of aluminum formed on the upper surface of the semiconductor element 2. The bumps 7 are formed between the metal layer 6 and the solder layer 3b.

In order to achieve the above structure, the diode of the present invention has a semiconductor element 2 having a metal layer 6 formed on the upper surface thereof in advance as shown in FIG. An A portion bonded through 3a and a B portion in which the solder layer 3b is formed on the lead terminal portion 4b are prepared. In order to prevent oxidation, the solder layer 3b has
A conventional flux containing a small amount of a conductive substance containing pine tar as the main component is added.

Then, as shown in FIG. 3, bumps 7 are formed on the metal layer 6 of the portion A. This bump 7 is A
The g paste is printed on the metal layer 6 by screen printing, and the printed Ag paste is heated and baked at about ° C. The method of forming the bumps is not limited to this, and a printing and firing method in which printing is performed by pad printing or the like in addition to screen printing and heating and firing can be widely used. The material of the bump is not limited to this, and a metal such as Ag, Au or Cu is used as the main component.

Further, the formation area of the bumps 7 is formed in an area slightly inside the outer peripheral edge of the metal layer 6 (area approximately 50 μm inward from the outer peripheral edge of the metal layer 6). Bump 7
Has a maximum thickness at the substantially central portion of the bump 7,
The thickness becomes smaller toward the outer peripheral edge.

In addition, as the material of the metal layer, conventionally used metals such as aluminum, silver or copper can be widely used.

As the material of the solder layer, Sn, Au, Ni and the like which have been conventionally used can be cited.

Further, examples of the material of the insulating layer include ceramics and the like which have been conventionally used.

Next, as shown in FIG. 4, the semiconductor element 2 is held with the lead terminal 4a and the lead terminal 4b sandwiched so that the bump 7 of the section A is in contact with the solder layer 3b of the section B. To do. At this time, the solder layer 3b is not fixed to the bump 7 because it is solidified.

The solder layer 3b applied to the lead terminals 4b heats and melts the diode in this state in order to apply it to the bumps 7.

At the time of the melting, as shown in FIG. 4, the deposit 8 such as the solder layer 3b and the dirt of the flux added thereto flows to the outer surface of the bump 7 as the solder layer 3b melts. To do. However, since the bump 7 is thicker than the thickness of the solder layer 3b, the deposit 8 flows only to the outer surface of the bump 7 and hardly flows to the insulating portion of the semiconductor element 2. .

Further, even if the conductive adhering substance 8 is the bump 7,
Even when flowing from below to the metal layer 6, the formation region of the bump 7 is smaller than the formation region of the metal layer 6 and is about 50 μm inside from the peripheral edge of the formation region of the metal layer 6 as described above. Therefore, the adhered matter 8 does not adhere from the insulating portion to the side surface of the semiconductor element 2, and the route (the lead terminal 4b to the solder layer 3b;
A current does not flow through a route that flows from the solder layer 3b to the semiconductor element 2 through the attachment portion 8 other than the route that flows to the semiconductor element 2 through the bump 7 and the metal layer 6, and a leak occurs at the attachment portion. Therefore, it is possible to provide a stable quality diode.

In the present embodiment, the upper and lower surfaces of the semiconductor element are sandwiched by two lead terminals, but the invention is not limited to this, and it is sufficient if they are sandwiched by one or more lead terminals.

In the present embodiment, the diode is taken as an example, but the present invention is not limited to this.

[0027]

According to the present invention, when the solder layer applied to the lead terminals is melted, the solder layer and the adhered substances such as the contaminants of the flux added to the solder layer are applied to the bumps formed on the surface of the semiconductor element. Since it does not adhere to the semiconductor element, it does not flow and adhere to the insulating portion of the semiconductor element, and no leakage occurs, so that an electronic component with stable quality can be provided.

[Brief description of drawings]

FIG. 1 is a sectional view of an essential part showing a diode according to the present invention.

FIG. 2 is a view showing a process of manufacturing a diode according to the present invention.
It is a principal part sectional view which shows the state which the A section and the B section are isolate | separated.

FIG. 3 is a view showing a process of manufacturing a diode according to the present invention.
FIG. 6 is a cross-sectional view of a main part showing a structure in which bumps are formed on a metal layer of part A.

FIG. 4 is a view showing a process of manufacturing a diode according to the present invention.
It is a principal part sectional view which shows the structure of the state which made the B section contact the A section.

FIG. 5 is a cross-sectional view of essential parts showing a molten state of a solder layer of a diode according to the present invention.

FIG. 6 is a cross-sectional view of an essential part showing a conventional diode.

FIG. 7 is a cross-sectional view of essential parts showing a molten state of a solder layer of a conventional diode.

[Explanation of symbols]

 1 diode 2 semiconductor element 3 solder layer 4 lead terminal 5 insulating part 6 metal layer 7 bump 8 adherent

Claims (1)

[Claims] 1. An electronic component in which upper and lower surfaces of a semiconductor element having a metal layer on at least an upper surface are sandwiched by two lead terminals via solder, wherein the metal is inside a region where a metal layer is formed and An electronic component, wherein a bump is formed between a layer and the solder layer.