JPH07105043A - Program error detection device - Google Patents

Abstract

PURPOSE:To improve detection speed and to securely detect error by detecting a program error by means of a specified error detection circuit without depending on the syntax analysis. CONSTITUTION:At the time of generating a source program taking an automatic variable in a stack area, the program error which is to forget to initialize the pointer value while making a pointer variable an automatic variable, is detected. A compiler is provided with a means for translating the source program into an object program and a means for automatically adding an instruction setting a pointer value to a previously decided address value in the case of making the pointer variable an automatic variable. An error detection circuit 30 detects the reading/writing of a memory area in a previously decided range including the set address value and outputs an error signal at the time of executing the object program. A notice means informs an operator of the forgetfulness of the initialization of the pointer value in the source program.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention, when creating a source program such as C language or Pascal language that takes automatic variables in a stack area, makes pointer variables automatic variables and forgets to initialize the pointer values. The present invention relates to a program error detection device for detecting (hereinafter simply referred to as a program error).

[0002]

2. Description of the Related Art A program error detecting device of this kind is already known. In this program error detection device, a program error is detected by analyzing the syntax of the source program when translating the source program into an object program. That is, the conventional program error detection device is configured as software.

[0003]

Therefore, an object of the present invention is to make it possible to detect a program error by using a means different from the conventional program error detecting apparatus. That is, it is an object of the present invention to obtain a program error detection device that can reliably detect a program error by using a hardware error detection circuit.

[0004]

The gist of the present invention is to provide a program error detection device comprising: (a) a translation means for translating a source program into an object program; and a pointer variable as an automatic variable. A compiler having an automatic initialization means for automatically adding an instruction for setting the pointer value of a pointer variable to a predetermined address value in the object program, and (b) by the automatic initialization means at the time of execution of the object program. An error detection circuit that detects reading and writing to a memory area in a predetermined range including a set address value and outputs an error signal, and (c) a notification unit that notifies the operator of a program error according to the error signal. It is to be configured to include.

Here, the notifying means may be a display device for displaying the content of the error, or a buzzer or a lamp for notifying that there is an error, and interrupts the execution of the object program (forced termination). It may be a control device or the like. When the execution of the object program is interrupted, the operator can be notified that there is a program error if the instruction manual or the like has a description indicating that the source program has a program error.

[0006]

In the compiler of the program error detecting apparatus of the present invention, the source program having automatic variables in the stack area is translated into the object program by the translating means. When the pointer variables are automatic variables in the source program, , An instruction for setting a pointer value of a pointer variable to a predetermined address value is automatically added to the object program by the automatic initialization means. Then, when the object program translated by the compiler is executed, if an error detection circuit detects reading / writing from / to a memory area in a predetermined range including the address value set by the automatic initialization means, an error signal is output. To be done. The error detection circuit may detect that a read / write operation has been performed on the memory area, or may detect that a read command signal or a write command signal has been issued. In the latter case, it will be detected before the actual reading and writing.

If the pointer value of the pointer variable is initialized by the programmer (program), reading and writing will not be performed on the memory area within the predetermined range when the object program is executed, and Since the operation is performed for the address having the set address value, no error signal is issued.
However, when the pointer value is not initialized by the programmer, reading / writing (including generation of a read command signal or a write command signal) is always performed in the memory area within the predetermined range. Therefore, the error signal is surely emitted.
In response to the error signal, the notification means notifies the operator that the source program has a program error.

[0008]

According to the program error detecting apparatus of the present invention, it is possible to detect a program error by using an error detecting circuit constructed in hardware. That is,
Since the error detection circuit detects the program error regardless of the syntax analysis, the detection speed can be increased accordingly. Further, as described above, it is possible to reliably detect the program error. Furthermore, the operator can be surely notified by the notification means.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A personal computer which is an embodiment of the error detecting apparatus of the present invention will be described in detail below with reference to the drawings. In FIG. 1, 10 is a control unit of a personal computer, and the control unit 10 is a CPU 12 and a RAM.
14 and so on. The personal computer in this embodiment is a PC-9801 series manufactured by NEC Corporation, and the CPU 12 is an 8086 manufactured by Intel Corporation.
System CPU. Further, the optional board 16 shown in FIG. 2 is inserted from a general-purpose slot formed in the main body of a personal computer (not shown) to form a part of the control unit 10. A CRT display unit 20 is connected to the control unit 10.

The RAM 14 has a memory capacity of 000, as shown in FIG.
It is provided with an area of 640 Kbytes from addresses 00H to 9FFFFH, and the area stores data such as an MS-DOS area 23, a code area 24 for storing a program, and a plurality of numerical values. The area 26 is provided, and the addresses indicating the areas 24 and 26 are variable. Further, the RAM 14 is also provided with a stack area 28 capable of taking automatic variables. RAM14
Is a large model type and is represented as a physical address space in the figure.

In addition, the D5000 of the system I / O area 29 provided on the optional board 16 is used.
An area of 4 Kbytes from address H to D5FFFH is a dedicated area 32 used exclusively for the error detection circuit 30 described later. The dedicated area 32 cannot be used as the code area 24, the data area 26, the stack area 28, or the like. In other words, this area is never usable by some programmers.

The optional board 16 is provided with a plurality of large-scale integrated circuits (hereinafter abbreviated as LSI) 36 and the like, and one of the LSIs 36 is a dual board.
An in-package switch 40 (hereinafter abbreviated as DIP switch 40) is attached. The DIP switch 40 outputs a signal indicating an address value indicating an address in the dedicated area 32 at the above-mentioned addresses D5000H to D5FFFH, and has a large number of terminals. However, since the upper two digits of the address value are all areas indicated by D5 in the dedicated area 32, a signal in which the upper two digits represent (D5), that is, (1101010)
All the address values in the dedicated area 32 are represented by 1). That is, in the present embodiment, the signal (D5) representing the address value indicating the address in the dedicated area 32 is output by the eight terminals representing the upper two digits of the many terminals of the DIP switch 40. Has been The error detection circuit 30 shown in FIG. 4 is incorporated in another one of the LSIs 36.

The error detection circuit 30 includes a match determination circuit 4
4, an OR circuit 46, an AND circuit 48 and the like. The above-mentioned eight terminals of the DIP switch 40 are connected to the coincidence judging circuit 44, and the address terminals A19 to A19 are connected.
12 are connected. The address terminal is used when the CPU 12 specifies the address value of the RAM 14 and the system I / O area 29 having the area of 00000H to FFFFFH when executing the object program. Therefore, the control unit 10 has a total of 2
Zero address terminals A0 to A19 are provided. The address terminals A3 to A0 are connected to the RAM 14 and the system I.
It outputs a signal indicating the least significant digit of the address value in the / O area 29, and the address terminals A19 to A1.
6 outputs a signal representing the most significant digit.

In other words, the coincidence determination circuit 44 includes the CPU 1
While the signal representing the upper 2 digits of the address value designated by 2 is supplied, as described above, the signal representing the upper 2 digits of the dedicated area 32 (always 11010101) is supplied. If they do not match, the L signal is output, and if they match, the H signal is output. For example, when the address of address 87000H is designated by the CPU 12, the outputs of the address terminals A19 to A12 are (1000011).
However, when the D5100H address is specified, the output is (11010101).
Therefore, the output signal from the DIP switch 40 coincides with the output signal, and the H signal is output. That is, during execution of the object program, the CPU 12 causes the dedicated area 32
When the address inside is designated, the H signal is output by the coincidence judging circuit 44.

The OR circuit 46 is supplied with a read signal (RD) when the CPU 12 issues a command to read the data stored in the RAM 14 during execution of the object program, and writes the data to the RAM 14. When a command to perform is issued, a write signal (W
R) is supplied. When either RD or WT is supplied, the H signal is output by the OR circuit 46.

A match determination circuit 44 and an OR circuit 46 are connected to the AND circuit 48. The AND circuit 48 always outputs the H signal, but when the output signal of the coincidence determination circuit 44 and the output signal of the OR circuit 46 are both H signals, they can be changed to the instantaneous L signal. That is, a pulse is emitted and supplied to the CPU 12. here,
The pulse is a signal indicating an interrupt request to the CPU 12. Therefore, when the error detection circuit 30 issues a command to read or write to the dedicated area 32 during execution of the object program, a pulse is issued and an interrupt request signal is supplied to the CPU 12. is there.

The operation of the personal computer configured as above will be described. A source program created in C language is translated into an object program, and this object program is executed. If it is detected that the source program has a program error (forgetting to initialize the pointer value of the pointer variable) during the execution of the object program, the fact is displayed on the CRT display unit 20 to inform the operator.

FIG. 5 shows a program code representing a source program. Source program is PC
It is created on MS-DOS (registered trademark name of Microsoft Corporation) for 9801 series. A detailed description of the source program code is omitted, but in the figure, 2
Although the function uekansu and the function sitakansu are defined, the function sitakansu is called when the function uekansu is executed.

1st line, 3rd line, m + 1st line, mth
The code int described in the + 3rd line and the like is a code that declares that each variable, the return value of the function, and the like are of the integer type. In this way, when each variable, the return value of a function, or the like is simply declared as an int type, it means that these are automatic variables, and the stack area 28 in FIG. 3 is used. become. The pointer variable * poi declared to be an int type in the m + 3th line is an automatic variable.

The pointer variable * poi represents the data located at the address designated by the pointer value poi, or represents the data to be written at the address designated by the pointer value poi. Pointer variable * po on the m + nth line
i represents the latter, that is, 123 is the data to be written at the address specified by the pointer value poi. Therefore, the programmer has a pointer value (address value) poi that represents the address to write the pointer variable * poi.
Must be set in the portion R before the m + nth row is executed. In this way, pointer variables *
Setting the pointer value poi that represents the address to write poi is called initializing the pointer value of the pointer variable.

Even if only the pointer variable * poi is set without initializing the pointer value poi, it is not known to which address the data will be written. Therefore, when writing is performed to an address in the MS-DOS area 23, the OS is destroyed, and when writing is performed to an address in the code area 24, the program is destroyed. The problem arises.
Further, when the program is executed for the address in the unused area 50, the program is executed without any problem, but an unsatisfactory result is output. In the source program code shown in FIG. 5, the pointer variable * poi is set, but it is forgotten to initialize the pointer value poi.

When this source program code is translated, it becomes the object program code shown in FIG.
The object program shown in FIG. 6 will be briefly described. The part 60 represents the instructions that are executed at the start of the execution of the function uekansu. The base pointer bp and the stack pointer sp are saved. Line 62
Indicates an instruction to secure 6 bytes of automatic variable area,
In the portion 64, an instruction to call the function sitakansu is represented. In line 66, the return value 0 of the function uekansu is A
The instruction to be stored in the X register is represented, and the portion 68 represents the instruction performed at the end of the execution of the function uekansu. The saved base pointer bp and stack pointer sp are returned.

Hereinafter, similarly, in the portion 70, an instruction for saving the base pointer bp and the stack pointer sp is represented. The line 72 shows an instruction to secure an automatic variable area of 12 bytes, the part 74 shows an instruction to execute the function sitakansu, and the line 76 shows an instruction to store the return value of the function sitakansu in the AX register. Has been done. Further, the portion 78 represents an instruction for returning the base pointer bp and the stack pointer sp.

As is apparent from FIG. 5, the pointer variable * poi is an automatic variable in the source program. Therefore, as shown in part S of FIG. 6, the object program includes the pointer value po of the pointer variable * poi.
A command to set i as address D500: 0800 is automatically added. As shown in FIG. 7, the address D500; 0800 is a pointer value in the case of being expressed in the segment space. Therefore, if it is corrected to the pointer value in the physical address space, it becomes the address D5800H and is included in the dedicated area 32 described above. Is clear. In this embodiment, the pointer value poi is set in the middle of the dedicated area 32. In addition, SS in FIG. 7 represents a segment.

Next, the execution of the object program code of FIG. 6 will be described with reference to the flow chart of FIG. Process 1
In the following (simply represented by K1. The same applies to other processes), the function uekansu is called, and the function in K2 is
sitakansu is called. At K3, part 74 is executed and at K4 a write command (WT) of the pointer variable * poi is issued. In this embodiment, the part S
, The pointer value poi of the pointer variable * poi is set to the address D5800H in the dedicated area 32.
A signal representing the address D5800H is issued by U12, and the H signal is output by the coincidence determination circuit 44. Further, since the write command signal (WR) for the pointer variable * poi is issued, the OR circuit 46 outputs the H signal. As a result, the AND circuit 48 outputs the L signal, that is, the pulse signal. The interrupt request signal is output to the CPU 12.

That is, in the portion S, the pointer value poi
Is set to the address D5800H, but since the pointer value has not been set by the programmer (since there is no instruction to set the pointer value in the source program), this value is not changed. Therefore, a signal instructing writing to the address in the dedicated area 32 is issued, and an error signal is issued.

Thereafter, in K5, the CPU 12 interrupts (forcefully terminates) the execution of the object program, and in K6, the CRT display section 20 displays "Pointer variables are not initialized". . The operator can see from this display that there is a program error.

As described above, in the present embodiment, before the pointer variable * poi is actually written, that is, when the signal designating the address in the dedicated area 32 and the signal instructing the writing are issued. At, since the execution of the object program is suspended, the pointer variable * poi is not actually written. However, even if the writing is actually performed, since the pointer value is set in the dedicated area 32 for error detection that is not used by the programmer as described above, other program code or the like may be written. Avoid being destroyed. Further, since the pointer value poi is set in the middle of the dedicated area 32, an error signal is issued when a read / write command is issued to an area of 2 Kbytes before and after the pointer value poi.

On the other hand, when the pointer value a is set by the programmer in the portion R of the source program, the pointer variable * poi is written to the address indicated by the set pointer value a in K4. It will be. Therefore, since the signal designating the pointer value indicating the address in the dedicated area 32 and the WT are not simultaneously issued, the pulse signal is never issued in the error detection circuit 30. Then, in K7 and K8, the functions sitakansu and uekansu are returned.

As described above, in the present embodiment, the program error (forgetting to initialize the pointer value poi of the pointer variable * poi) can be detected by using the error detecting circuit 30 which is constructed by hardware. Further, since the detection of the program error is performed by the hard circuit, not by the syntax analysis, the detection speed can be increased accordingly. In addition, if the programmer forgets to initialize the pointer value of the pointer variable * poi in the source program, the write command signal of the pointer variable * poi must be the dedicated area 32 when the object program is executed.
Since it is designed to be issued to the address within, the program error can be detected with certainty.
Further, the contents of the program error are displayed on the CRT display device 20.
Since it is displayed on the screen, the operator can be surely notified of that fact.

As described above, in this embodiment, the portion of the control unit 10 for converting the source program code into the object program code is the translation means referred to in the claims, and the pointer value of the pointer variable * poi. To D5
The portion for automatically adding the instruction to be set at the address 8000H (D5: 0800) is the automatic initialization means, and the portion for combining the translation means and the automatic initialization means is the compiler. Further, the memory area in a predetermined range including the pointer value (address D5800H) set by the automatic initialization means is the dedicated area 32 (addresses D5000H to D5).
FFFH address), and the pulse signal is an error signal. The CRT display unit 20 is a notification means.

Although the error detection circuit 30 is mounted on the optional board 16 and provided as an external circuit in the above embodiment, it may be built in the personal computer in advance as an internal circuit. In the above embodiment, the dedicated area 32 is the D500.
Although the addresses are from 0H to D5FFFH, they may be in other areas and the capacity may be other than 4 Kbytes. When the error detection circuit is provided as a built-in circuit of the control unit 10, the capacity of the dedicated area can be reduced to increase the area that can be used for other purposes. Further, in the above embodiment, the pointer value set by the automatic initialization means is D58 in the dedicated area 32.
The address is 00H, but it may be anywhere within the dedicated area 32.

Further, in the above embodiment, the program error is displayed on the CRT display section 20, but when the program error is detected, a buzzer is emitted or a lamp is turned on. You may do it. Furthermore, the execution of the object program may only be interrupted (forced termination). In that case, if the instruction manual or the like states that the cause of the interruption is a program error, the operator can know that there is a program error by looking at the instruction manual.

Further, in the above embodiment, the program error is detected before the pointer variable * poi is actually written in the dedicated area 32, but after the actual writing is performed, It may be detected. Even in that case, since writing is performed in the dedicated area 32, other programs are not destroyed.

Although not specifically exemplified, the present invention can be carried out in various modified and improved modes based on the knowledge of those skilled in the art without departing from the scope of the claims.

[Brief description of drawings]

FIG. 1 is a block diagram showing a personal computer equipped with a program error detection device according to an embodiment of the present invention.

FIG. 2 is a front view of an optional board that is a part of the control unit of the personal computer.

FIG. 3 is a diagram illustrating a RAM of the control unit.

FIG. 4 is a circuit diagram showing an error detection circuit of the control unit.

FIG. 5 is a diagram showing a source program code translated by the control unit.

6 is a diagram showing an object program code obtained by translating the source program code of FIG.

FIG. 7 is a diagram showing the RAM.

FIG. 8 is a flowchart showing a process of executing the object program.

[Explanation of symbols]

 10 control section 12 CPU 14 RAM 16 optional board 20 CRT display section 30 error detection circuit 32 dedicated area 40 DIP switch 44 coincidence determination circuit 46 OR circuit 48 AND circuit

Claims (1)

[Claims] 1. A device for detecting a program error that forgets to initialize a pointer value while using a pointer variable as an automatic variable when creating a source program that takes an automatic variable in a stack area, wherein the source program is an object program. And an automatic initialization means for automatically adding an instruction for setting the pointer value of the pointer variable to a predetermined address value to the object program when the pointer variable is an automatic variable. A compiler, an error detection circuit that detects read / write to a memory area in a predetermined range including an address value set by the automatic initialization means and outputs an error signal when the object program is executed, and an error detection circuit Depending on the pointer in the source program A program error detection device comprising: a notification unit for notifying an operator that a pointer value of a variable has not been initialized.