JPH07104874A - Reference voltage generating circuit - Google Patents

Abstract

PURPOSE:To provide a reference voltage generating circuit which holds voltage resistance against power supply voltage and does not generate saturation even when voltage resistance between the collector and emitter of a transistor is small. CONSTITUTION:At the reference voltage generating circuit provided with two mirror-connected transistors Q3 and Q4 and an output transistor Q1, the collector/emitter of a second transistor Q5 is connected between the collector of the output transistor Q1 and a high-order side power source GND and as the base potential, a potential to be a voltage, for which a voltage between the collector and the emitter is lower than a resistant voltage, not to generate the saturation is supplied. The voltage between the collector and emitter of the output transistor Q1 is relaxed by the second transistor Q5 and controlled to a voltage which is lower than the resistant voltage of the transistor to be integrated and does not generate the saturation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reference voltage generating circuit, and more particularly to a reference voltage generating circuit for generating a constant voltage required for an ECL circuit.

[0002]

2. Description of the Related Art In an ECL circuit used in a high speed logic circuit, as shown in FIG. 7, the emitters of two transistors Q11 and Q12 are connected to each other, and this connection point is connected to the collector of a third transistor Q13. The third transistor Q13 has a base connected to the reference potential VCS and an emitter connected to the low potential side power source VEE via the resistor R12.
The collector of the transistor Q11 is directly connected to the high-potential side power supply GND, and the collector of the transistor Q12 is connected to the high-potential side power supply GND through the resistor R11, and the input signal VIN is input to the base of the transistor Q11 to make the transistor Q12 The reference voltage VR is input to the base.

In this ECL circuit, when the input voltage VIN is on the power supply side higher than the reference potential VR, the transistor Q11 is turned on and the transistor Q12 is turned off, so that the current is higher than the higher potential and the transistor Q11 and the transistor Q13, It flows through the resistor R12. Therefore, since almost no current flows through the resistor R11, the collector potential of the transistor Q12 rises to the high-potential side power source potential,
High level. On the other hand, when the input signal VIN is on the lower power supply side than the reference voltage VR, current flows through the resistor R11, the transistor Q12, the transistor Q13, and the resistor R12, and the collector potential of the transistor Q12 becomes low level. That is, assuming that the current value is I and the value of the resistor R11 is R11 (hereinafter, the sign of the resistor is also directly represented as a resistance value), the collector potential of the transistor Q12 is the high-side power supply potential (VGND) -I × R11. Becomes

Therefore, the logical amplitude of the ECL circuit is I ×
It becomes R11. Here, the current value I is the transistor Q13
And the resistor R12 create a constant current, and the transistor Q1
If the base potential of 3 is VCS and the forward voltage between the base and emitter is VF, then I = (VSC-VF) / R12. Therefore, the logical amplitude is (VCS-VF) × R11
Therefore, even if the power supply voltage VEE fluctuates, it is necessary to keep the value of VCS at a constant voltage from VEE in order to keep the logic amplitude constant.

Therefore, conventionally, a reference voltage generating circuit as shown in FIG. 3 is used. This reference voltage generating circuit is of a so-called wilder type, and is composed of transistors Q1 to Q4 and resistors R1 to R5. The reference voltage generating circuit is composed of a high-potential power supply GND and a low-potential power supply VEE to provide a constant voltage. It is a known circuit for generating VCS. In this circuit, two mirror-connected transistors Q3, Q
The constant voltage VCS is generated by utilizing the difference between the base-emitter forward voltage VF of the two transistors caused by the difference in the current density of the current flowing through the transistor 4.

That is, the forward voltage between the base and emitter of the transistors Q2, Q3, Q4 is set to VF2, VF3, VF, respectively.
4, the current value flowing through the resistor R1 is I1, the transistor Q3
If the current flowing through the collector of the IC is IC3, the output voltage V
The CS is expressed as VCS = VF2 + (I1 + IC3) × R2. Here, I1 = VF2 / R1, I
Substitute C3 = a (VF3-VF4) / R3. However,
a is a base ground current amplification factor. From this, VCS = (1 + R2 / R1) * VF2 + a * (VF3-VF4) * R2 / R3 (1) is obtained.

However, in recent years, miniaturization of elements,
As the performance is advanced, the breakdown voltage of the junction tends to be reduced.
On the other hand, especially in the ECL circuit, the power supply voltage is unchanged.
In the conventional circuit configuration, it is becoming difficult to satisfy the guaranteed value of element breakdown against the power supply voltage and input voltage, which is called the absolute maximum rating. For example, in the circuit of FIG. 3, when the potential of VCS is + 1.2V with respect to VEE, the collector-emitter voltage applied to the transistor Q1 is | VEE | -1.2V. Here, when the collector-emitter breakdown voltage BVCEO of the transistor Q1 is, for example, 3.5V, the breakdown voltage is exceeded at VEE = -4.7V. The operating VEE range in a general ECL circuit is about -5V ± 1V, and the absolute maximum rating is -7V, so that the conventional circuit cannot satisfy these standards.

In order to increase the breakdown voltage, as shown in FIG. 4, a diode D is connected between the high potential side power supply GND and the collector of the transistor Q1 has been proposed.
As the diode D, a transistor is often diode-connected, that is, a collector and a base of the transistor are directly connected and inserted. In this circuit, by utilizing the potential drop of the diode D, the collector-emitter breakdown voltage B of the transistor Q1 is up to the absolute maximum rating of VEE = -7V.
It becomes possible to keep VCEO = 3.5V. However, in this circuit, the difference between the absolute maximum rating and the allowable range of VEE in the circuit of FIG. 3, that is, 7V-4.7V = 2.
Since 3V potential drop is obtained by connecting 3 diodes or 4 diodes in series depending on the current flowing through the diode, when the number of stages of this diode increases,
On the contrary, the transistor may be saturated when the absolute value of VEE is low.

That is, when the load current of the reference voltage generating circuit is small, the value of the current flowing through the diode D is small, the forward voltage of the diode is small, and VEE is low.
That is, the collector-emitter voltage of the transistor Q1 increases when VEE increases in absolute value, and the breakdown voltage becomes severe. On the other hand, when the load current increases, the value of the current flowing in the diode D increases, the forward voltage of the diode also increases, and the collector-emitter voltage of the transistor Q1 decreases when VEE decreases in absolute value. , Becomes tougher against saturation. In particular, when the number of built-in circuits varies like a gate array, and the load current of the reference voltage generating circuit varies greatly, the design becomes difficult.

FIG. 5 shows a known voltage generating circuit disclosed in Japanese Patent Laid-Open No. 4-129421, which includes transistors Q21 to Q26, resistors R21 to R27, and a diode D1.
And the constant voltages VCS and VR based on the transistors Q23 and Q24 which are mirror-connected as in the circuit described above.
To occur. In this circuit, set the VCS level to VEE
When + 1.2V and VR level are -1.1V, the collector-emitter voltage applied to the transistor Q21 is | VE.
It becomes E | -2.3V, and exceeds the withstand voltage at VEE = -5.8V. Even in such a case, the withstand voltage can be satisfied by inserting the diode D in two stages between the emitter of the transistor Q25 and the collector of the transistor Q21 as shown in FIG. 6, but the collector-emitter voltage applied to the transistor Q21 is | VEE | -2.3-2
× VF. Here, VF is the forward voltage of the diode D, and assuming that VF = 0.8V, VEE = −4.2.
At V, the collector-emitter voltage is 0.3 V, which is in a saturated state, so that there is no margin for the operation guarantee margin with respect to VEE fluctuation.

[0011]

As described above, in the conventionally proposed reference voltage generating circuit, when the collector-emitter breakdown voltage of the transistor becomes small, the breakdown voltage against the power supply voltage cannot be satisfied. In addition, there is a problem that saturation occurs when trying to satisfy the breakdown voltage.
It is an object of the present invention to provide a reference voltage generating circuit that maintains a withstand voltage against a power supply voltage even when the collector-emitter withstand voltage of a transistor is small and does not cause saturation.

[0012]

According to the present invention, a reference voltage is generated by utilizing a difference in forward voltage between base and emitter of two transistors connected in a mirror, and a reference voltage is generated between an output terminal of the reference voltage and a high potential side power source. In a reference voltage generating circuit having an output transistor having a collector and an emitter connected to each other, a collector and an emitter of a second transistor are connected between a collector of the output transistor and a high-potential side power source, and a base of the second transistor has two The collector-emitter voltage of the two transistors is smaller than the withstand voltage of the transistors, and a potential that does not cause saturation is supplied. For example, a voltage dividing resistor is inserted between the base of the output transistor and the high potential side power source, and the potential divided by the voltage dividing resistor is supplied to the base of the second transistor. In addition, a voltage dividing resistor is directly inserted between the high potential side power source and the low potential side power source, and the potential divided by the voltage dividing resistor is supplied to the base of the second transistor.

[0013]

By properly setting the base potential of the second transistor, the collector-emitter voltage of the output transistor is relaxed by the second collector-emitter voltage, and is smaller than the withstand voltage of the integrated transistor. In addition, it is possible to control the voltage so that saturation does not occur.

[0014]

FIG. 1 is a circuit diagram of an embodiment of the present invention. This circuit is basically an improvement of the wilder type reference voltage generating circuit shown in FIG. 3, and the same parts as those in FIG. 3 are denoted by the same reference numerals. A transistor Q5 having a collector-emitter connected in series with a transistor Q1 having a collector-emitter connected between the reference voltage output terminal VCS and the high-potential power supply GND is provided. That is, the transistors Q3 and Q4 are mirror-connected, and the emitter of the transistor Q4 is connected to the lower power supply VEE,
The collector and the base are connected to the base of the transistor Q3. A resistor R4 is connected between the collector and the output terminal VCS. The emitter of the transistor Q3 is connected to the low potential side power supply VEE via the resistor R3, and the collector is connected to the output terminal VCS via the resistor R2. The transistor Q2 has its emitter connected to the lower power supply VEE and its collector connected in series to resistors R5a and R5.
It is connected to the higher power source GND via b. Further, the base is connected to the collector of the transistor Q3 and is also connected to the low potential side power source VEE via the resistor R1.

The output transistor Q1 has an emitter connected to the output terminal VCS and a collector connected to the transistor Q1.
5 is connected to the emitter and the base is connected to the collector of the transistor Q2. The collector of the transistor Q5 is connected to the high-potential side power supply GND, and the base is connected to the contacts of the resistors R5a and R5b. Here, the resistors R5a and R5b described above function as a voltage dividing resistor, and by appropriately controlling the base potential of the transistor Q5 to set the collector-emitter voltage thereof, the collector-emitter of the output transistor Q1. It is used to relieve the inter-voltage.

In this circuit, the resistors R5a and R5 are now
5b is obtained by dividing the resistor R5 in FIG. 3 into a resistance ratio of 1: 2, and if the base-emitter forward voltage of the output transistor Q1 is VF1, the base potential of the output transistor Q1 becomes VCS + VF1. Has a base potential of (VCS + VF1) / 3. Therefore, the emitter potential of the transistor Q5, that is, the collector potential of the output transistor Q1 is equal to the base-emitter forward voltage of the transistor Q5 at VF5.
Then, it is represented as (VCS + VF1) / 3-VF5.

When the output voltage VCS is VEE + 1.2V and the emitter-collector voltage VCE of the output transistor Q1 is obtained, VCE = (VCS + VF1) / 3-VF5-VCS = -2 * VCCS / 3 + VF1 / 3-VF5 =- 2 × VEE / 3-0.8 + VF1 / 3-VF5 Here, assuming that VF1 = VF5 = 0.8V, VCE =
When VEE of 3.5V is obtained, VEE = −7.25V, which satisfies the absolute maximum rating of VEE = −7V.

On the other hand, when the VEE at which VCE = 0.5V is obtained, VEE = −2.75V, and there is a margin for saturation. From the viewpoint of circuit characteristics, there is almost no change in characteristics because there is no change in the part relating to the output voltage shown in the equation (1). Further, in comparison with the case where the diode D is connected to the collector of the transistor Q1 as shown in FIG. 4, the circuit of FIG. 4 requires the same number of transistors to form the plurality of diodes D. The circuit need only use one transistor, and the number of elements can be reduced.

FIG. 2 shows another embodiment of the present invention. In this embodiment, the base of the transistor Q5 is connected to the high-side power supply GND via the resistor R6, and the low-side power supply V is connected via the resistor R7.
EE is connected to the resistor R5a in FIG.
The point that R5b is collectively referred to as a resistor R5 is different from the above embodiment. In this embodiment, the base potential of the transistor Q5 is determined as the ratio of the resistors R6 and R7, that is, the voltage between the high side power source GND and the low side power source VEE divided by the resistors R6 and R7.

When this potential is Vb, the collector-emitter voltage of the output transistor Q1 is Vb-VF1-
Expressed in VCS. Here, VF1 is a base-emitter forward voltage of the output transistor Q1. Output voltage VCS
Is VEE + 1.2V and VF1 = 0.8V, VCE = Vb−0.8− (VEE + 1.2) = Vb−V
EE-2.0 Therefore, VEE = -7.0V, VCE <= 3.5V
When Vb is obtained, Vb ≧ VEE + 2.0 + VCE ≧ −7.0 + 2.0 +
3.5 ≧ -1.5V

Further, VEE = -4.0V, VCE≤0.
When Vb of 5 V is obtained, Vb ≦ VEE + 2.0 + VCE ≦ −4.0 + 2.0 +
Since 0.5 ≦ −1.5V, the resistance values of the resistors R6 and R7 are set so that Vb ≧ −1.5V when VEE = −7V and Vb ≦ −1.5V when VEE = −4V. It will be good to set it. For example, if the resistance value ratio of the resistors R6 and R7 is 2: 5, Vb = -2V when VEE = -7V, and VCE =
It becomes 3V. When VEE = -4V, Vb =-
It becomes 1.1V and VCE = 0.9V.

Here, in the first embodiment, the base current of the transistor Q5 changes due to the load current of the reference voltage generating circuit, and the base potential of the transistor Q1, that is, the potential of the reference voltage VCS fluctuates. Although the load dependence of the reference voltage VCS changes slightly compared to the circuit of FIG. 3, in the second embodiment, the base of the transistor Q5 is independent of the base of the transistor Q1. Can be secured.

[0023]

As described above, according to the present invention, the collector-emitter of the second transistor is connected between the collector of the output transistor and the high potential side power source, and the base of the second transistor is connected to the two transistors. Since the collector-emitter voltage of is set to a potential that is lower than the withstand voltage and does not saturate, both the withstand voltage and the saturation are satisfied and the circuit characteristics are not deteriorated even when the withstand voltage of the transistor decreases. Further, there is an effect that a circuit having a smaller number of constituent elements can be configured as compared with the case of inserting a diode.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of a reference voltage generating circuit of the present invention.

FIG. 2 is a circuit diagram of another embodiment of the present invention.

FIG. 3 is a circuit diagram of an example of a conventional reference voltage generation circuit.

FIG. 4 is a circuit diagram of an example of a circuit obtained by improving the circuit of FIG.

FIG. 5 is a circuit diagram of another conventional circuit.

6 is a circuit diagram of a part of a circuit obtained by improving the circuit of FIG.

FIG. 7 is a circuit diagram showing the principle of an ECL logic circuit.

[Explanation of symbols]

 Q1 to Q5 Transistors R1 to R7 Resistance GND High-side power supply VEE Low-side power supply VCS Reference voltage output terminal

Claims (3)

[Claims] 1. A reference voltage is generated by utilizing a difference in forward voltage between a base and an emitter of two mirror-connected transistors, and a collector and an emitter are connected between an output terminal of the reference voltage and a high potential side power supply. In a reference voltage generation circuit having an output transistor, a collector-emitter of a second transistor is inserted between a collector of the output transistor and a high potential side power source, and a collector of the two transistors is provided at a base of the second transistor. A reference voltage generating circuit characterized in that a voltage between the emitters is smaller than a withstand voltage of a transistor and a potential which is a voltage which does not cause saturation is supplied. 2. A voltage dividing resistor is inserted between the base of the output transistor and the high potential side power source, and the potential divided by the voltage dividing resistor is supplied to the base of the second transistor.
Reference voltage generation circuit 3. The voltage dividing resistor is directly inserted between the high potential side power source and the low potential side power source, and the potential divided by the voltage dividing resistor is supplied to the base of the second transistor. Reference voltage generation circuit.