JPH0698157A - Halftone image forming device - Google Patents

Abstract

PURPOSE:To simplify the error dispersion processing part of a halftone image preparing device. CONSTITUTION:A dither processing part 7 operates a dither processing to inputted picture data, for example, 8 bit 256 gradation data, and converts the data into, for example, 2-bit 4-gradation picture data, and outputs the data. The dither-processed picture data are inputted to an error dispersion processing part 8, and outputted as binary data. And also, the error dispersion processing part 8 calculates difference data between the input picture data and a scheduled threshold value, and feedbacked the difference data as correction data. The error dispersion processing part 8 corrects the picture data inputted from the dither processing part 7 by the difference data and a weighting correction value preliminarily set at the error dispersion processing part 8.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a halftone image forming apparatus, and more particularly, to simplifying the structure of an error diffusion processing section provided as a binarizing means for reproducing a halftone. The present invention relates to a halftone image forming apparatus.

[0002]

2. Description of the Related Art Conventionally, error diffusion processing has been known as a binarization processing method for reproducing a halftone image in a digital printer or a digital facsimile apparatus. This error diffusion processing is a method in which the density difference between the image density of the original and the output image density is calculated for each pixel, the calculation processing result is given a specific weighting, and then dispersed to the pixels around the pixel of interest. is there.

An example of the error diffusion processing device will be described with reference to the block diagram of FIG. 10 and the pixel array diagram of FIG. In FIG. 11, the pixel x is the pixel of interest, and the reference pixels P1 to P4 around it are the pixels that have already been binarized. That is, the reference pixels P1 to P3 are pixels one line before the target pixel x, and the reference pixel P4 is a pixel immediately before the target pixel x.

In FIG. 10, an image read by a reading device (not shown) is 8-bit digital data, that is, 2
The data is quantized into 56 gradation data and input to the correction data calculation unit 1. The data input to the correction data calculation unit 1 includes the difference data output from the difference data generation / binarization unit 2 arranged in the next stage of the correction data calculation unit 1 and the correction coefficient for specific weighting. Is corrected according to the equation described below.

The difference data generation / binarization unit 2 binarizes the data supplied from the correction data calculation unit 1 according to a predetermined threshold value and outputs binarized image data.
The difference between the binarized data and the threshold value, that is, the difference data is output.

The difference data is input to the line memory 3 and directly to the correction data calculation unit 1. The difference data input to the line memory 3 is transferred to the latches 6, 5, 4 and read by the correction data calculation unit 1 at a predetermined timing.

That is, the difference data D1 to D3 supplied from the latches 4, 5 and 6 are the difference data relating to the pixels P1 to P3 on the line immediately preceding the target pixel x, and are directly input from the difference data generation / binarization unit 2. The difference data D4 is the difference data regarding the immediately preceding pixel P4 on the same line as the pixel of interest x.

The correction coefficient for weighting is set corresponding to each reference pixel. Pixels P1, P2, P3, P
As described above, the difference data corresponding to 4 is D1, D2, D
3 and D4, and the correction coefficients for weighting corresponding to the pixels P1, P2, P3, and P4 are a, b, c, and d, the pixel of interest x is corrected by the following equation. However, the code x0 is the density of the target pixel x before correction, and the code x1 is the density of the target pixel x after correction. x1 = x0 + (D1 * a + D2 * b + D3 * c + D4 * d) ... Equation 1 An example of an image processing apparatus equipped with error diffusion processing is described in Japanese Patent Laid-Open No. 63-155950.

[0009]

In the apparatus for performing the error diffusion process, the difference data D1 to D4 are composed of 8-bit data indicating the image density and 1-bit code data indicating the sign of the difference data. Become. Therefore,
The arithmetic circuit that constitutes the correction data calculation unit 1 requires a large multiplier for performing multiplication on 9-bit data, and as a result, the circuit scale becomes large and it is difficult to speed up the arithmetic operation. there were.

Further, a large-capacity line memory was required to store the 9-bit difference data.

The object of the present invention is to solve the above problems,
An object of the present invention is to provide a halftone image forming apparatus capable of achieving a downsizing and a cost reduction by reducing the circuit scale.

[0012]

According to the present invention for solving the above problems and achieving the object, image data having an n-value gradation is converted into image data having an m-value gradation smaller than the n value. It is characterized in that it is provided with a multi-valued dither matrix processing means for converting into an image and an error diffusion processing means for artificially expressing the image data having the gradation of m values by binary data.

[0013]

According to the present invention having the above characteristics, the image data having the n-value gradation is converted into the image data having the m-value gradation smaller than the n-value by the multi-value dither matrix processing means. As a result, when the error diffusion processing is performed on the image data of the m-value gradation, the difference can be expressed with a smaller digital data amount, that is, the number of bits.

[0014]

Embodiments of the present invention will be described below with reference to the drawings. First, a schematic configuration of the halftone image forming apparatus of this embodiment will be described. In the block diagram of FIG. 1, the halftone image forming apparatus is provided with a dither processing unit 7 in the preceding stage and an error diffusion processing unit 8 in the subsequent stage.

8-bit digital data, that is, 256
The image data quantized into gradation data is first input to the dither processing unit 7. The dither processing unit 7 converts the input 8-bit (256 gradation) image data into 2-bit (4 gradation) image data. Therefore, the dither processing unit 7 is set with a three-step threshold value (8 bits) to be compared with the input data.

The image data converted into 2 bits by the dither processing unit 7 is input to the error diffusion processing unit 8 at the next stage. In the error diffusion processing unit 8, the input 2-bit image data is subjected to error diffusion processing, and is further converted into 1-bit (2-gradation) image data, which is output to a recording unit (not shown). Further, the error diffusion processing unit 8 calculates the difference between the input image data and the expected level, that is, the difference value, feeds back the calculation processing result, further weights the image data, and then corrects the image data. .

The detailed configurations of the dither processing section 7 and the error diffusion processing section 8 will be described below. First, the dither threshold value corresponding to each pixel will be described. In this embodiment, in order to represent the image data by 2 bits 4 (grayscale), 4 sets of dither thresholds consisting of 3 stages of data are prepared and a 2 × 2 dither matrix is constructed.

In FIG. 2, four sets of dither thresholds TH
1 to TH4 are high (H), medium (M), and low (L) 3 respectively
The dither matrix has a stepwise threshold value (see FIG. 2B), and the threshold values are alternately different for each bit in the main scanning direction and each line in the sub-scanning direction. Has been done.

The dither threshold is the same as the input image data, 8
Expressed in bits. Then, the dither processing unit 7 sets “11” when the input image data is higher than the threshold value THn−H (n = 1 to 4), and sets the input image data to the threshold value THn.
-H and THn-M is "10", input image data is between threshold values THn-M and THn-L, "01", input image data is at threshold value THn. −
When it is lower than L, the image data of "00" is output.

The configuration of the dither processing unit 7 which performs the dither processing according to the dither threshold will be described with reference to the block diagram of FIG. In the figure, four sets of dither thresholds TH1 to TH4 each having three-stage data are set in the threshold value setters 9 to 12.

The main scanning direction counter 13 has a main scanning direction 1
A high (H) or low (L) signal is output for each bit, and this signal is input as a selection signal for the multiplexers 14 and 15. The multiplexer 14 responds to the selection signal and selects and outputs one of the data input from the threshold value setting devices 9 and 10. For example, when the selection signal is "H", the data input from the threshold value setting device 9 is selected, and when the selection signal is "L", the data input from the threshold value setting device 10 is selected and output. To configure.

Similarly, the multiplexer 15 responds to the selection signal and selects and outputs one of the data input from the threshold value setting devices 11 and 12.

The data output from the multiplexers 14 and 15 is further input to the multiplexer 16.
The multiplexer 16 includes the sub-scanning direction counters 1 to 1
In response to the "H" or "L" selection signal output for each line, one of the data supplied from the multiplexers 14 and 15 is output.

With the above configuration, the threshold value is output for each bit in the main scanning direction and for each line in the sub scanning direction based on a predetermined pattern as shown in FIG.

Subsequently, the threshold value output from the multiplexer 16 is supplied to the comparators 18, 19 and 20,
The image data input from the latch 21 is compared. When the image data (input A) is larger than the threshold value (input B), the comparators 18 to 20 respectively output “1” as the comparison result, and the image data (input A) is output from the threshold value (input B). When is small, “0” is output as the comparison result. Then, this comparison result is input to the decoder 22.

The data Z output from the decoder 22 corresponding to the inputs A, B and C is shown in FIG. In this way, when the dither processing unit 7 is supplied with image data of 8-bit 256 gradations, it converts this into image data of 2-bit 4 gradations and outputs it.

Next, the error diffusion processing for binarizing the dithered image data by the error diffusion method will be described.

FIG. 5 shows the pixels subject to error diffusion processing, that is, the dithered image data (pixels of interest).
FIG. 9 is a diagram showing a relationship between a timing of being input to an adder 25, which will be described later with reference to FIG. 7, and a timing of inputting a difference value regarding image data of one line before the pixel of interest to multipliers 38 to 40, which will be described later with reference to FIG. 7. .

In FIG. 5, the matrix M is a range defining the pixel of interest to be subjected to the error diffusion processing and the reference pixels around it. The upper row of the matrix M is the difference value LB1 with respect to the data one line before which has been dithered.
-1 to LB1-n (n is the number of pixels in one line), and the lower row is the dithered data DT1-1 to DT1-n of the line including the target pixel.

In order to set the target pixel and the difference value of the target pixel with respect to the data one line before, at least as shown in the figure, a process of latching the input data twice according to the system clock is required. That is, the data D
T1-1 to DT-n and difference values LB1-1 to LB1-
In order to input n to the arithmetic processing unit at the same timing, the timing when the data DT1-1 to DT1-n are input to the arithmetic processing unit is set to the system with respect to the input timing of the difference values LB1-1 to LB1-n. It should be delayed by two clocks. FIG. 5A shows the positional relationship of each pixel before latching, FIG. 5B shows the positional relationship after one latching, and FIG. 5C shows the positional relationship of each pixel after latching twice. In FIG. 5, the pixel at the position X is the target pixel.

In the error diffusion processing, the image data supplied from the dither processing unit 7 is binarized and at the same time, the difference value between the image data and a predetermined threshold value is obtained. Then, this difference value is multiplied by a predetermined weighting correction value for each reference pixel, and all the multiplication results for each reference pixel are added.
The addition result is added to the image data supplied from the dither processing unit 7 to obtain the image data after the error diffusion processing. Therefore, the image data after this error diffusion processing is to be binarized.

The outline of the calculation of the difference value will be described with reference to FIG. In FIG. 6, threshold TH-B is a threshold for binarizing image data. In addition, the threshold value TH-
A and TH-C are threshold values indicating the maximum density and the minimum density of predicted image data, respectively. In order to calculate the difference value, first, the median value UC between the threshold values TH-A and TH-B and the median value LC between the threshold values TH-C and TH-B are calculated. Then, when the input image data is higher than the threshold value TH-B, the difference value between the input image data and the median value UC is obtained. On the other hand, when the input image data is lower than the threshold value TH-B, the difference value between the input image data and the median value LC is obtained. For example, when the level of the input image data is PL, (PL-UC) becomes the difference value D.

An example of the configuration of the error diffusion processing unit 8 is shown in FIGS. In the figure, the image data output from the decoder 22 is input to the adder 25 via the latch 23 and the latch 24 when the system clock is supplied twice. In the adder 25, a value obtained by further adding the products of the difference value supplied from the multiplexer 37 described later and the correction values a to d for each pixel is added to the input image data. . The added data is latched in the latch 26, and then the comparator 2
Input to 7. A reference value for comparison, that is, a threshold value TH-B is supplied to the comparator 27 from the threshold value setting device 28.

The image data output from the latch 26 is also input to subtractors 29 and 30. A threshold value TH-A and a threshold value TH-C are set in the threshold value setters 31 and 32, respectively. The median value UC between the threshold value TH-A and the threshold value TH-B is calculated by an arithmetic unit including an adder 33 and a divider 34,
It is supplied to the subtractor 29. On the other hand, the threshold value TH-C
And the threshold value TH-B, a median value LC is calculated by an arithmetic unit including an adder 35 and a divider 36, and the other subtractor 3
Supplied to zero.

The result of subtraction by the subtracters 29 and 30, that is, the difference value is supplied to the multiplexer 37. One of the difference values is selected by using the output of the comparator 27 as a select signal and output from the multiplexer 37. That is, when the input image data is larger than the threshold value TH-B, the output of the comparator 27 becomes "1", and the difference value calculated by the subtractor 29 is selected by this output signal.
On the contrary, when the input image data is smaller than the threshold value TH-B, the output of the comparator 27 becomes "0", and the difference value calculated by the subtractor 30 is selected by this output signal.

The difference value output from the multiplexer 37 is directly input to the multiplier 41, and is also output to the multiplier 38 via the line memory 3 and the latch 6.
Further, the difference value is input to the multiplier 39 via the latch 5 and to the multiplier 40 via the latch 5 and the latch 4.

In the multipliers 38 to 41, the correction value setting unit 4
The correction values a to d for weighting respectively supplied from 2, 43, 44 and 45 are multiplied by the difference value and output to the adder 46. The adder 46 calculates the sum of the supplied multiplication results and outputs it to the adder 25. The operation timing of the error diffusion processing unit 8 is shown in the timing chart of FIG.

As described above, in this embodiment, the image data is converted into 2 bits and 4 gradations, and then the difference value between the converted image data and the threshold value is obtained. Therefore, the error diffusion processing unit using the difference value has only to perform the operation on the data of 2 bits + 1 bit (positive and negative sign bits).

[0039]

As is apparent from the above description, according to the present invention, the error diffusion process is performed by the dither processing means for the image data represented by a smaller amount of information. The structure of the means can be simplified.

Specifically, since it is only necessary to perform an operation on the image data represented by a small amount of information, the multiplier can be simplified and the size of the line memory for storing information can be reduced. As a result, the circuit scale can be reduced and the operation speed can be increased.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a tither threshold value set in a dither processing unit.

FIG. 3 is a block diagram showing a configuration of a dither processing unit.

FIG. 4 is a diagram showing input / output of a decoder provided in a dither processing unit.

FIG. 5 is a diagram showing a relationship between a range defining a reference pixel and a pixel.

FIG. 6 is an explanatory diagram of threshold values for calculating difference data.

FIG. 7 is a block diagram showing a configuration of an error diffusion unit.

FIG. 8 is a block diagram showing a configuration of an error diffusion unit.

FIG. 9 is a timing chart of the error diffusion processing operation.

FIG. 10 is a block diagram showing a configuration of an image forming apparatus showing a conventional technique.

FIG. 11 is a diagram showing a relationship between a pixel of interest and a reference pixel.

[Explanation of symbols]

3 ... Line memory, 7 ... Dither processing section, 8 ... Error diffusion processing section

Claims (1)

[Claims] 1. A halftone image forming apparatus for binarizing image data having n-valued gradations and binarizing the image data according to a two-dimensional distribution state of binary data, wherein the image having n-valued gradations is used. Multivalued dither matrix processing means for converting data into image data having m-value gradations smaller than the n-value, and for representing image data having the m-value gradations in a pseudo manner by binary data Error diffusion processing means.